[go: up one dir, main page]

Steigerwald et al., 1997 - Google Patents

Chemical mechanical planarization of microelectronic materials

Steigerwald et al., 1997

Document ID
14788010567395432625
Author
Steigerwald J
Murarka S
Gutmann R
Publication year

External Links

Snippet

Chemical Mechanical Planarization (CMP) plays an important role in today's microelectronics industry. With its ability to achieve global planarization, its universality (material insensitivity), its applicability to multimaterial surfaces, and its relative cost …
Continue reading at books.google.com (other versions)

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684Smoothing; Planarisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor

Similar Documents

Publication Publication Date Title
Steigerwald et al. Chemical mechanical planarization of microelectronic materials
US6416685B1 (en) Chemical mechanical planarization of low dielectric constant materials
Singh et al. Advances in chemical-mechanical planarization
EP0366027B1 (en) Wafer flood polishing
US6656842B2 (en) Barrier layer buffing after Cu CMP
Murarka et al. Inlaid copper multilevel interconnections using planarization by chemical-mechanical polishing
US6976904B2 (en) Chemical mechanical polishing slurry
US6736992B2 (en) Chemical mechanical planarization of low dielectric constant materials
Xu et al. Progress in material removal mechanisms of surface polishing with ultra precision
WO2007002915A2 (en) Slurry for chemical mechanical polishing of aluminum
US6530824B2 (en) Method and composition for polishing by CMP
CN1484566A (en) Crosslinked polyethylene polishing pad for chemical mechnical polishing polishing apparatus and polishing method
Tseng et al. Effects of mechanical characteristics on the chemical-mechanical polishing of dielectric thin films
EP1362378A2 (en) Chemical mechanical polishing of copper-oxide damascene structures
Brown Flat, cheap, and under control [electrochemical mechanical planarization]
Zhang et al. CMP challenges for advanced technology nodes
Nolan et al. Chemical mechanical polish for nanotechnology
WO2003092944A1 (en) Polishing method and polishing system, and method for fabricating semiconductor device
Murarka Directions in the chemical mechanical planarization research
Gupta The Copper Damascene Process and Chemical Mechanical Polishing
Basim Formulation of engineered particulate systems for chemical mechanical polishing applications
Hegde et al. Removal of shallow and deep scratches and pits from polished copper films
US20040137740A1 (en) Method to reduce dishing, erosion and low-k dielectric peeling for copper in low-k dielectric CMP process
Choi Study of interfacial interaction during chemical mechanical polishing (CMP) of dielectric silicon dioxide
Jeong et al. Chemical mechanical planarization of copper bumps on printed circuit board