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Finlayson et al., 2011 - Google Patents

An overview of static pipelining

Finlayson et al., 2011

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Document ID
17818282006347693174
Author
Finlayson I
Uh G
Whalley D
Tyson G
Publication year
Publication venue
IEEE Computer Architecture Letters

External Links

Snippet

A new generation of mobile applications requires reduced energy consumption without sacrificing execution performance. In this paper, we propose to respond to these conflicting demands with an innovative statically pipelined processor supported by an optimizing …
Continue reading at scholarworks.boisestate.edu (PDF) (other versions)

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