CN104064632B - A kind of preparation method of light-emitting diodes pipe insulation layer - Google Patents
A kind of preparation method of light-emitting diodes pipe insulation layer Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims description 13
- 238000009413 insulation Methods 0.000 title description 4
- 238000000034 method Methods 0.000 claims abstract description 55
- 239000011810 insulating material Substances 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 229910052751 metal Inorganic materials 0.000 claims abstract description 35
- 239000002184 metal Substances 0.000 claims abstract description 35
- 238000005530 etching Methods 0.000 claims abstract description 11
- 238000003763 carbonization Methods 0.000 claims abstract description 6
- 238000011049 filling Methods 0.000 claims abstract description 5
- 238000009616 inductively coupled plasma Methods 0.000 claims description 10
- 238000004528 spin coating Methods 0.000 claims description 9
- 229910052594 sapphire Inorganic materials 0.000 claims description 8
- 239000010980 sapphire Substances 0.000 claims description 8
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 claims description 5
- 230000000149 penetrating effect Effects 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 4
- 238000009713 electroplating Methods 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000005553 drilling Methods 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 230000008569 process Effects 0.000 abstract description 7
- 238000000206 photolithography Methods 0.000 abstract description 4
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 229910002601 GaN Inorganic materials 0.000 description 11
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 229910005540 GaP Inorganic materials 0.000 description 4
- 239000000969 carrier Substances 0.000 description 4
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 4
- 230000017525 heat dissipation Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000005496 eutectics Effects 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000003466 welding Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- -1 nitride gallium nitride Chemical class 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0137—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials the light-emitting regions comprising nitride materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/83—Electrodes
- H10H20/832—Electrodes characterised by their material
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/032—Manufacture or treatment of electrodes
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Abstract
本发明提供一种发光二极管绝缘层的制备方法,包括:1)于透明基板正面形成包括N型层、量子阱层及P型层的发光外延结构;2)形成贯穿至所述透明基板一预设深度的V型槽;3)通过光刻及刻蚀工艺形成N型层平台;4)形成覆盖于所述V型槽及N型层平台表面的金属层结构;5)于所述V型槽内填充光敏绝缘材料;6)从所述透明基板的背面进行曝光及显影,去除没有被所述金属层结构遮挡的光敏绝缘材料;7)对金属层结构表面的光敏绝缘材料进行回流及高温碳化处理形成绝缘层。本发明提供了一种新型的沟槽型的电极结构,并提供了一种有效制备绝缘层的方法,步骤简单,有利于节省成本,并可有效提高发光二极管的性能。
The invention provides a method for preparing an insulating layer of a light-emitting diode, comprising: 1) forming a light-emitting epitaxial structure including an N-type layer, a quantum well layer, and a P-type layer on the front of a transparent substrate; 3) forming an N-type layer platform through photolithography and etching processes; 4) forming a metal layer structure covering the surface of the V-shaped groove and N-type layer platform; Filling the groove with photosensitive insulating material; 6) Exposing and developing from the back of the transparent substrate to remove the photosensitive insulating material not covered by the metal layer structure; 7) Reflowing and high temperature the photosensitive insulating material on the surface of the metal layer structure The carbonization treatment forms an insulating layer. The invention provides a novel groove-type electrode structure, and provides an effective method for preparing an insulating layer with simple steps, which is beneficial to cost saving and can effectively improve the performance of a light-emitting diode.
Description
技术领域technical field
本发明涉及一种发光二极管的制备方法,特别是涉及一种发光二极管绝缘层的制备方法。The invention relates to a preparation method of a light-emitting diode, in particular to a preparation method of an insulating layer of a light-emitting diode.
背景技术Background technique
半导体照明作为新型高效固体光源,具有寿命长、节能、环保、安全等显著优点,将成为人类照明史上继白炽灯、荧光灯之后的又一次飞跃,其应用领域正在迅速扩大,正带动传统照明、显示等行业的升级换代,其经济效益和社会效益巨大。正因如此,半导体照明被普遍看作是21世纪最具发展前景的新兴产业之一,也是未来几年光电子领域最重要的制高点之一。发光二极管是由Ⅲ-Ⅳ族化合物,如GaAs(砷化镓)、GaP(磷化镓)、GaAsP(磷砷化镓)等半导体制成的,其核心是PN结。因此它具有一般P-N结的I-N特性,即正向导通,反向截止、击穿特性。此外,在一定条件下,它还具有发光特性。在正向电压下,电子由N区注入P区,空穴由P区注入N区。进入对方区域的少数载流子(少子)一部分与多数载流子(多子)复合而发光。As a new type of high-efficiency solid light source, semiconductor lighting has significant advantages such as long life, energy saving, environmental protection, and safety. It will become another leap in the history of human lighting after incandescent lamps and fluorescent lamps. The upgrading of the industry and other industries has huge economic and social benefits. Because of this, semiconductor lighting is generally regarded as one of the most promising emerging industries in the 21st century, and also one of the most important commanding heights in the field of optoelectronics in the next few years. Light-emitting diodes are made of III-IV compounds, such as GaAs (gallium arsenide), GaP (gallium phosphide), GaAsP (gallium arsenide phosphide) and other semiconductors, and its core is a PN junction. Therefore, it has the I-N characteristics of a general P-N junction, that is, forward conduction, reverse cut-off, and breakdown characteristics. In addition, under certain conditions, it also has luminous properties. Under forward voltage, electrons are injected into the P region from the N region, and holes are injected into the N region from the P region. Part of the minority carriers (minority carriers) entering the opposing region recombine with the majority carriers (many carriers) to emit light.
随着LED灯市场爆发的日益临近,LED封装技术的研发竞争也十分激烈。目前GaN基LED封装主要有正装结构、倒装结构和垂直结构三种。当前较为成熟的是III族氮化物氮化镓用蓝宝石材料作为衬底,由于蓝宝石衬底的绝缘性,所以普通的GaN基LED采用正装结构。正装结构有源区发出的光经由P型GaN区和透明电极出射。该结构简单,制作工艺相对成熟。然而正装结构LED有两个明显的缺点,首先正装结构LED p、n电极在LED的同一侧,电流须横向流过n-GaN层,导致电流拥挤,局部发热量高,限制了驱动电流;其次,由于蓝宝石衬底的导热性差,严重的阻碍了热量的散失。With the outbreak of the LED lamp market approaching, the research and development competition of LED packaging technology is also very fierce. At present, there are mainly three types of GaN-based LED packages: front-mount structure, flip-chip structure and vertical structure. At present, it is more mature that the group III nitride gallium nitride uses sapphire material as the substrate. Due to the insulation of the sapphire substrate, ordinary GaN-based LEDs adopt a front-mount structure. The light emitted by the active area of the front-mounted structure exits through the P-type GaN area and the transparent electrode. The structure is simple, and the manufacturing process is relatively mature. However, there are two obvious disadvantages of front-mount LEDs. First, the p- and n-electrodes of front-mount LEDs are on the same side of the LED, and the current must flow through the n-GaN layer laterally, resulting in current congestion and high local heat generation, which limits the driving current; second. , due to the poor thermal conductivity of the sapphire substrate, it seriously hinders the heat dissipation.
为了解决散热问题,美国Lumileds Lighting公司发明了倒装芯片(Flipchip)技术。这种方法首先制备具有适合共晶焊接的大尺寸LED芯片,同时制备相应尺寸的硅底板,并在其上制作共晶焊接电极的金导电层和引出导电层(超声波金丝球焊点)。然后,利用共晶焊接设备将大尺寸LED芯片与硅底板焊在一起。到装结构在散热效果上有了很大的改善。但现有的倒装结构通常是通过焊接的方法固定于硅衬底中,这样的做法往往会引入较多的热阻从而降低LED芯片的散热效率。而且,这中结构的LED芯片,P电极与N电极通常制备于LED芯片的同一侧,往往会增加倒装键合工艺和引线工艺的难度,较难实现晶圆级的制造,容易造成产品良率的降低。In order to solve the problem of heat dissipation, the American Lumileds Lighting Company invented the flip chip (Flipchip) technology. This method first prepares a large-sized LED chip suitable for eutectic welding, and at the same time prepares a silicon base plate of a corresponding size, and makes a gold conductive layer of the eutectic welding electrode and a lead-out conductive layer (ultrasonic gold wire ball soldering point) on it. Then, use the eutectic welding equipment to weld the large-size LED chip and the silicon base plate together. The heat dissipation effect of the installed structure has been greatly improved. However, the existing flip-chip structure is usually fixed on the silicon substrate by soldering, which often introduces more thermal resistance and reduces the heat dissipation efficiency of the LED chip. Moreover, for the LED chip with this structure, the P electrode and the N electrode are usually prepared on the same side of the LED chip, which often increases the difficulty of the flip-chip bonding process and the wire process, and it is difficult to achieve wafer-level manufacturing, which is likely to cause product defects. rate reduction.
本发明提供一种沟槽型的发光二极管电极结构,可以使P电极和N电极制作于发光二极管的两侧,并提供了一种可以有效采用光敏性绝缘材料对该电极结构进行绝缘的方法。The invention provides a trench-type light-emitting diode electrode structure, which can make P electrodes and N electrodes on both sides of the light-emitting diode, and provides a method that can effectively use photosensitive insulating materials to insulate the electrode structure.
发明内容Contents of the invention
鉴于以上所述现有技术的缺点,本发明的目的在于提供一种发光二极管绝缘层的制备方法,用于解决现有技术中的种种问题。In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a method for preparing an insulating layer of a light-emitting diode, which is used to solve various problems in the prior art.
为实现上述目的及其他相关目的,本发明提供一种发光二极管绝缘层的制备方法,所述制备方法至少包括以下步骤:In order to achieve the above purpose and other related purposes, the present invention provides a method for preparing an insulating layer of a light-emitting diode, the preparation method at least including the following steps:
1)提供一透明基板,于所述透明基板正面形成至少包括N型层、量子阱层及P型层的发光外延结构;1) Provide a transparent substrate, and form a light-emitting epitaxial structure including at least an N-type layer, a quantum well layer, and a P-type layer on the front of the transparent substrate;
2)于所述发光外延结构及所述透明基板中形成贯穿至所述透明基板一预设深度的V型槽;2) forming a V-shaped groove penetrating through the transparent substrate to a predetermined depth in the light-emitting epitaxial structure and the transparent substrate;
3)刻蚀所述V型槽两侧的P型层、量子阱层及部分的N型层形成N型层平台;3) Etching the P-type layer, quantum well layer and part of the N-type layer on both sides of the V-shaped groove to form an N-type layer platform;
4)形成覆盖于所述V型槽及N型层平台表面的金属层结构;4) forming a metal layer structure covering the surface of the V-shaped groove and the N-type layer platform;
5)于所述V型槽内填充光敏绝缘材料;5) Filling the V-shaped groove with photosensitive insulating material;
6)从所述透明基板的背面对上述结构进行曝光及显影工艺,去除没有被所述金属层结构遮挡的光敏绝缘材料,并保留金属层结构表面的光敏绝缘材料;6) Exposing and developing the above structure from the back of the transparent substrate, removing the photosensitive insulating material not covered by the metal layer structure, and retaining the photosensitive insulating material on the surface of the metal layer structure;
7)对金属层结构表面的光敏绝缘材料进行回流及高温碳化处理,以完成绝缘层的制备。7) Perform reflow and high-temperature carbonization treatment on the photosensitive insulating material on the surface of the metal layer structure to complete the preparation of the insulating layer.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,所述透明基板为蓝宝石衬底,所述N型层为N-GaN层,所述量子阱层为GaN/InGaN多量子阱层,所述P型层为P-GaN层。As a preferred solution of the method for preparing the insulating layer of a light-emitting diode of the present invention, the transparent substrate is a sapphire substrate, the N-type layer is an N-GaN layer, and the quantum well layer is a GaN/InGaN multi-quantum well layer , the P-type layer is a P-GaN layer.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,步骤2)采用感应耦合等离子体ICP刻蚀技术刻蚀出所述V型槽。As a preferred solution of the method for preparing the insulating layer of the light emitting diode of the present invention, step 2) adopts an inductively coupled plasma ICP etching technique to etch the V-shaped groove.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,步骤2)采用感应耦合等离子体ICP刻蚀法刻蚀出所述V型槽。As a preferred solution of the method for preparing the insulating layer of the light emitting diode of the present invention, step 2) adopts an inductively coupled plasma ICP etching method to etch the V-shaped groove.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,步骤2)采用激光打洞技术打出所述V型槽。As a preferred solution of the method for preparing the insulating layer of the light-emitting diode of the present invention, step 2) adopts laser drilling technology to drill the V-shaped groove.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,步骤4)采用溅射法或电镀法形成所述金属层结构。As a preferred solution of the method for preparing the insulating layer of the light emitting diode of the present invention, step 4) adopts a sputtering method or an electroplating method to form the metal layer structure.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,所述金属层结构为Cr、Ti、Al、Ti、Au中的两种或两种以上的合金。As a preferred solution of the method for preparing the insulating layer of a light-emitting diode of the present invention, the structure of the metal layer is an alloy of two or more of Cr, Ti, Al, Ti, and Au.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,所述光敏绝缘材料为正性光刻胶。As a preferred solution of the method for preparing the insulating layer of a light-emitting diode of the present invention, the photosensitive insulating material is a positive photoresist.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,步骤5)采用旋涂法于所述V型槽内填充光敏绝缘材料。As a preferred solution of the method for preparing the insulating layer of the light-emitting diode of the present invention, step 5) fills the V-shaped groove with a photosensitive insulating material by using a spin coating method.
作为本发明的发光二极管绝缘层的制备方法的一种优选方案,所述旋涂法包括以下步骤:a)在上述结构表面涂覆光敏绝缘材料;b)慢速旋转使所述光敏绝缘材料完全填满所述V型槽;c)快速旋转使所述光敏绝缘材料分布均匀。As a preferred solution of the preparation method of the light-emitting diode insulating layer of the present invention, the spin-coating method includes the following steps: a) coating a photosensitive insulating material on the surface of the above structure; b) rotating at a slow speed to make the photosensitive insulating material completely filling the V-groove; c) rotating rapidly to distribute the photosensitive insulating material evenly.
如上所述,本发明提供一种发光二极管绝缘层的制备方法,包括:1)提供一透明基板,于所述透明基板正面形成至少包括N型层、量子阱层及P型层的发光外延结构;2)于所述发光外延结构及所述透明基板中形成贯穿至所述透明基板一预设深度的V型槽;3)刻蚀所述V型槽两侧的P型层、量子阱层及部分的N型层形成N型层平台;4)形成覆盖于所述V型槽及N型层平台表面的金属层结构;5)于所述V型槽内填充光敏绝缘材料;6)从所述透明基板的背面对上述结构进行曝光及显影工艺,去除没有被所述金属层结构遮挡的光敏绝缘材料,并保留金属层结构表面的光敏绝缘材料;7)对金属层结构表面的光敏绝缘材料进行回流及高温碳化处理,以完成绝缘层的制备。本发明提供了一种新型的沟槽型的电极结构,并提供了一种有效制备光敏性绝缘层的方法,步骤简单,有利于节省成本,并提高发光二极管的性能。As mentioned above, the present invention provides a method for preparing an insulating layer of a light-emitting diode, including: 1) providing a transparent substrate, and forming a light-emitting epitaxial structure at least including an N-type layer, a quantum well layer, and a P-type layer on the front of the transparent substrate ; 2) Forming a V-shaped groove penetrating to a preset depth in the transparent substrate in the light-emitting epitaxial structure and the transparent substrate; 3) Etching the P-type layer and the quantum well layer on both sides of the V-shaped groove and part of the N-type layer to form an N-type layer platform; 4) Form a metal layer structure covering the surface of the V-shaped groove and the N-type layer platform; 5) Fill the V-shaped groove with a photosensitive insulating material; 6) From Exposing and developing the above structure on the back of the transparent substrate, removing the photosensitive insulating material that is not blocked by the metal layer structure, and retaining the photosensitive insulating material on the surface of the metal layer structure; 7) photosensitive insulation on the surface of the metal layer structure The material is subjected to reflow and high-temperature carbonization treatment to complete the preparation of the insulating layer. The invention provides a novel groove-type electrode structure, and provides a method for effectively preparing a photosensitive insulating layer with simple steps, which is beneficial to saving costs and improving the performance of a light-emitting diode.
附图说明Description of drawings
图1~2显示为本发明的发光二极管绝缘层的制备方法步骤1)所呈现的结构示意图。1 to 2 show the structural schematic diagrams presented in Step 1) of the method for preparing an insulating layer of a light-emitting diode according to the present invention.
图3显示为本发明的发光二极管绝缘层的制备方法步骤2)所呈现的结构示意图。FIG. 3 shows a schematic structural diagram presented in step 2) of the method for preparing an insulating layer of a light emitting diode according to the present invention.
图4显示为本发明的发光二极管绝缘层的制备方法步骤3)所呈现的结构示意图。FIG. 4 shows a schematic structural view presented in step 3) of the method for preparing an insulating layer of a light emitting diode according to the present invention.
图5显示为本发明的发光二极管绝缘层的制备方法步骤4)所呈现的结构示意图。FIG. 5 shows a schematic structural diagram presented in step 4) of the method for preparing an insulating layer of a light emitting diode according to the present invention.
图6显示为本发明的发光二极管绝缘层的制备方法步骤5)所呈现的结构示意图。FIG. 6 shows a schematic structural view presented in Step 5) of the method for preparing an insulating layer of a light emitting diode according to the present invention.
图7~图8显示为本发明的发光二极管绝缘层的制备方法步骤6)所呈现的结构示意图。7 to 8 are schematic structural diagrams presented in step 6) of the method for preparing an insulating layer of a light-emitting diode according to the present invention.
元件标号说明Component designation description
101 透明基板101 transparent substrate
102 N型层102 N-type layer
103 量子阱层103 quantum well layer
104 P型层104 P-type layer
105 V型槽105 V-groove
106 N型层平台106 N-type layer platform
107 金属层结构107 metal layer structure
108 光敏绝缘材料108 photosensitive insulating material
109 绝缘层109 insulating layer
具体实施方式detailed description
以下通过特定的具体实例说明本发明的实施方式,本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点与应用,在没有背离本发明的精神下进行各种修饰或改变。Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.
请参阅图1~图8。需要说明的是,本实施例中所提供的图示仅以示意方式说明本发明的基本构想,遂图式中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制,其实际实施时各组件的型态、数量及比例可为一种随意的改变,且其组件布局型态也可能更为复杂。Please refer to Figure 1 to Figure 8. It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and the component layout type may also be more complicated.
如图1~图8所示,本实施例提供一种发光二极管绝缘层的制备方法,所述制备方法至少包括以下步骤:As shown in Figures 1 to 8, this embodiment provides a method for preparing an insulating layer of a light-emitting diode, the preparation method at least including the following steps:
如图1~图2所示,首先进行步骤1),提供一透明基板101,于所述透明基板101正面形成至少包括N型层102、量子阱层103及P型层104的发光外延结构。As shown in FIGS. 1-2 , step 1) is first performed, providing a transparent substrate 101 , and forming a light-emitting epitaxial structure at least including an N-type layer 102 , a quantum well layer 103 and a P-type layer 104 on the front of the transparent substrate 101 .
作为示例,所述透明基板101为蓝宝石衬底,可以为平片型的蓝宝石衬底或者图形蓝宝石衬底。当然,也可以为Si衬底、SiC衬底等透明基板101。As an example, the transparent substrate 101 is a sapphire substrate, which may be a flat sapphire substrate or a patterned sapphire substrate. Of course, it may also be a transparent substrate 101 such as a Si substrate or a SiC substrate.
作为示例,采用化学气相沉积法形成所述发光外延结构。As an example, the light emitting epitaxial structure is formed by chemical vapor deposition.
作为示例,所述N型层102为N-GaN层,所述量子阱层103为GaN/InGaN多量子阱层103,所述P型层104为P-GaN层。当然,所述发光外延结构也可以是如GaAs(砷化镓)基、GaP(磷化镓)基、GaAsP(磷砷化镓)基等发光外延结构。As an example, the N-type layer 102 is an N-GaN layer, the quantum well layer 103 is a GaN/InGaN multi-quantum well layer 103 , and the P-type layer 104 is a P-GaN layer. Certainly, the light emitting epitaxial structure may also be GaAs (gallium arsenide) based, GaP (gallium phosphide) based, GaAsP (gallium arsenide phosphide) based and other light emitting epitaxial structures.
如图3所示,然后进行步骤2),于所述发光外延结构及所述透明基板101中形成贯穿至所述透明基板101一预设深度的V型槽105。As shown in FIG. 3 , step 2) is then performed to form a V-shaped groove 105 penetrating through the transparent substrate 101 to a predetermined depth in the light-emitting epitaxial structure and the transparent substrate 101 .
作为示例,首先于所述发光外延结构表面制作光刻掩膜,然后采用感应耦合等离子体ICP刻蚀法刻蚀出所述V型槽105,最后去除所述光刻掩膜。As an example, firstly a photolithography mask is fabricated on the surface of the light-emitting epitaxial structure, then the V-shaped groove 105 is etched by an inductively coupled plasma ICP etching method, and finally the photolithography mask is removed.
作为示例,采用感应耦合等离子体ICP刻蚀技术刻蚀出所述V型槽。As an example, the V-shaped groove is etched by an inductively coupled plasma ICP etching technique.
作为示例,采用激光打洞技术打出所述V型槽。As an example, the V-shaped groove is drilled by laser drilling technology.
优选地,所述预设深度为所述透明基板101厚度的1/4~1/2。Preferably, the preset depth is 1/4˜1/2 of the thickness of the transparent substrate 101 .
如图4所示,接着进行步骤3),刻蚀所述V型槽105两侧的P型层104、量子阱层103及部分的N型层102形成N型层平台106。As shown in FIG. 4 , proceed to step 3) to etch the P-type layer 104 on both sides of the V-shaped groove 105 , the quantum well layer 103 and part of the N-type layer 102 to form an N-type platform 106 .
作为示例,采用ICP刻蚀法刻蚀所述P型层104、量子阱层103及部分的N型层102,以于V型槽105两侧形成用于制备N电极的N型层平台106。As an example, the P-type layer 104 , the quantum well layer 103 and part of the N-type layer 102 are etched by an ICP etching method to form an N-type layer platform 106 for preparing N electrodes on both sides of the V-shaped groove 105 .
如图5所示,然后进行步骤4),形成覆盖于所述V型槽105及N型层平台106表面的金属层结构107。As shown in FIG. 5 , step 4) is then performed to form a metal layer structure 107 covering the surface of the V-shaped groove 105 and the N-type platform 106 .
作为示例,采用溅射法或电镀法形成所述金属层结构107。在本实施例中,采用电镀法形成所述金属层结构107。As an example, the metal layer structure 107 is formed by sputtering or electroplating. In this embodiment, the metal layer structure 107 is formed by electroplating.
作为示例,所述金属层结构107为Cr、Ti、Al、Ti、Au中的两种或两种以上的合金。当然,所述金属层结构107也可以是如W、Ag等其他金属材料。需要说明的是,该金属材料应该对紫外线有较好的阻挡作用,以便于后续的工艺进行。As an example, the metal layer structure 107 is an alloy of two or more of Cr, Ti, Al, Ti, Au. Certainly, the metal layer structure 107 may also be other metal materials such as W and Ag. It should be noted that the metal material should have a good blocking effect on ultraviolet rays, so as to facilitate subsequent processes.
如图6所示,接着进行步骤5),于所述V型槽105内填充光敏绝缘材料108。As shown in FIG. 6 , proceed to step 5) to fill the V-shaped groove 105 with a photosensitive insulating material 108 .
作为示例,所述光敏绝缘材料108为正性光刻胶。As an example, the photosensitive insulating material 108 is positive photoresist.
作为示例,采用旋涂法于所述V型槽105内填充光敏绝缘材料108。As an example, the V-groove 105 is filled with a photosensitive insulating material 108 using a spin coating method.
作为示例,由于所述V型槽105深度较大,而且底部较窄,采用普通的旋涂工艺难以填充至所述V型槽105底部,因此,本发明提供了一种光敏绝缘材料108的旋涂方法,首先,选用较稀的光刻胶或者将光刻胶调至较稀的状态再进行旋涂,所述旋涂法包括以下步骤:a)在上述结构表面涂覆光敏绝缘材料108;b)慢速旋转使所述光敏绝缘材料108完全填满所述V型槽105;c)快速旋转使所述光敏绝缘材料108分布均匀。采用本方法可以有效地将光敏绝缘材料108填满所述V型槽105,提高发光二极管的性能。而且,光敏绝缘材料108与其它的绝缘材料如二氧化硅或氮化硅等相比,其去除工艺十分简单,并不需要在制作光刻掩膜版等,而且光敏绝缘材料108去除时基本对发光外延结构不会造成任何损伤,并且具有非常良好的绝缘效果。As an example, since the V-shaped groove 105 has a large depth and a narrow bottom, it is difficult to fill it to the bottom of the V-shaped groove 105 using a common spin-coating process. Therefore, the present invention provides a spin coating of the photosensitive insulating material 108. Coating method, first, choose a thinner photoresist or adjust the photoresist to a thinner state and then spin coating, the spin coating method includes the following steps: a) coating a photosensitive insulating material 108 on the surface of the above structure; b) slow rotation to make the photosensitive insulating material 108 completely fill the V-shaped groove 105 ; c) fast rotation to make the photosensitive insulating material 108 evenly distributed. This method can effectively fill the V-shaped groove 105 with the photosensitive insulating material 108 and improve the performance of the light emitting diode. Moreover, compared with other insulating materials such as silicon dioxide or silicon nitride, the removal process of the photosensitive insulating material 108 is very simple, and there is no need to make a photolithography mask, and the removal of the photosensitive insulating material 108 is basically The light-emitting epitaxial structure does not cause any damage and has a very good insulating effect.
如图7~图8所示,然后进行步骤6),从所述透明基板101的背面对上述结构进行曝光及显影,去除没被所述金属层结构107遮挡的光敏绝缘材料108,并保留金属层结构107表面的光敏绝缘材料108。As shown in Figures 7 to 8, then proceed to step 6), exposing and developing the above structure from the back of the transparent substrate 101, removing the photosensitive insulating material 108 not covered by the metal layer structure 107, and retaining the metal A photosensitive insulating material 108 on the surface of the layer structure 107 .
作为示例,采用垂直入射的紫外线进行曝光,通过显影后便可以简单地去除没被所述金属层结构107遮挡的光敏绝缘材料108,并保留金属层结构107表面的光敏绝缘材料108。As an example, the photosensitive insulating material 108 not shielded by the metal layer structure 107 can be simply removed after exposure by vertically incident ultraviolet light, and the photosensitive insulating material 108 on the surface of the metal layer structure 107 remains.
最后进行步骤7),对金属层结构107表面的光敏绝缘材料108进行回流及高温碳化处理,以完成绝缘层109的制备。Finally, step 7) is performed to reflow and high-temperature carbonize the photosensitive insulating material 108 on the surface of the metal layer structure 107 to complete the preparation of the insulating layer 109 .
经过回流和高温碳化处理后的光敏绝缘材料108具有较好的绝缘效果和良好的机械强度,可以提高最终发光二极管的性能。The photosensitive insulating material 108 after reflow and high-temperature carbonization treatment has better insulation effect and good mechanical strength, which can improve the performance of the final light-emitting diode.
在后续的工艺过程中,可通过透明基板的减薄将所述V型槽内的金属层结构露出,便可实现P电极和N电极位于发光二极管两侧的电极结构。In the subsequent process, the metal layer structure in the V-shaped groove can be exposed by thinning the transparent substrate, so that the electrode structure in which the P electrode and the N electrode are located on both sides of the light emitting diode can be realized.
综上所述,本发明提供一种发光二极管绝缘层的制备方法,包括:1)提供一透明基板,于所述透明基板正面形成至少包括N型层、量子阱层及P型层的发光外延结构;2)于所述发光外延结构及所述透明基板中形成贯穿至所述透明基板一预设深度的V型槽;3)刻蚀所述V型槽两侧的P型层、量子阱层及部分的N型层形成N型层平台;4)形成覆盖于所述V型槽及N型层平台表面的金属层结构;5)于所述V型槽内填充光敏绝缘材料;6)从所述透明基板的背面对上述结构进行曝光及显影工艺,去除没有被所述金属层结构遮挡的光敏绝缘材料,并保留金属层结构表面的光敏绝缘材料;7)对金属层结构表面的光敏绝缘材料进行回流及高温碳化处理,以完成绝缘层的制备。本发明提供了一种新型的沟槽型的电极结构,并提供了一种有效制备光敏性绝缘层的方法,步骤简单,有利于节省成本,并提高发光二极管的性能。所以,本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。In summary, the present invention provides a method for preparing an insulating layer of a light-emitting diode, including: 1) providing a transparent substrate, and forming a light-emitting epitaxial layer at least including an N-type layer, a quantum well layer, and a P-type layer on the front of the transparent substrate. structure; 2) forming a V-shaped groove penetrating to a preset depth in the transparent substrate in the light-emitting epitaxial structure and the transparent substrate; 3) etching the P-type layer and quantum well on both sides of the V-shaped groove Layer and part of the N-type layer form an N-type layer platform; 4) Form a metal layer structure covering the surface of the V-shaped groove and the N-type layer platform; 5) Fill the V-shaped groove with a photosensitive insulating material; 6) Exposing and developing the above structure from the back of the transparent substrate, removing the photosensitive insulating material that is not blocked by the metal layer structure, and retaining the photosensitive insulating material on the surface of the metal layer structure; 7) photosensitive to the surface of the metal layer structure The insulating material is subjected to reflow and high-temperature carbonization treatment to complete the preparation of the insulating layer. The invention provides a novel groove-type electrode structure, and provides a method for effectively preparing a photosensitive insulating layer with simple steps, which is beneficial to saving costs and improving the performance of a light-emitting diode. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial application value.
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下,对上述实施例进行修饰或改变。因此,举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变,仍应由本发明的权利要求所涵盖。The above-mentioned embodiments only illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical ideas disclosed in the present invention should still be covered by the claims of the present invention.
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