CN104993816B - Voltage-multiplying circuit - Google Patents
Voltage-multiplying circuit Download PDFInfo
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- CN104993816B CN104993816B CN201510465530.8A CN201510465530A CN104993816B CN 104993816 B CN104993816 B CN 104993816B CN 201510465530 A CN201510465530 A CN 201510465530A CN 104993816 B CN104993816 B CN 104993816B
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- pmos tube
- multiplying circuit
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- 230000008878 coupling Effects 0.000 claims description 6
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- 230000005611 electricity Effects 0.000 claims description 4
- 238000012423 maintenance Methods 0.000 claims description 2
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 9
- 239000013078 crystal Substances 0.000 description 3
- 210000001367 artery Anatomy 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 210000003462 vein Anatomy 0.000 description 2
- 101150110971 CIN7 gene Proteins 0.000 description 1
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 1
- 101150110298 INV1 gene Proteins 0.000 description 1
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 1
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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Abstract
A kind of voltage-multiplying circuit, including voltage-regulating circuit, the first thin grid PMOS tube, thin grid NMOS tube cascade the transistor group to be formed and ON-OFF control circuit.The ON-OFF control circuit couples the grid of the first thin grid PMOS tube, and the grid voltage that the first thin grid PMOS tube is maintained suitable for turning on the first thin grid PMOS tube in the trailing edge of the supply voltage, and after the conducting first thin grid PMOS tube is high level.Therefore, the voltage-multiplying circuit realizes thin gate transistor and is used as boosting element instead of traditional thick gate transistor, can reduce the occupied space of transistor.In addition, the voltage-multiplying circuit has the advantages of simple structure and easy realization, the integrated of circuit is also beneficial to.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of voltage-multiplying circuit.
Background technology
In integrated circuit fields, it is often necessary to boost to input voltage, such as the boosted rear twice input of output
The voltage of voltage, develops various voltage-multiplying circuits in the prior art for this.
Fig. 1 is refer to, for a kind of structure diagram of voltage-multiplying circuit in the prior art.The voltage-multiplying circuit of the prior art
In, using thick grid PMOS tube P10 and P20 and thick grid NMOS tube N.Wherein, the thickness of grid oxide layer scope of thick grid metal-oxide-semiconductor
For：6.0nm~20.0nm.
In place of the voltage-multiplying circuit of the prior art comes with some shortcomings, such as due to using thick gate transistor so that circuit
Volume is larger, and integrated for later stage circuit causes a degree of difficulty.Therefore, in supply voltage than in the case of relatively low,
It is a urgent problem that multiplication of voltage, which can be exported, but also reduce the volume of circuit.
The content of the invention
Present invention solves the technical problem that it is the volume for reducing voltage-multiplying circuit.
In order to solve the above technical problems, the embodiment of the present invention provides a kind of voltage-multiplying circuit, including：
Voltage-regulating circuit, couples the power input of the voltage-multiplying circuit, defeated with the power input suitable for exporting
Adjustment voltage of the supply voltage entered there are consistent difference；
First thin grid PMOS tube, it, which drains, couples the output terminal of the voltage-regulating circuit, and source electrode is as times piezoelectricity
The output terminal on road；
Thin grid NMOS tube cascades the transistor group to be formed, a termination first thin grid PMOS tube of the transistor group
Source electrode, other end ground connection；The transistor group is turned on when the supply voltage is high level, is low electricity in the supply voltage
Usually end；
ON-OFF control circuit, couples the grid of the first thin grid PMOS tube, suitable in the trailing edge of the supply voltage
The described first thin grid PMOS tube is turned on, and turns on the grid voltage of the first thin grid PMOS tube of maintenance after the first thin grid PMOS tube
For high level.
Further, ON-OFF control circuit includes impulse generator, and its one end couples the input terminal of the voltage-multiplying circuit, another
End couples the grid of the first thin grid PMOS tube；The impulse generator is suitable for producing arteries and veins in the trailing edge of the supply voltage
Punching.
Impulse generator includes the input terminal and swept resistance that input terminal couples the voltage-multiplying circuit, and output terminal connects phase inverter
Or logic door.
Further, transistor group includes the first thin grid NMOS tube and the second thin grid NMOS tube, the first thin grid NMOS tube
Source electrode connect the source electrode of the described first thin grid PMOS tube, the grounded drain of the second thin grid NMOS tube.
The grid of second thin grid NMOS tube connects the supply voltage.
Further, voltage-regulating circuit includes phase inverter, capacitance and the second thin grid PMOS tube；Phase inverter and the capacitance string
It is coupled between the input terminal of the voltage-multiplying circuit and the source electrode of the thin grid PMOS tube；The source electrode coupling of the second thin grid PMOS tube
Connect the capacitance, drain electrode connect supply voltage, the second thin grid PMOS tube is low level in the output voltage of the voltage-multiplying circuit
When turn on, end when the output voltage of the voltage-multiplying circuit is high level.
The grid of second thin grid PMOS tube connects the output terminal of the voltage-multiplying circuit.
The thickness of grid oxide layer scope of the thin grid PMOS tube and the thin grid NMOS tube is：1.5nm~4.0nm.
Compared with prior art, the technical solution of the embodiment of the present invention has the advantages that：
Replace thick oxygen gate transistor with thin gate transistor in technical solution of the present invention, coupled by ON-OFF control circuit described in
The grid of first thin grid PMOS tube, the first thin grid PMOS tube is turned in the trailing edge of the supply voltage, and described in conducting
The grid voltage that the first thin grid PMOS tube is maintained after first thin grid PMOS tube is high level, and thin grid NMOS is modulated by cascade structure
Transistor group voltage, so that the multiplication of voltage of output supply voltage.Compared with prior art, reduce transistor and take volume, and then
Reduce the volume of voltage-multiplying circuit.
Brief description of the drawings
Fig. 1 is a kind of structure diagram of voltage-multiplying circuit in the prior art；
Fig. 2 is a kind of schematic diagram of voltage-multiplying circuit of the embodiment of the present invention；
Fig. 3 is a kind of structure diagram of voltage-multiplying circuit of the embodiment of the present invention；
Fig. 4 is a kind of structure diagram of the impulse generator of voltage-multiplying circuit of the embodiment of the present invention；
Fig. 5 is a kind of time diagram of each signal of voltage-multiplying circuit of the embodiment of the present invention.
Embodiment
As described in the background art, voltage-multiplying circuit of the prior art is using thick gate transistor so that circuit volume
Take big.
In order to realize the technique effect for the volume for reducing voltage-multiplying circuit, the present invention is by improving circuit structure, using thin grid
Transistor replaces traditional thick gate transistor to be used as boosting element, can reduce the occupied space of transistor.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
Fig. 2 is a kind of schematic diagram of voltage-multiplying circuit of the embodiment of the present invention.
Voltage-multiplying circuit includes, and voltage-regulating circuit 20, the first thin grid PMOS tube P1, thin grid NMOS tube cascade the crystal to be formed
Pipe group 21 and ON-OFF control circuit 22.
Wherein, voltage-regulating circuit 20, couple the power input of voltage-multiplying circuit, are inputted suitable for output and power input
Supply voltage there are consistent difference adjustment voltage.
First thin grid PMOS tube P1, the output terminal of its coupling voltage-regulating circuit that drains, source electrode is as the defeated of voltage-multiplying circuit
Outlet.
Thin grid NMOS tube cascades the transistor group 21 to be formed, the source of a first thin grid PMOS tube P1 of termination of transistor group
Pole, other end ground connection.The transistor group 21 is turned on when the supply voltage is high level, is low electricity in the supply voltage
Usually end；
22 one end of ON-OFF control circuit couples the input terminal of voltage-multiplying circuit, and the other end couples the grid of the first thin grid PMOS tube P1
Pole.ON-OFF control circuit 22 is suitable for turning on the first thin grid PMOS tube P1 in the trailing edge of the supply voltage, and turns on institute
It is high level to state and the grid voltage of the first thin grid PMOS tube is maintained after the first thin grid PMOS tube.
In the voltage-multiplying circuit, when the supply voltage of input is high level, the transistor group 21 turns on；Described first
Thin grid PMOS tube P1 cut-offs, the output voltage of the voltage-multiplying circuit is low level.
When the supply voltage of input is converted to low level from high level, the transistor group 21 is ended；In supply voltage
Trailing edge, it is low level that ON-OFF control circuit 22, which controls the grid voltage of the described first thin grid PMOS tube, to turn on described
One thin grid PMOS tube P1, the output voltage of the voltage-multiplying circuit are converted to high level therewith.It is described first thin due to needing to maintain
The normal work of grid PMOS tube P1, after the thin grid PMOS tube P1 is turned on, the ON-OFF control circuit 22 maintains first therewith
The grid voltage of thin grid PMOS tube is high level.
Since transistor group 21 includes thin grid NMOS tube, cascade structure is used, to ensure each thin equal work of grid NMOS tube
Make in its pressure-resistant scope.
Wherein, the thickness of grid oxide layer scope of the thin grid PMOS tube and the thin grid NMOS tube is：1.5nm~
4.0nm。
Fig. 3 is a kind of structure diagram of voltage-multiplying circuit of the embodiment of the present invention.
Voltage-multiplying circuit includes voltage-regulating circuit 20, the first thin grid PMOS tube P1, thin grid NMOS tube and cascades the crystal to be formed
Pipe group 21 and ON-OFF control circuit 22.
Specifically, voltage-regulating circuit 20 includes the thin grid PMOS tube P2 of phase inverter INV1, capacitance C and second；Phase inverter INV
And capacitance C is series between the input terminal of voltage-multiplying circuit and the source electrode of the second thin grid PMOS tube P2；Second thin grid PMOS tube
The source electrode coupling capacitance C of P2, drain electrode meet supply voltage VDD.
The grid of second thin grid PMOS tube P2 connects the output terminal of voltage-multiplying circuit.
The ON-OFF control circuit 22 includes impulse generator PB.
The impulse generator PB can be realized using existing pulse-generating circuit.
In the lump with reference to Fig. 4, such as the input terminal and swept resistance R of or logic door NOR input terminals coupling voltage-multiplying circuit, output
Terminate phase inverter INV2 to form, also have other alternative embodiments in addition, the embodiment of the present invention is without limitation.
Transistor group 21 includes the first thin thin grid NMOS tube N2 of grid NMOS tube N1 and second, the source of the first thin grid NMOS tube N1
Pole connects the source electrode of the first thin grid PMOS tube P1, the grounded drain of the second thin grid NMOS tube N2.
The grid of second thin grid NMOS tube N2 connects supply voltage.
For convenience of description, the signal that ON-OFF control circuit exports is labeled as PB, by the signal post of voltage-multiplying circuit input terminal
IN is denoted as, the signal of output terminal is labeled as OUT.
It is a kind of time diagram of each signal of voltage-multiplying circuit of the embodiment of the present invention such as Fig. 5.Combine in the lump below
Fig. 3 and Fig. 5 are described in further details.
Input signal IN is the square-wave signal that the low level of rule is 0V and high level is VDD, wherein,
When input signal IN is high level, the impulse generator PB output high level of ON-OFF control circuit 22, the first thin grid
PMOS tube P1 ends, the second thin grid NMOS tube N2 conductings of grid coupling input signal, and the first thin grid PMOS tube P1 drain electrode ends are defeated
Go out the low level signal OUT identical with the second thin grid NMOS tube N2 source voltages.
Meanwhile the second thin grid PMOS tube P2 conducting so that the source voltage of the first thin grid PMOS tube P1 is VDD, and first is thin
Grid PMOS tube P1's appoints the two poles of the earth voltage difference to be no more than VDD.
Low level trailing edge is changed into from high level in input signal IN, by the phase inverter in voltage-regulating circuit 20
INV and capacitance C so that the drain voltage of the second thin grid PMOS tube P2 is 2VDD.
Meanwhile the impulse generator PB output low level pulse signals of ON-OFF control circuit 22, the first thin grid PMOS tube P1
Conducting, drain electrode end export the high level signal OUT identical with the drain voltage of the second thin grid PMOS tube P2.
The first thin grid PMOS is maintained after the first thin grid PMOS tube P1 of impulse generator PB output low level pulse signal conductions
The grid voltage of pipe P1 is high level VDD so that the first thin grid PMOS tube P1's appoints the two poles of the earth voltage difference to be no more than VDD.
Simultaneously because the cascade of the 21 first thin grid NMOS tube N2 of thin grid NMOS tube N1 and second of transistor group so that each crystal
Tube voltage is VDD, no more than its pressure-resistant scope.
Alternatively, the magnitude of voltage at the A points of pulse signal PB is 0-0.3V.Magnitude of voltage at the A points is the first thin grid
The receiving voltage value of PMOS tube P1 grids.
Technical solution provided by the invention produces arteries and veins by the thin grid NMOS tube and ON-OFF control circuit for setting cascaded structure
The mode of punching controls the grid end of thin grid PMOS tube, realizes thin gate transistor and is used as boosting element instead of traditional thick gate transistor,
Substantially reduce the occupied space of transistor.In addition, the present invention provides having the advantages of simple structure and easy realization for circuit, electricity is also beneficial to
Road integrates.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, are not departing from this
In the spirit and scope of invention, it can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the scope of restriction.
Claims (8)
- A kind of 1. voltage-multiplying circuit, it is characterised in that including：Voltage-regulating circuit, couples the power input of the voltage-multiplying circuit, suitable for exporting and power input input Adjustment voltage of the supply voltage there are consistent difference；First thin grid PMOS tube, it, which drains, couples the output terminal of the voltage-regulating circuit, and source electrode is as the voltage-multiplying circuit Output terminal；Thin grid NMOS tube cascades the transistor group to be formed, the source of a termination first thin grid PMOS tube of the transistor group Pole, other end ground connection；The transistor group is turned on when the supply voltage is high level, is low level in the supply voltage When end；ON-OFF control circuit, couples the grid of the first thin grid PMOS tube, suitable for being turned in the trailing edge of the supply voltage The first thin grid PMOS tube, and the grid voltage of the first thin grid PMOS tube of maintenance is height after the conducting first thin grid PMOS tube Level.
- 2. voltage-multiplying circuit according to claim 1, it is characterised in that the ON-OFF control circuit includes impulse generator, Its one end couples the input terminal of the voltage-multiplying circuit, and the other end couples the grid of the first thin grid PMOS tube；The pulse hair Raw device is suitable for producing pulse in the trailing edge of the supply voltage.
- 3. voltage-multiplying circuit according to claim 2, it is characterised in that the impulse generator is included described in input terminal coupling The input terminal and swept resistance of voltage-multiplying circuit, output terminal connect the or logic door of phase inverter.
- 4. voltage-multiplying circuit according to claim 1, it is characterised in that the transistor group include the first thin grid NMOS tube and Second thin grid NMOS tube, the source electrode of the first thin grid NMOS tube connect the source electrode of the described first thin grid PMOS tube, and described second is thin The grounded drain of grid NMOS tube.
- 5. voltage-multiplying circuit according to claim 4, it is characterised in that the grid of the second thin grid NMOS tube connects the electricity Source voltage.
- 6. voltage-multiplying circuit according to claim 1, it is characterised in that the voltage-regulating circuit includes phase inverter, capacitance With the second thin grid PMOS tube；The phase inverter and capacitance are series at the input terminal of the voltage-multiplying circuit and the second thin grid PMOS Between the source electrode of pipe；The source electrode of the second thin grid PMOS tube couples the capacitance, drain electrode connects supply voltage, the second thin grid PMOS tube is turned on when the output voltage of the voltage-multiplying circuit is low level, is high level in the output voltage of the voltage-multiplying circuit When end.
- 7. voltage-multiplying circuit according to claim 6, it is characterised in that the grid of the second thin grid PMOS tube connects described times The output terminal of volt circuit.
- 8. according to any voltage-multiplying circuits of claim 1-3, it is characterised in that the thin grid PMOS tube and the thin grid The thickness of grid oxide layer scope of NMOS tube is：1.5nm~4.0nm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510465530.8A CN104993816B (en) | 2015-07-31 | 2015-07-31 | Voltage-multiplying circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510465530.8A CN104993816B (en) | 2015-07-31 | 2015-07-31 | Voltage-multiplying circuit |
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| Publication Number | Publication Date |
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| CN104993816A CN104993816A (en) | 2015-10-21 |
| CN104993816B true CN104993816B (en) | 2018-04-27 |
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| CN201510465530.8A Active CN104993816B (en) | 2015-07-31 | 2015-07-31 | Voltage-multiplying circuit |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106787691B (en) * | 2017-01-06 | 2019-08-27 | 上海华虹宏力半导体制造有限公司 | Charge pump circuit, charge pump system and memory |
| CN107634647B (en) * | 2017-09-26 | 2020-04-10 | 上海华虹宏力半导体制造有限公司 | Voltage multiplying circuit |
| CN107612317A (en) * | 2017-09-26 | 2018-01-19 | 上海华虹宏力半导体制造有限公司 | A kind of charge pump circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1221257A (en) * | 1997-12-24 | 1999-06-30 | 日本电气株式会社 | Static latch circuits and static logic circuits |
| US6731156B1 (en) * | 2003-02-07 | 2004-05-04 | United Memories, Inc. | High voltage transistor protection technique and switching circuit for integrated circuit devices utilizing multiple power supply voltages |
| CN1992489A (en) * | 2005-12-27 | 2007-07-04 | 株式会社半导体能源研究所 | Charge pump circuit and semiconductor device having the same |
| CN102843123A (en) * | 2012-08-31 | 2012-12-26 | 电子科技大学 | High-voltage driving circuit |
-
2015
- 2015-07-31 CN CN201510465530.8A patent/CN104993816B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1221257A (en) * | 1997-12-24 | 1999-06-30 | 日本电气株式会社 | Static latch circuits and static logic circuits |
| US6731156B1 (en) * | 2003-02-07 | 2004-05-04 | United Memories, Inc. | High voltage transistor protection technique and switching circuit for integrated circuit devices utilizing multiple power supply voltages |
| CN1992489A (en) * | 2005-12-27 | 2007-07-04 | 株式会社半导体能源研究所 | Charge pump circuit and semiconductor device having the same |
| CN102843123A (en) * | 2012-08-31 | 2012-12-26 | 电子科技大学 | High-voltage driving circuit |
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| CN104993816A (en) | 2015-10-21 |
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