CN105185415A - Method and device for testing EEPROM of I2C - Google Patents
Method and device for testing EEPROM of I2C Download PDFInfo
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Abstract
The invention discloses a method for testing EEPROM of I2C. The method includes the steps that S2, test data are loaded; S3, the test data are written into EEPROM; S4, data of EEPROM are read; S5, whether the test data and the read data are the same or not is found through comparison; S6, when the comparison result shows that the test data and the read data are the same, the test result shows pass; S7, when the comparison result shows that the test data and the read data are different, the test result shows fail. By means of the method and a device for testing I2C EEPROM, one or more I2C EEPROM rapid tests are achieved, test and maintenance personnel can conveniently and rapidly test EEPROM applied to related electronic devices, and the method and the device have the advantages that time is saved, efficiency is improved, and accuracy and convenience are achieved.
Description
Technical field
The present invention relates to the method for testing of EEPROM field tests, particularly I2CEEPROM.
Background technology
To be PHILIPS company be I2C bus effectively realizes the simple two-way two-wire bus of one that the control between electron device develops, it be a kind of twin wire at a high speed, full duplex, synchronous communication universal serial bus, for connecting microcontroller and peripherals thereof.In the I2C bus protocol of standard, its physical link is a serial data line (SDA) and a serial time clock line (SCL) respectively.Due to advantages such as it are simple, flexible, hardware pins resource is few, have a wide range of applications in the communication between device and device.Now, I2C bus has become an international standard, and the IC integrated circuit different more than 100 kinds realizes, and application relates to the various fields such as household electrical appliances, communication, control, is particularly used widely in ARM embedded system development.
EEPROM full name is Electrically Erasable Read Only Memory, belongs to a kind of general designation of storer, and the feature of this storer stores data can directly wipe with electric signal, and also a capable telecommunications number write stores data.Because the reliability of EEPROM is high, Structure and energy is complicated, and cost is high, and the capacity of conventional EEPROM is usually less.
In the electronic equipment that Ethernet switch etc. is commonly used, need to use EEPROM, conventional EEPROM adopts I2C Data Transport Protocol, and capacity is generally 1kbit, 2kbit, 4kbit, 8kbit or 16kbit, and the data message that EEPROM stores is embedded system master data information.
At present, lack the method for testing fast and effectively for conventional I2CEEPROM, once certain EEPROM in whole equipment or system damages, then system may job insecurity or cannot normally work, and plant maintenance personnel need cost plenty of time investigation equipment failure reason.
Summary of the invention
For the problems referred to above, technical scheme provided by the invention is as follows:
A method of the EEPROM of test I 2C, comprising: step S2 loads test data; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through.
The present invention also provides the method for the EEPROM of another kind of test I 2C, comprising: step S2 loads test data; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through; Whether S8 tests by the gross according to completing, and returns step S3.
The present invention also provides the method for the EEPROM of another kind of test I 2C, comprising: step S2 loads test data; S25 selects the address of an EEPROM to be measured in EEPROM multiple to be measured by the gross; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through; Whether S8 tests by the gross according to completing, and returns step S3.
The present invention also provides the method for the EEPROM of another kind of test I 2C, comprising: step S1, according to the encapsulated type of EEPROM, connects EEPROM to be tested; Described EEPROM encapsulated type is MSOP-8, PDIP-8, SOIC-8 or TSSOP-8; Step S2 loads test data; S25 selects the address of an EEPROM to be measured in EEPROM multiple to be measured by the gross; Test data is write EEPROM by S3; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through; Whether S8 tests by the gross according to completing, and returns step S3.
The present invention also provides the method for the EEPROM of another kind of test I 2C, comprising: step S1, according to the encapsulated type of EEPROM, connects EEPROM to be tested; Described EEPROM encapsulated type is MSOP-8, PDIP-8, SOIC-8 or TSSOP-8; S2 loads test data; S25 selects the address of an EEPROM to be measured in EEPROM multiple to be measured by the gross; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through; S75 when described test result be by time, light LED alarm lamp; When described test result is obstructed out-of-date, maintain LED alarm lamp and extinguish; Whether S8 tests by the gross according to completing, and returns step S3.
The present invention also provides the test controller of the EEPROM of a kind of I2C, and described test controller comprises: Data import module, is loaded into test controller by test data; Data read-write module, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through.
The present invention also provides the test controller of the EEPROM of a kind of I2C, and described test controller comprises: Data import module, is loaded into test controller by test data; Data read-write module, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through; Batch control module, is electrically connected with described data read-write module, described Data Comparison module, has judged whether to test by the gross.
The present invention also provides the test controller of the EEPROM of a kind of I2C, and described test controller comprises: Data import module, is loaded into test controller by test data; Data read-write module, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through; Batch control module, is electrically connected with described data read-write module, described Data Comparison module, has judged whether to test by the gross; Addressed module, is electrically connected with described data read-write module, a batch control module, according to the address of EEPROM to be measured, determines an EEPROM to be tested in multiple EEPROM by the gross.
The present invention also provides the proving installation of the EEPROM of a kind of I2C, and comprise test controller, at least one test bench, I2C bus, described test controller comprises: Data import module, is loaded into test controller by test data; Data read-write module, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through; Batch control module, is electrically connected with described data read-write module, described Data Comparison module, has judged whether to test by the gross; Addressed module, is electrically connected with described data read-write module, a batch control module, according to the address of EEPROM to be measured, determines an EEPROM to be tested in multiple EEPROM by the gross; At least one test bench described, is electrically connected respectively with EEPROM by the gross to be tested, and the socket form of described test bench adapts to MSOP-8, PDIP-8, SOIC-8 or TSSOP-8 encapsulated type; Described I2C bus, is electrically connected with at least one test bench described, described test controller.
The present invention also provides the proving installation of the EEPROM of a kind of I2C, and comprise test controller, at least one test bench, I2C bus, at least one LED, described test controller comprises: Data import module, is loaded into test controller by test data; Data read-write module, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through; Batch control module, is electrically connected with described data read-write module, described Data Comparison module, has judged whether to test by the gross; Addressed module, is electrically connected with described data read-write module, a batch control module, according to the address of EEPROM to be measured, determines an EEPROM to be tested in multiple EEPROM by the gross; At least one test bench described, is electrically connected respectively with EEPROM by the gross to be tested, and the socket form of described test bench adapts to MSOP-8, PDIP-8, SOIC-8 or TSSOP-8 encapsulated type; Described I2C bus, is electrically connected with at least one test bench described, described test controller; At least one LED, is electrically connected with the Data Comparison module of described test controller; Whether the Data Comparison module of described test controller is passed through according to test result, light/or extinguish the LED corresponding with current EEPROM to be tested.
The invention provides method of testing and the device of a kind of I2CEEPROM, achieve the quick test of one or more I2CEEPROM, facilitate tester and maintainer tests the EEPROM be applied on associated electronic device fast, possess save time, raise the efficiency, the accurate advantage such as convenient.
Accompanying drawing explanation
Below by clearly understandable mode, accompanying drawings preferred implementation, is further described the above-mentioned characteristic of the method for the EEPROM of a kind of test I 2C and device, technical characteristic, advantage and implementation thereof.
Fig. 1 is the key step schematic diagram of the method for the EEPROM of a kind of test I 2C of the present invention;
Fig. 2 is the main composition structural representation of the test controller of the EEPROM of a kind of I2C of the present invention;
Fig. 3 be the proving installation of the EEPROM of a kind of I2C of the present invention be fully composed structural representation;
Fig. 4 is the entire protocol schematic diagram of the method for the EEPROM of a kind of test I 2C of the present invention;
Device label declaration:
100 test controllers, 110 Data import modules, 120 data read-write module, 130 Data Comparison modules, 140 batches of control modules, 150 addressed module, 200I2C bus, 300 test benches, 400LED lamp.
Embodiment
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, contrast accompanying drawing is illustrated the specific embodiment of the present invention below.Apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings, and obtain other embodiment.
For making simplified form, only schematically show part related to the present invention in each figure, they do not represent its practical structures as product.In addition, be convenient to make simplified form understand, there are the parts of identical structure or function in some figure, only schematically depict one of them, or only marked one of them.In this article, " one " not only represents " only this ", also can represent the situation of " more than one ".
Fig. 1 is the key step schematic diagram of the method for the EEPROM of a kind of test I 2C of the present invention.As shown in Figure 1, the method for the EEPROM of a kind of test I 2C, comprising: step S2 loads test data; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through.
Concrete, I2CEEPROM to be tested in the present embodiment belongs to a series of, its capacity is defined as 1kbit, 2kibt, 4kibt, 8kibit or 16kibt, I2CEEPROM to be tested may be previously used or not be previously used, the storing data information that this means tape test EEPROM is not what determine, the object of test determines that any one byte of EEPROM to be tested all can be written into, and the test data having write the data of the EEPROM of rear reading and write is completely the same.
Improve above-described embodiment, an alternative embodiment of the invention comprises: step S2 loads test data; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through; Whether S8 tests by the gross according to completing, and returns step S3.
In the present embodiment, suppose that multiple I2CEEPROM to be tested have identical capacity, then the EEPROM of same batch of test can be one or more, a concrete batch of testable EEPROM number is relevant with I2C bus to its capacity: if EEPROM capacity is 1kbit or 2kbit, can test at most 8 I2CEEPROM for same batch; If EEPROM capacity is 4kibt, 4 I2CEEPROM can be tested at most for same batch; If EEPROM capacity is 8kbit, 2 I2CEEPROM can be tested at most for same batch; If EEPROM capacity is 16kbit, 1 I2CEEPROM can be tested at most for same batch, in test process, when an EEPROM is tested complete, after obtaining a test result, judge whether having completed same batch of test job, if do not complete, then test the next one of same batch, if complete, finish test procedure.
Improve above-described embodiment, an alternative embodiment of the invention comprises: step S2 loads test data; S25 selects the address of an EEPROM to be measured in EEPROM multiple to be measured by the gross; Test data is write EEPROM by S3; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through; Whether S8 tests by the gross according to completing, and returns step S3.
In the present embodiment, when same batch of EEPROM to be tested is more than one, multiple EEPROM to be tested are connected simultaneously, now for multiple EEPROM distributes different addresses for identifying, the one or more binary digit in address represents, concrete: when EEPROM capacity is 1kbit or 2kibt, now tests 8 at most, address triad is 000,001,010,011,100,101,110,111; When EEPROM capacity is 4kbit, test 4 at most, two scale-of-two in address are 00,01,10,11; When EEPROM capacity is 8kbit, test 2 at most, the scale-of-two in address is 0,1; In a certain test duration section, reading or the write of data are only relevant to the EEPROM of assigned address, and employing binary digit is the first character joint in order to address being placed on test data, identifies the EEPROM specified before being convenient to write data.
Improve above-described embodiment, an alternative embodiment of the invention comprises: step S1, according to the encapsulated type of EEPROM, connects EEPROM to be tested; Described EEPROM encapsulated type is MSOP-8, PDIP-8, SOIC-8 or TSSOP-8; S2 loads test data; S25 selects the address of an EEPROM to be measured in EEPROM multiple to be measured by the gross; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through.Whether S8 tests by the gross according to completing, and returns step S3.
In the present embodiment, I2CEEPROM to be tested has different encapsulating structure, include but not limited to MSOP-8, PDIP-8, SOIC-8, TSSOP-8, this several encapsulating structure is each four pin configuration in both sides and the definition of the function of the pin of different encapsulating structure meets I2C agreement, difference is that the I2CEEPROM of different encapsulating structure has different volumes and pin shapes, this is to adapt to different applied environments, in order to test the I2CEEPROM of different encapsulating structure, need the physical arrangement matched with these encapsulated types, for EEPROM provides reliable physical carrier and electrical connection function.
Improve above-described embodiment, an alternative embodiment of the invention comprises: step S1, according to the encapsulated type of EEPROM, connects EEPROM to be tested; Described EEPROM encapsulated type is MSOP-8, PDIP-8, SOIC-8 or TSSOP-8; S2 loads test data; S25 selects the address of an EEPROM to be measured in EEPROM multiple to be measured by the gross; Test data is write EEPROM by S3; S4 reads the data of EEPROM; Whether S5 contrast test data are identical with the data of reading; S6 is when the coming to the same thing of comparison, and test result is for passing through; S7 is when the result of comparison is different, and test result is not passed through; S75 when described test result be by time, light LED alarm lamp; When described test result is obstructed out-of-date, maintain LED alarm lamp and extinguish; Whether S8 tests by the gross according to completing, and returns step S3.
In the present embodiment, LED acquiescence is in OFF state, if the test result of an EEPROM is not passed through, maintains the OFF state of LED; If test result is for passing through, light the LED corresponding with tested EEPROM, like this, after the test of batch completes, test result notifies the external world in the mode of LED different operating state.
Fig. 2 is the main composition structural representation of the test controller of the EEPROM of a kind of I2C.An alternative embodiment of the invention, test controller, comprising: Data import module 110, is loaded into test controller by test data; Data read-write module 120, is electrically connected with described Data import module 110, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module 130, be electrically connected with described Data import module 110, data read-write module 120, data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through.
In the present embodiment, test controller is micro-control unit (MicrocontrollerUnit) normally, also can be SOC (system on a chip) (systemonchip), its inner integrated morphology mainly comprises processor (CPU), storer (ROM, RAM), counter, I/O port etc., the inner each module of described test controller might not be the actual physical arrangement that has or unit, but with functional realiey model split, described Data import module 110, that CPU reads the data of ROM and write RAM, described data read-write module 120, the data of CPU reading and writing internal storer, also can be that internal storage carries out read-write operation by I/O interface and external memory storage, described comparing module 130, for the master data processing power that CPU possesses.
Fig. 3 be the proving installation of the EEPROM of a kind of I2C be fully composed structural representation.Above-described embodiment is improved, as shown in Figure 3, an alternative embodiment of the invention, test controller, comprising: Data import module 110, is loaded into test controller by test data; Data read-write module 120, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module 130, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through; Batch control module 140, is electrically connected with described data read-write module, described Data Comparison module, has judged whether to test by the gross.
In the present embodiment, test controller one batch testable EEPROM number can be more than one, concrete number can be 8,4,2,1 according to the capacity of EEPROM, thus the same batch of EEPROM number be connected with test controller is indefinite, when the test job of each batch starts, batch control module 140 detects the number of the EEPROM be electrically connected with described test controller, when having tested number and being identical with the EEPROM number detected, a batch control module notice test controller has quit work.
Above-described embodiment is improved, as shown in Figure 3, an alternative embodiment of the invention, test controller, comprising: Data import module 110, is loaded into test controller by test data; Data read-write module 120, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module 130, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through; Batch control module 140, is electrically connected with described data read-write module, described Data Comparison module, has judged whether to test by the gross; Addressed module 150, is electrically connected with described data read-write module, a batch control module, according to the address of EEPROM to be measured, determines an EEPROM to be tested in multiple EEPROM by the gross.
In the present embodiment, when the EEPROM being simultaneously connected to batch of test controller is multiple, multiple EEPROM can be distinguished to make test controller, be convenient to test result corresponding with current tested EEPROM, for multiple EEPROM of to be tested batch specify different address, specific address is depending on the capacity of EEPROM to be tested, assuming that its capacity is known (capacity can be learnt from the naming rule of EEPROM), distribute one one, two, or triad address, address writes on the beginning of test data, test controller utilizes addressed module 150 to find the EEPROM specified, namely reading and writing data only can occur between test controller and the EEPROM possessing assigned address, achieve the differentiation of multiple EEPROM.
Above-described embodiment is improved, as shown in Figure 3, an alternative embodiment of the invention, the proving installation of the EEPROM of a kind of I2C, comprise test controller 100, at least one test bench 200, I2C bus 300, described test controller 100 comprises: Data import module, is loaded into test controller by test data; Data read-write module, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through; Batch control module, is electrically connected with described data read-write module, described Data Comparison module, has judged whether to test by the gross; Addressed module, is electrically connected with described data read-write module, a batch control module, according to the address of EEPROM to be measured, determines an EEPROM to be tested in multiple EEPROM by the gross; At least one test bench 200 described, is electrically connected respectively with EEPROM by the gross to be tested, and the socket form of described test bench adapts to MSOP-8, PDIP-8, SOIC-8 or TSSOP-8 encapsulated type; Described I2C bus 300, is electrically connected with at least one test bench described, described test controller.
In the present embodiment, test bench 200 provides reliable physical carrier and electrical connection for EEPROM to be tested, the encapsulated type that EEPROM to be tested may adopt comprises MSOP-8, PDIP-8, SOIC-8, or TSSOP-8, size and the stitch of the EEPROM of different encapsulated type have certain difference, thus the socket form of test bench 200 should adapt to from different encapsulated types, concrete, it can be the stitch of the compatible multiple encapsulated type of a kind of socket form on a test bench, also can be a test bench has multiple different socket form selective, also can be a test bench only has a kind of socket and only for a kind of EEPROM of encapsulated type, in a word, object is the measurement utilizing test bench to realize the I2CEEPROM of different encapsulated type.
In the present embodiment, the address of multiple EEPROM arranges and is completed by test bench 200, socket corresponding with the address pins of EEPROM on test bench can be set to high level or ground connection, such as, EEPROM capacity to be tested is 2kbit, EEPROM default allocation address 000 then on first test bench, socket corresponding with three address pin on test bench is all set to ground connection, the eeprom address being then positioned at this test bench is 000, and test controller uses address 000 to carry out data communication with the EEPROM on this test bench.
Improve above-described embodiment, as shown in Figure 3, an alternative embodiment of the invention, comprises test controller 100, at least one test bench 200, I2C bus 300, at least one LED 400.Described test controller 100 comprises: Data import module, is loaded into test controller by test data; Data read-write module, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM; Data Comparison module, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through; Batch control module, is electrically connected with described data read-write module, described Data Comparison module, has judged whether to test by the gross; Addressed module, is electrically connected with described data read-write module, a batch control module, according to the address of EEPROM to be measured, determines an EEPROM to be tested in multiple EEPROM by the gross; At least one test bench 200 described, is electrically connected respectively with EEPROM by the gross to be tested, and the socket form of described test bench adapts to MSOP-8, PDIP-8, SOIC-8 or TSSOP-8 encapsulated type; Described I2C bus 300, is electrically connected with at least one test bench described, described test controller; At least one LED 400 described, is electrically connected with the Data Comparison module of described test controller; Whether the Data Comparison module of described test controller is passed through according to test result, light/or extinguish the LED corresponding with current EEPROM to be tested.
In the present embodiment, test controller is in parallel with multiple LED, the operating voltage that can control each LED makes it be in different duties, LED acquiescence is in the duty of extinguishing, when test controller produces a test result, if test result is not for pass through, then do not change the duty of corresponding LED, if test result is for passing through, the duty that the operating voltage changing corresponding LED makes it be in light, tester learns the test result of the EEPROM on corresponding test bench by the duty of observing LED.
Fig. 4 is the entire flow figure of the method for the EEPROM of a kind of test I 2C.Detailed step of the present invention is introduced in conjunction with process flow diagram.
S1 selects test bench.S2 loads test data.S25 selects EEPROM.Test data is write EEPROM to be tested by S3 test controller.S4 reads the data of write EEPROM.S5, by the data of reading and test data comparison, judges whether identical; If so, perform step S75 and light corresponding LED, and perform next step S8; Otherwise, perform next step S8.S8 has judged whether a batch test; If so, test is stopped; Otherwise, return step S3.
It should be noted that above-described embodiment all can independent assortment as required.The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (10)
1. a method of the EEPROM of test I 2C, is characterized in that, comprises step:
S2: load test data;
S3: test data is write EEPROM;
S4: the data reading EEPROM;
S5: whether contrast test data are identical with the data of reading;
S6: when the coming to the same thing of comparison, test result is for passing through;
S7: when the result of comparison is different, test result is not passed through.
2. whether the method for the EEPROM of test I 2C as claimed in claim 1, is characterized in that, also comprise step: S8: testing by the gross according to completing, returning step S3.
3. the method for the EEPROM of test I 2C as claimed in claim 2, is characterized in that, before step S3, also comprise step: S25: the address selecting an EEPROM to be measured in EEPROM multiple to be measured by the gross.
4. the method for the EEPROM of test I 2C as described in claim 1-3 any one claim, is characterized in that, also comprise step: S1: according to the encapsulated type of EEPROM, connect EEPROM to be tested; Described EEPROM encapsulated type is MSOP-8, PDIP-8, SOIC-8 or TSSOP-8.
5. the method for the EEPROM of test I 2C as claimed in claim 4, is characterized in that, after step s 7, also comprise step: S75 when described test result for by time, light LED alarm lamp; When described test result is obstructed out-of-date, maintain LED alarm lamp and extinguish.
6. a test controller of the EEPROM of I2C, is characterized in that, comprising:
Data import module, is loaded into test controller by test data;
Data read-write module, is electrically connected with described Data import module, the test data being loaded into test controller is write EEPROM to be measured, and reads the data of write EEPROM;
Data Comparison module, is electrically connected with described Data import module, data read-write module, and data Data import module loading being entered the write EEPROM that the test data of test controller and data read-write module read contrast, and judge whether test is passed through.
7. a test controller of the EEPROM of I2C as claimed in claim 6, is characterized in that, also comprise: batch control module, be electrically connected, judged whether to test by the gross with described data read-write module, described Data Comparison module.
8. the test controller of the EEPROM of I2C as claimed in claim 7, it is characterized in that, also comprise: addressed module, be electrically connected with described data read-write module, a batch control module, according to the address of EEPROM to be measured, in multiple EEPROM by the gross, determine an EEPROM to be tested.
9. a proving installation of the EEPROM of I2C, is characterized in that, comprising: the test controller of the EEPROM of the I2C as described in as arbitrary in claim 6-8; At least one test bench, is electrically connected respectively with EEPROM by the gross to be tested; I2C bus, is electrically connected with at least one test bench described, described test controller; Wherein, the socket form of described test bench adapts to MSOP-8, PDIP-8, SOIC-8 or TSSOP-8 encapsulated type.
10. a proving installation of the EEPROM of I2C as claimed in claim 9, is characterized in that, the proving installation of the EEPROM of described I2C also comprises: at least one LED, is electrically connected with the Data Comparison module of the test controller of the EEPROM of described I2C; Whether described contrast module is passed through according to test result, light/or extinguish the LED corresponding with current EEPROM to be tested.
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