CN100380282C - Power saving method and system for CPU - Google Patents

Abstract

The invention relates to a method and a system for saving power of a central processing unit, which are used for enabling the central processing unit to leave the dormant state which can not peep an event and enter a processing state of an executable instruction and a system management mode when the central processing unit is in the dormant state which can not peep the event and a peripheral device sends an event required by a bus master controller; then, an arbiter is started to transmit the bus master request event to the CPU for processing. When the CPU finishes processing the event requested by the bus master, the arbiter is turned off and a system management interrupt program is executed to drive the CPU to resume entering the sleep state where the event cannot be snooped, thereby achieving the purpose of saving power.

Description

Power saving method and system for central processing unit

technical field

The invention relates to a method and system for saving power, in particular to a method and system for saving power of a central processing unit, so as to save the power of the central processing unit.

Background technique

Along with the advancement of computer (computer) system technology, the function that computer system possesses is more and more powerful and comprehensive, and because of this, it brings quite a lot of convenience to the people today. Today's computer systems are not only able to help people handle affairs but also provide people with entertainment because they have developed towards the direction of multimedia services. Nowadays, the functions of computer systems are becoming more and more powerful and comprehensive, and the processing speed of the central processing unit is also increasing day by day, so the power consumed by the central processing unit is also increasing day by day, which is an important issue for portable computers that must be powered by batteries. Because the power consumption of the battery will relatively reduce the use time of the portable computer, this will affect the use of the portable computer by the users.

Based on the above reasons, today’s computer systems are equipped with power management systems. The commonly used power management systems today include Advanced Power Management (APM) and Advanced Configuration and Power Interface (ACPI). ACPI with power management by the operating system is most efficient. ACPI power management is divided into four states, which are system state G (Global), device state D (Device), sleep state S (Sleeping), and central processing unit state C (CPU).

Please refer to FIG. 1 , which is a state diagram of a central processing unit of an advanced architecture power interface in the prior art. As shown in the figure, ACPI’s central processing unit state includes four levels of C0, C1, C2, and C3. The C0 state is the processing state of the central processing unit’s executable instructions, and the C1, C2, and C3 states are different levels of sleep. state, the operating system of the computer system will drive the central processing unit to enter a sleep state of an appropriate level according to the usage state of the central processing unit to save power.

In the above C1, C2 and C3 states, because the C3 state is a dormant state in which no snooping (non-snoop) events are possible, the central processing unit in the C3 state cannot process any events and is in a complete dormant state, so the C3 state is The most power-efficient sleep state. After the central processing unit enters the C3 state, when the system chip of the computer system receives an interrupt (Interrupt) event sent by the coupled peripheral device or a bus master request (Bus Master Request) event, the central processing unit will leave C3 state and reverts to the C0 state to handle interrupt events or bus master request events. Afterwards, the operating system will drive the central processing unit to enter the C3 state again only when the usage state of the central processing unit meets the conditions for entering the C3 state.

However, the event required by the bus master is only a processing event sent by the peripheral device to read the data of the system memory (memory is the storage medium, memory, internal memory, hereinafter referred to as memory), but due to the processing of the event event and leave the C3 state to the C0 state, and then wait for the central processing unit to meet the conditions to enter the C3 state before entering the C3 state, so the central processing unit waits in the C0 state to enter the C3 state. The time will cause the central processing unit to consume more power supply. Therefore, the central processing unit cannot achieve the maximum power-saving efficiency. This problem will reduce the use time of the portable computer and affect the user's use of the portable computer.

It can be seen that the above-mentioned existing power-saving method and system of the central processing unit obviously still have inconveniences and defects in the method, product structure and use, and need to be further improved urgently. In order to solve the above-mentioned problems, relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and there is no suitable method and structure for general methods and products to solve the above-mentioned problems. This is obvious. It is a problem that relevant industry players are eager to solve. Therefore, how to create a new method and system for saving power of the central processing unit has become a goal that needs to be improved in the current industry.

In view of the defects in the above-mentioned existing method and system for saving power of the central processing unit, the present invention proposes a new method and system for saving power of the central processing unit in view of the above-mentioned problems, so that the central processing unit can be left without peeping The dormant state of the event returns to the dormant state where the event cannot be peeped after processing the event required by the bus master, so as to increase the power saving efficiency and improve the use time of the portable computer, so as to solve the above problems.

Contents of the invention

The main purpose of the present invention is to overcome the defects of the existing power saving method and system of the central processing unit, and provide a new power saving method and system of the central processing unit. The technical problem to be solved is to make the central processing unit When the processing unit is in the sleep state where events cannot be peeked and the peripheral device sends a bus master request event, it leaves the sleep state where events cannot be peeked and enters a processing state for executable instructions and enters a system management mode to process the bus master. The controller requests an event, and after the processing is completed, the central processing unit executes the system management interrupt program in the system management mode to drive the central processing unit to return to the dormant state where the event cannot be peeped, so as to achieve the best power saving purpose, which is more suitable for practical.

The purpose of the present invention and the solution to its technical problems are achieved by adopting the following technical solutions. According to the power saving method of a central processing unit proposed by the present invention, when a central processing unit is in the C3 state of an advanced architecture power interface and a peripheral device sends a bus master request event, the method includes the following Steps: sending a first control message and a system management interrupt message to the central processing unit, driving the central processing unit to leave the C3 state of the AAPI to enter a C0 state of the API and a system management mode, and writing a first setting value to a first register; and turning on an arbiter to transmit the bus master request event to the central processing unit for processing; wherein, the central processing unit finishes processing the bus When the main controller requests an event, the arbitrator is closed and the first setting value is cleared, and after the central processing unit detects that the first setting value is cleared, it executes a system management interrupt program to send a second control message to the central processing unit, driving the central processing unit to return to the C3 state of the advanced architecture power interface.

The purpose of the present invention and its technical problems can also be further realized by adopting the following technical measures.

In the aforementioned method for saving power of a central processing unit, after the central processing unit returns to the C3 state of the Advanced Architecture Power Interface, if the peripheral device sends an interrupt event, the central processing unit leaves the system management mode, and Sending the first control message to the CPU to leave the C3 state of the APPI to enter the C0 state of the APPI and turn on the arbiter to transmit the interrupt event to the CPU for processing.

In the aforementioned power saving method of the central processing unit, when the peripheral device sends the interrupt event, it writes a second set value into a second temporary register, and the central processing unit exits according to the second set value The system is in management mode and clears the second set value.

In the aforementioned method for saving power of a central processing unit, the system management interrupt program is stored in a memory.

The purpose of the present invention and the solution to its technical problem also adopt the following technical solutions to achieve. According to the power saving method of a central processing unit proposed by the present invention, when a central processing unit is in a dormant state in which a non-snoop event is impossible and a peripheral device sends a bus master request event, the The method includes the following steps: sending a first control message and a system management interrupt message to the central processing unit, driving the central processing unit to leave the dormant state where events cannot be peeped into an executable instruction processing state and a system management mode , and write a first setting value to a first temporary register; and open an arbitrator to transmit the bus master request event to the central processing unit for processing; wherein, the central processing unit finishes processing When the bus master requests an event, it closes the arbiter and clears the first set value. After the central processing unit detects that the first set value is cleared, it executes a system management interrupt program to send a second A control message is sent to the central processing unit, driving the central processing unit to return to the dormant state of the event that cannot be peeped.

The purpose of the present invention and its technical problems can also be further realized by adopting the following technical measures.

The aforementioned method for saving power of the central processing unit, wherein after the central processing unit returns to the dormant state where the event cannot be peeped, if the peripheral device sends an interrupt event, the central processing unit leaves the system management mode and sends The first control message is sent to the central processing unit to leave the dormant state where the event cannot be peeked into the processing state of the executable instruction and to enable the arbiter to transmit the interrupt event to the central processing unit for processing.

In the aforementioned power saving method of the central processing unit, when the peripheral device sends the interrupt event, it writes a second set value into a second temporary register, and the central processing unit exits according to the second set value The system is in management mode and clears the second set value.

In the aforementioned method for saving power of a central processing unit, the system management interrupt program is stored in a memory.

The purpose of the present invention and the solution to its technical problems are also achieved by the following technical solutions. According to the power saving system of a central processing unit proposed by the present invention, when a central processing unit is in a dormant state where a non-snoop event is impossible and a peripheral device sends a bus master request event, the The system includes: a memory, storing a system management interrupt program for the central processing unit to execute; an arbiter, transmitting the bus master request event to the central processing unit; and a system chip, sending a first A control message and a system management interrupt message are sent to the central processing unit to drive the central processing unit to leave the dormant state where the event cannot be peeped into and enter an executable command processing state and a system management mode, and write the first setting value to a first register for processing the bus master request event; wherein, when the central processing unit enters the processing state of the executable instruction, the arbitrator is turned on to transmit the bus master request event to the The central processing unit performs processing. When the bus master request event is processed, the arbitrator is closed and the first setting value is cleared. After the central processing unit detects that the first setting value is cleared, it executes the system The interrupt program is managed to send a second control message to the central processing unit to drive the central processing unit back into the dormant state of the unpeepable event.

The purpose of the present invention and its technical problems can also be further realized by adopting the following technical measures.

In the power saving system of the central processing unit mentioned above, the first register is set on the system chip.

In the aforementioned central processing unit power saving system, after the central processing unit returns to the dormant state where the event cannot be peeped, if the peripheral device sends an interrupt event, the central processing unit leaves the system management mode, and the system The chip sends the first control message to the central processing unit to leave the dormant state where the event cannot be peeked into the processing state of the executable instruction and turns on the arbiter to transmit the interrupt event to the central processing unit for processing.

The power saving system of the aforementioned central processing unit further includes: a second temporary register storing a second setting value, when the peripheral device sends the interrupt event, the system chip writes a second setting value To the second register, the central processing unit exits the system management mode according to the second setting value and clears the second setting value.

In the power saving system of the central processing unit mentioned above, the second register is set on the system chip.

In the aforementioned power saving system of the central processing unit, the arbitrator is disposed on the system chip.

Compared with the prior art, the present invention has obvious advantages and beneficial effects. It can be seen from the above technical solutions that the power saving method and system of the central processing unit of the present invention are mainly used when the central processing unit is in the C3 state where the event cannot be peeped and a peripheral device sends a bus master to request an event to be processed. The present invention uses a system chip to send a first control message and a system management interrupt message to the central processing unit, so as to drive the central processing unit to leave the C3 state and enter a C0 state of an executable command and a system management mode; after that, open a The arbiter transmits the bus master request event to the central processing unit for processing. After the central processing unit finishes processing the request event of the bus master, it closes the arbiter and executes a system management interrupt program to drive the central processing unit back into the C3 state, thereby achieving the purpose of power saving. After the central processing unit returns to the C3 state, if the peripheral device sends an interrupt event to be processed, the central processing unit leaves the system management mode, and leaves the C3 state and enters the C0 state to process the interrupt event.

By means of the above-mentioned technical solution, the power saving method and system of the central processing unit of the present invention have at least the following advantages: the present invention is mainly applied when the central processing unit enters the C3 state where events cannot be peeped, and if the peripheral device sends a bus master request event , the present invention allows the central processing unit to leave the C3 state and enter the processing state of the executable instruction to process the event required by the bus master controller, and enter the system management mode to escape from the control of the operating system. Therefore, after the central processing unit finishes processing the request event of the bus master, the central processing unit can execute the system management interrupt program in the system management mode to drive the central processing unit to return to the C3 state immediately. In this way, the power consumption of the central processing unit can be reduced, and the purpose of energy saving can be achieved, and the battery life of the portable computer can be increased. In addition, the present invention can also save the power consumption of the desktop computer, and further perfect the purpose of computer energy saving, which is very suitable for practical use.

To sum up, the present invention relates to a method and system for saving power of a central processing unit, which is used for a central processing unit in a sleep state where a non-snoop event is not possible, and a peripheral device sends a bus master When the controller requires an event, a system chip of the present invention firstly causes the central processing unit to leave the sleep state where the event cannot be peeped into an executable instruction processing state and a system management mode; after that, an arbiter is turned on to transmit the bus master The server requests events to the central processing unit for processing. After the central processing unit has processed the bus master request event, it will close the arbiter and execute a system management interrupt program to drive the central processing unit back into the sleep state where the event cannot be peeped, so that the best power saving can be achieved . The present invention has the advantages and practical value mentioned above. No matter the method, the structure of the product or the function, it has great improvement, and it has made great progress in technology, and has produced easy-to-use and practical effects, and compared with the existing central The power-saving method and system of the processing unit have enhanced efficacy, are more suitable for practical use, and have wide application value in the industry. They are a novel, progressive and practical new design.

The above description is only an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention, it can be implemented according to the contents of the description, and in order to make the above and other purposes, features and advantages of the present invention more obvious and understandable , the following preferred embodiments are specifically cited below, and are described in detail as follows in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a state diagram of a central processing unit of an advanced architecture power interface in the prior art.

Fig. 2 is a block diagram of a preferred embodiment of the present invention.

Fig. 3 is a flowchart of a preferred embodiment of the present invention.

10: Central processing unit 30: System chip

31: Peripheral device 33: Arbitrator

35: The first register 37: The second register

39: System memory 40: Read-only memory

Detailed ways

In order to further explain the technical means and effects that the present invention takes to achieve the intended purpose of the invention, below in conjunction with the accompanying drawings and preferred embodiments, the specific implementation methods and methods of the power saving method and system of the central processing unit proposed according to the present invention , step, structure, feature and effect thereof, detailed description is as follows.

Please refer to FIG. 2 , which is a block diagram of a preferred embodiment of the present invention. As shown in the figure, the embodiment of the present invention includes a central processing unit 10 , a system chip 30 and a system memory 39 . The system chip 30 is respectively coupled with the central processing unit 10 and the system memory 39 to transmit information and data. In addition, the system chip 30 is further coupled with a ROM 40 and a peripheral device 31 , and is provided with an arbiter 33 , a first register 35 and a second register 37 . The ROM 40 stores a system management interrupt program. The above is only an embodiment of the present invention, and the first register 35 and the second register 37 can not only be provided in the system chip 30 .

When the central processing unit 10 enters into the C3 state of noon-snoopZ event, in order to prevent the system chip 30 from transmitting the processing event sent by the peripheral device 31 to the central processing unit 10, the central processing unit 10 enters the noon-snoop event Before the C3 state of the system chip 30, the system chip 30 will close the arbitrator 33, so that the processing events sent by the peripheral device 31 after the central processing unit 10 enters the C3 state cannot be transmitted to the central processing unit 10 through the arbiter 33 of the system chip 30, so that the central processing unit 10 The unit 10 is completely dormant without being able to peek at processing events.

Next, please refer to FIG. 3 to illustrate the processing method of the present invention when the system chip 30 receives the bus master request event sent by the peripheral device 31 after the central processing unit 10 enters the C3 state where the event cannot be peeped. The central processing unit 10 is now in the C3 state as shown in step S0, and the arbiter 33 is in the off state as described above. At this time, if the system chip 30 receives the bus master request event sent by the peripheral device 31 as shown in step S1, the system chip 30 promptly executes step S2 to send a first control message and a system management interrupt (SystemManagement Interrupt, SMI) message to the central processing unit 10 and write a first set value to the first register 35 to record the bus master request event.

When the central processing unit 10 receives the first control message, it will leave the C3 state and enter the C0 state where the instruction can be executed, and enter a system management mode (System Management Mode, SMM) according to the received system management interrupt message. The reason why the system chip 30 of the present invention sends the system management interrupt message to the central processing unit 10 is that when the central processing unit 10 leaves the C3 state and then enters the C0 state, it will be controlled by the operating system of the computer system, so the central processing unit 10 cannot return to the C3 state immediately after processing the bus master request event. Therefore, the system chip 30 of the present invention also sends a system management interrupt message when sending the first control message, driving the central processing unit 10 to enter the system management mode so that the central processing unit 10 is out of the control of the operating system.

Because there are many trigger events that drive the system chip 30 to send the system management interrupt message to the central processing unit 10, each trigger event will write the set value when the system chip 30 is driven to send the system management interrupt message to the central processing unit 10. registers, for the central processing unit 10 to detect all registers to execute the system management interrupt program stored in the read-only memory 40 according to the set value after entering the system management mode. It can be seen that, after the central processing unit 10 enters the system management mode, it takes time to detect the registers corresponding to all trigger events. In the present invention, the arbitrator 33 is turned on by the detection time to transmit the bus master event to the central processing unit 10 for processing. When the central processing unit 10 of the present invention detects the first set value, it knows that there is a bus master request event, so the system management interrupt program is not executed until the bus master request event is processed and the first request event is cleared. up to the set value.

As can be seen from the foregoing, when the central processing unit 10 leaves the C3 state and enters the C0 state and the system management mode, the system chip 30 will execute step S3 and turn on the arbiter 33, so that the bus master request event sent by the peripheral device 31 is transmitted to the central The processing unit 10 performs processing and detects a first setting value. After the central processing unit 10 finishes processing the bus master request event, the system chip 30 executes step S4 , closes the arbiter 33 and clears the first set value of the first register 35 . At this time, the central processing unit 10 will detect that the first set value is cleared, indicating that the bus master request event has been processed.

Next, the central processing unit 10 executes the system management interrupt program as shown in step S5. The system management interrupt program of the present invention drives the central processing unit 10 to return to the C3 state. When the central processing unit 10 executes the system management interrupt program of the present invention, the central processing unit 10 will drive the system chip 30 to send a second control message to the central processing unit 10, so that the central processing unit 10 returns to the C3 state. When the central processing unit 10 executes the interrupt service program, it first reads the interrupt service program from the read-only memory 40 to a system management random access memory (System Management RAM, SMRAM), and then executes the interrupt service program. The system management random access memory is a specific storage area of the system memory 37 .

As can be seen from the foregoing, the present invention breaks away from the control of the operating system by driving the central processing unit 10 into the system management mode, so that the processing bus will not be completed in the central processing unit 10 due to the control of the operating system as in the prior art. The main controller cannot return to the C3 state immediately after an event, so the present invention can save more power than the prior art.

After the central processing unit 10 executes step S5, if the peripheral device 31 sends a processing event again, the system chip 30 executes step S6 to determine whether the processing event is an interrupt event. If the processing event is not an interrupt event but is a bus master request event, the system chip 30 executes step S7, sends a first control message to the central processing unit 10 to drive the central processing unit 10 to leave the C3 state, and writes the first Set the value to the first register 35, and return to the process of step S3 to repeatedly execute the above steps S3-S5.

If the processing event is an interrupt event, the central processing unit 10 must leave the system management mode and return to the operating system control mode to process the interrupt event. At this time, the present invention executes step S8 through the system chip 30, and writes a second setting value into the second register 37; after that, the central processing unit 10 will detect the second register as shown in step S9 The second set value stored in 37 and as shown in step S10, exits the system management mode and returns to the operating system control mode according to the second set value, and clears the second set value of the second register 37 at the same time. In addition, the system chip 30 will send a first control message to the central processing unit 10 to drive the central processing unit 10 to leave the C3 state and return to the C0 state where instructions can be executed normally. At this time, since the CPU 10 returns to the operating system control mode, the operating system will drive the system chip 30 to enable the arbiter 33 to transmit the interrupt event to the CPU 10 for processing.

When the processing event is an interrupt event and the central processing unit 10 must leave the system management mode, the present invention can also directly drive the central processing unit 10 to leave the system management mode through the system chip 30, and send a first control message to the central processing unit 10 , so as to drive the central processing unit 10 to leave the C3 state and return to the C0 state without performing steps S8-S10.

To sum up, the power saving method and system of the central processing unit of the present invention are mainly used when the central processing unit enters the C3 state where events cannot be peeped. If the peripheral device sends a bus master request event, the present invention allows the central processing unit Leave the C3 state to enter the processing state of executable instructions to process the bus master request event, and enter the system management mode to escape from the control of the operating system. Therefore, after the central processing unit finishes processing the request event of the bus master, the central processing unit can execute the system management interrupt program in the system management mode to drive the central processing unit to return to the C3 state immediately. In this way, the power consumption of the central processing unit can be reduced, thereby achieving the purpose of energy saving, so as to increase the battery life of the portable computer.

The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone familiar with this field Those skilled in the art, without departing from the scope of the technical solution of the present invention, may use the technical content disclosed above to make some changes or modify them into equivalent embodiments with equivalent changes, but as long as they do not depart from the technical solution of the present invention, the Technical Essence Any simple modifications, equivalent changes and modifications made to the above embodiments still fall within the scope of the technical solution of the present invention.

Claims (14)

1. A method for saving power of a central processing unit, when being applied to a central processing unit in the C3 state of an advanced architecture power interface and a peripheral device sending a bus master request event, it is characterized in that the method comprises the following steps : sending a first control message and a system management interrupt message to the central processing unit, driving the central processing unit to leave the C3 state of the advanced architecture power interface and enter the C0 state of an advanced architecture power interface and a system management mode, and write a first set value to a first register; and Turn on an arbiter to transmit the bus master request event to the central processing unit for processing; Wherein, when the central processing unit processes the request event of the bus master, it closes the arbitrator and clears the first set value, and after the central processing unit detects that the first set value is cleared, it executes a system The interrupt program is managed to send a second control message to the CPU to drive the CPU back into the C3 state of the AFI. 2. The method for saving power of a central processing unit according to claim 1, wherein after the central processing unit returns to the C3 state of the Advanced Architecture Power Interface, if the peripheral device sends an interrupt event, the the central processing unit leaves the system management mode, and sends the first control message to the central processing unit to leave the C3 state of the AAPI and enter the C0 state of the API and turn on the arbiter to transmit the The interrupt event is sent to the central processing unit for processing. 3. The power saving method of the central processing unit according to claim 2, wherein when the peripheral device sends the interrupt event, it writes a second set value to a second register, and the central The processing unit leaves the system management mode according to the second setting value and clears the second setting value. 4. The method for saving power of a central processing unit according to claim 1, wherein said system management interrupt program is stored in a memory. 5. A method for saving power of a central processing unit, when being applied to a central processing unit in a dormant state that cannot peep into an event and a peripheral device sending a bus master request event, it is characterized in that the method comprises the following steps: Sending a first control message and a system management interrupt message to the central processing unit, driving the central processing unit to leave the dormant state where the event cannot be peeped into an executable command processing state and a system management mode, and write a first a set value to a first register; and Turn on an arbiter to transmit the bus master request event to the central processing unit for processing; Wherein, when the central processing unit processes the request event of the bus master, it closes the arbitrator and clears the first set value, and after the central processing unit detects that the first set value is cleared, it executes a system The interrupt program is managed to send a second control message to the central processing unit to drive the central processing unit back into the dormant state of the unpeepable event. 6. The power saving method of the central processing unit according to claim 5, wherein after the central processing unit returns to the sleep state where the event cannot be peeped, if the peripheral device sends an interrupt event, the central processing unit The processing unit leaves the system management mode and sends the first control message to the central processing unit to leave the sleep state where the event cannot be peeked into the processing state of the executable instruction and turns on the arbiter to transmit the interrupt event to the The central processing unit performs the processing. 7. The power saving method of the central processing unit according to claim 6, wherein when the peripheral device sends the interrupt event, it writes a second set value to a second register, and the central The processing unit leaves the system management mode according to the second setting value and clears the second setting value. 8. The method for saving power of a central processing unit according to claim 5, wherein said system management interrupt program is stored in a memory. 9. A power saving system of a central processing unit, applied to a central processing unit in a dormant state that cannot be peeped into an event and a peripheral device sending a bus master request event, characterized in that the system includes: a memory storing a system management interrupt program for execution by the central processing unit; an arbiter for transmitting the bus master request event to the central processing unit; and a system chip, sending a first control message and a system management interrupt message to the central processing unit, driving the central processing unit to leave the dormant state where the event cannot be peeped into an executable instruction processing state and a system management mode, and write the first setting value to a first register to process the request event of the bus master; Wherein, when the central processing unit enters the processing state of the executable instruction, the arbiter is turned on to transmit the bus master request event to the central processing unit for processing, and when the bus master request event is processed, the arbiter is turned off The arbitrator clears the first set value, and after the central processing unit detects that the first set value is cleared, it executes the system management interrupt program to send a second control message to the central processing unit to drive the central The processing unit reverts to hibernation for the unpeekable event. 10. The power saving system of a central processing unit according to claim 9, wherein the first register is disposed on the system chip. 11. The power saving system of the central processing unit according to claim 9, wherein after the central processing unit returns to the sleep state where the event cannot be peeped, if the peripheral device sends an interrupt event, the central processing unit The processing unit leaves the system management mode, the system chip and sends the first control message to the central processing unit to leave the sleep state where the event cannot be peeked into the processing state of the executable instruction and turn on the arbiter to transmit the interrupt Events are sent to the central processing unit for processing. 12. The power saving system of the central processing unit according to claim 11, further comprising: A second register, storing a second setting value, when the peripheral device sends the interrupt event, the system chip writes a second setting value to the second register, and the central processing unit according to the first Second setpoint exits the system management mode and clears the second setpoint. 13. The power saving system of a central processing unit according to claim 12, wherein the second register is disposed on the system chip. 14. The power saving system of a central processing unit according to claim 9, wherein the arbitrator is disposed on the system chip.

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