CN114420549B - Method for bonding silicon dioxide surface and silicon surface at low temperature - Google Patents
Method for bonding silicon dioxide surface and silicon surface at low temperature Download PDFInfo
- Publication number
- CN114420549B CN114420549B CN202210327717.1A CN202210327717A CN114420549B CN 114420549 B CN114420549 B CN 114420549B CN 202210327717 A CN202210327717 A CN 202210327717A CN 114420549 B CN114420549 B CN 114420549B
- Authority
- CN
- China
- Prior art keywords
- bonding
- wafer
- silicon
- semiconductor product
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 89
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims abstract description 70
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 63
- 239000010703 silicon Substances 0.000 title claims abstract description 63
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 62
- 239000000377 silicon dioxide Substances 0.000 title claims abstract description 35
- 235000012239 silicon dioxide Nutrition 0.000 title claims abstract description 34
- 239000004065 semiconductor Substances 0.000 claims abstract description 55
- 230000008569 process Effects 0.000 claims abstract description 50
- 238000000227 grinding Methods 0.000 claims abstract description 48
- 238000001514 detection method Methods 0.000 claims abstract description 33
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 25
- 238000000137 annealing Methods 0.000 claims abstract description 23
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 18
- 239000001301 oxygen Substances 0.000 claims abstract description 18
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 18
- 238000012360 testing method Methods 0.000 claims abstract description 17
- 239000001257 hydrogen Substances 0.000 claims abstract description 15
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 15
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims abstract description 7
- 239000008367 deionised water Substances 0.000 claims abstract description 6
- 229910021641 deionized water Inorganic materials 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 238000005979 thermal decomposition reaction Methods 0.000 claims abstract description 5
- 238000001994 activation Methods 0.000 claims description 19
- 230000004913 activation Effects 0.000 claims description 19
- 230000005684 electric field Effects 0.000 claims description 14
- 239000007789 gas Substances 0.000 claims description 13
- 238000005406 washing Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 11
- 239000000203 mixture Substances 0.000 claims description 10
- 230000007547 defect Effects 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 8
- 239000002245 particle Substances 0.000 claims description 8
- 239000008223 sterile water Substances 0.000 claims description 7
- 238000007740 vapor deposition Methods 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 4
- 238000002592 echocardiography Methods 0.000 claims description 3
- 238000007654 immersion Methods 0.000 claims description 3
- 239000000523 sample Substances 0.000 claims description 3
- 238000002791 soaking Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 16
- 239000000463 material Substances 0.000 abstract description 14
- 238000005265 energy consumption Methods 0.000 abstract description 5
- 235000012431 wafers Nutrition 0.000 description 55
- 230000009286 beneficial effect Effects 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 4
- 239000003344 environmental pollutant Substances 0.000 description 4
- 231100000719 pollutant Toxicity 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 230000003749 cleanliness Effects 0.000 description 3
- 230000006698 induction Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000002210 silicon-based material Substances 0.000 description 3
- 239000003082 abrasive agent Substances 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 125000004430 oxygen atom Chemical group O* 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000010998 test method Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000012459 cleaning agent Substances 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000000678 plasma activation Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/9501—Semiconductor wafers
- G01N21/9505—Wafer internal defects, e.g. microcracks
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N29/00—Investigating or analysing materials by the use of ultrasonic, sonic or infrasonic waves; Visualisation of the interior of objects by transmitting ultrasonic or sonic waves through the object
- G01N29/04—Analysing solids
- G01N29/06—Visualisation of the interior, e.g. acoustic microscopy
- G01N29/0654—Imaging
- G01N29/069—Defect imaging, localisation and sizing using, e.g. time of flight diffraction [TOFD], synthetic aperture focusing technique [SAFT], Amplituden-Laufzeit-Ortskurven [ALOK] technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Analytical Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Biochemistry (AREA)
- General Health & Medical Sciences (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Acoustics & Sound (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
本发明提供了一种二氧化硅表面与硅表面低温键合的方法。设置第一低温条件,并在衬底的键合面上通过硅酸乙酯加热分解工艺沉底二氧化硅,生成晶圆;将所述晶圆通过电子云活化,并进行去离子水洗,引入氢键;将引入氢键后的晶圆和普通硅片在预设压力下键合,并在键合完成后在第二低温下进行退火,生成键合后的半导体产品;将所述半导体产品进行超声波探伤和研磨测试,判断键合结果。本发明创新性的使用PETEOS在250℃~450℃下制备而成的二氧化硅层作为键合面,无需进行1000℃高温热氧工艺和1000℃高温退火工艺。可以大大减少对工艺机台的要求,降低能耗,降低综合成本,最重要的是为很多无法承受高温的材料及产品创造了可行的工艺路线,输出可靠的工艺效果。
The invention provides a low-temperature bonding method for silicon dioxide surface and silicon surface. Set the first low temperature condition, and sink the bottom silicon dioxide on the bonded surface of the substrate through the thermal decomposition process of ethyl silicate to generate a wafer; activate the wafer through the electron cloud, wash it with deionized water, and introduce Hydrogen bond; bond the wafer and ordinary silicon chip after the hydrogen bond is introduced under a preset pressure, and anneal at a second low temperature after the bonding is completed to generate a bonded semiconductor product; the semiconductor product Conduct ultrasonic flaw detection and grinding test to judge the bonding result. The invention innovatively uses the silicon dioxide layer prepared by PETEOS at 250°C to 450°C as the bonding surface, without the need for 1000°C high-temperature thermal oxygen process and 1000°C high-temperature annealing process. It can greatly reduce the requirements for process machines, reduce energy consumption, and reduce overall costs. The most important thing is to create feasible process routes for many materials and products that cannot withstand high temperatures, and output reliable process effects.
Description
技术领域technical field
本发明涉及硅键合技术领域,特别涉及一种二氧化硅表面与硅表面低温键合的方法。The invention relates to the technical field of silicon bonding, in particular to a low-temperature bonding method for a silicon dioxide surface and a silicon surface.
背景技术Background technique
目前,当下键合工艺多用于产品图形转移或特殊加固工艺。其中尤其以二氧化硅表面与硅表面键合比较多,但是传统工艺一般是在硅片或其他材料片键合面上进行1000℃热氧工艺生成二氧化硅,然后与硅片进行预键合,然后再经历1000℃的退火工艺,实现完全键合。其键合强度及质量的关键主要取决于预键合工艺时二氧化硅材料及硅材料的2种键合面材料应力表现,弯曲度,粗糙度,以及预键合后退火工艺的条件,因此,对于工艺机台的要求高,能耗高。At present, the current bonding process is mostly used for product pattern transfer or special reinforcement process. Among them, the silicon dioxide surface is more bonded to the silicon surface, but the traditional process is generally to perform a 1000°C thermal oxygen process on the bonding surface of silicon wafers or other materials to generate silicon dioxide, and then pre-bond with silicon wafers , and then undergo an annealing process at 1000°C to achieve complete bonding. The key to its bonding strength and quality mainly depends on the stress performance, curvature, roughness, and the conditions of the annealing process after the pre-bonding process of the two bonding surface materials of the silicon dioxide material and the silicon material during the pre-bonding process. , high requirements for process machines and high energy consumption.
发明内容Contents of the invention
本发明提供一种二氧化硅表面与硅表面低温键合的方法,用以解决现有技术中的键合工艺,键合强度及质量的关键主要取决于预键合工艺时二氧化硅材料及硅材料的2种键合面材料应力表现,弯曲度,粗糙度,以及预键合后退火工艺的条件,对于工艺机台的要求高,能耗高的情况。The invention provides a method for bonding silicon dioxide surface and silicon surface at low temperature, which is used to solve the bonding process in the prior art. The key to the bonding strength and quality mainly depends on the silicon dioxide material and the The stress performance, curvature, and roughness of the two bonding surface materials of silicon materials, as well as the conditions of the annealing process after pre-bonding, have high requirements for process equipment and high energy consumption.
一种二氧化硅表面与硅表面低温键合的方法,包括:A method for bonding a silicon dioxide surface to a silicon surface at a low temperature, comprising:
设置第一低温条件,并在衬底的键合面上通过硅酸乙酯加热分解工艺沉底二氧化硅,生成晶圆;Set the first low temperature condition, and sink the bottom silicon dioxide on the bonding surface of the substrate through the thermal decomposition process of ethyl silicate to generate a wafer;
将所述晶圆通过电子云活化,并进行去离子水洗,引入氢键;Activating the wafer through an electron cloud, washing it with deionized water, and introducing hydrogen bonds;
将引入氢键后的晶圆和普通硅片在预设压力下键合,并在键合完成后在第二低温下进行退火,生成键合后的半导体产品;Bonding the hydrogen-bonded wafer and ordinary silicon wafer under a preset pressure, and annealing at a second low temperature after the bonding is completed, to generate a bonded semiconductor product;
将所述半导体产品进行超声波探伤和研磨测试,判断键合结果。The semiconductor product is subjected to ultrasonic flaw detection and grinding test, and the bonding result is judged.
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
设置气相沉积台,并控制所述气相沉积台的温度条件在250℃~450℃之间;Setting up a vapor deposition platform, and controlling the temperature of the vapor deposition platform to be between 250°C and 450°C;
设置高密度电浆,并在所述高密度电浆的条件下,将二氧化硅进行沉积;setting a high-density plasma, and depositing silicon dioxide under the conditions of the high-density plasma;
在所述沉积完成过后,生成具备键合面的晶圆。After the deposition is complete, a wafer with a bonding surface is produced.
作为本发明的一种实施例:所述超声波探伤包括:As an embodiment of the present invention: the ultrasonic flaw detection includes:
对键合后的普通硅片一面进行红外线扫描,获取红外扫描图像;Infrared scanning is performed on one side of the bonded ordinary silicon wafer to obtain an infrared scanning image;
对所述红外扫描图像在颜色空间中进行颜色识别,判断是否存在颜色差异;其中,Carry out color recognition to described infrared scanning image in color space, judge whether there is color difference; Wherein,
当存在颜色差异时,表示键合结果不合格;When there is a color difference, it means that the bonding result is unqualified;
当不存在颜色差异时,通过超声波探头对键合后的半导体产品进行三向扫描;其中,When there is no color difference, the bonded semiconductor product is scanned in three directions by an ultrasonic probe; among them,
所述三向扫描包括:从所述普通硅片面进行直射探伤、从所述晶圆面进行直射探伤,从键合处进行横向探伤;The three-way scanning includes: performing direct-ray flaw detection from the ordinary silicon wafer surface, direct-ray flaw detection from the wafer surface, and lateral flaw detection from the bond;
根据所述三向扫描,分别获取三个不同超声波探伤的反射回波;According to the three-direction scanning, respectively acquire three reflected echoes of different ultrasonic flaw detections;
根据所述反射回波判断所述键合后的半导体产品有无气泡;judging whether there are bubbles in the bonded semiconductor product according to the reflected echo;
根据所述气泡,确定缺陷及相应的缺陷位置。According to the bubbles, the defects and corresponding defect positions are determined.
作为本发明的一种实施例:所述研磨测试包括:As an embodiment of the present invention: the grinding test includes:
将所述键合后的半导体产品按照设定的预设转位固定第一转盘和第二转盘之间;Fixing the bonded semiconductor product between the first turntable and the second turntable according to the set preset indexing;
设置第一转盘和第二转盘的转力区间,根据所述转力区间的最低转力值,控制键合后的半导体产品随第一转盘和第二转盘的相互反向运动,进行整面研磨,并在所述第一转盘和第二转盘的转力值达到所述转力区间的最大值时,停止转动,并判度所述半导体产品是否脱落,当不脱落时,达到第一键合强度标准,并确定整面研磨的研磨时间;其中,Set the rotation ranges of the first turntable and the second turntable, and control the bonded semiconductor products to move in opposite directions with the first turntable and the second turntable according to the lowest rotation value in the rotation range, and perform full-surface grinding , and when the torque values of the first turntable and the second turntable reach the maximum value of the rotation force range, stop the rotation, and judge whether the semiconductor product falls off, and when it does not fall off, reach the first bonding Intensity criteria and determine the grinding time for full face grinding; where,
在所述整面研磨时,所述半导体产品的正反两面粗糙度增加;When the entire surface is ground, the roughness of the front and back sides of the semiconductor product increases;
在所述半导体达到第一键合强度标准时,通过所述第一转盘和第二转盘对所述半导体产品进行边缘研磨,并设置边缘研磨时间和所述整面研磨时间相同,在边缘研磨完成后,判度所述半导体产品是否脱落,当不脱落时,达到第二键合强度标准,When the semiconductor reaches the first bonding strength standard, edge grinding is performed on the semiconductor product through the first turntable and the second turntable, and the edge grinding time is set to be the same as the entire surface grinding time, after the edge grinding is completed , to determine whether the semiconductor product falls off, and when it does not fall off, it reaches the second bonding strength standard,
在所述半导体产品达到所述第二键合强度标准后,将所述半导体产品设置在脉冲磁场中,并通过磁性磨料进行切削研磨,并将所述键合后的半导体产品键合的两面研磨的厚度研磨至100um~200um,再次判断所述半导体产品有无脱落,并在无脱落时,达到目标键合强度标准。After the semiconductor product reaches the second bonding strength standard, the semiconductor product is placed in a pulsed magnetic field, and the magnetic abrasive is used for cutting and grinding, and the bonded two sides of the bonded semiconductor product are ground Grind to a thickness of 100um~200um, judge again whether the semiconductor product has fallen off, and when there is no falloff, reach the target bonding strength standard.
作为本发明的一种实施例:所述电子云活化包括:As an embodiment of the present invention: the electronic cloud activation includes:
设置第一机台,并将所述晶圆放在第一机台中;其中,setting the first platform, and placing the wafer in the first platform; wherein,
第一机台设置有增氧装置和两个激光发射装置;The first machine is equipped with an oxygen increasing device and two laser emitting devices;
将所述晶圆进行放置在高氧气密度的环境中;placing the wafer in an environment with high oxygen density;
分别设置第一激光束和第二激光束,通过第一激光束投射所述晶圆,生成离子束团;setting the first laser beam and the second laser beam respectively, and projecting the wafer through the first laser beam to generate ion clusters;
通过第二激光束投射所述离子束团的外围,生成中空电子云。A hollow electron cloud is generated by projecting the periphery of the ion bunch with a second laser beam.
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
设置第二机台,将所述电子云活化后的晶圆放置在所述第二机台中;其中,A second machine is set, and the wafer activated by the electron cloud is placed in the second machine; wherein,
所述第二机台设置有无菌水槽和离子水洗槽;The second machine is provided with a sterile water tank and an ion water washing tank;
将所述电子云活化后的晶圆先放置在所述无菌水槽进行浸泡1H;The wafer after the electron cloud activation is first placed in the sterile water tank for 1H soaking;
在浸泡结束后,通过所述离子水洗槽进行离子水洗涤,直至所述电子云活化后的晶圆中存在氢键。After the immersion, the ion water washing tank is used for washing with ion water until hydrogen bonds exist in the wafer after the activation of the electron cloud.
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
设置键合机;其中,Set up the bonder; where,
所述键合机存在真空室和常压室;There is a vacuum chamber and a normal pressure chamber in the bonding machine;
将所述引入氢键后的晶圆和普通硅片放置在所述键合机中,并设置所述键合机的压力为:60KN~120KN之间。Place the hydrogen-bonded wafer and ordinary silicon wafer in the bonding machine, and set the pressure of the bonding machine to be between 60KN and 120KN.
作为本发明的一种实施例:所述第二低温下进行退火包括:As an embodiment of the present invention: performing annealing at the second low temperature includes:
将所述键合完成后的晶圆和普通硅片放入烘箱,并设置烘箱温度为300℃~500℃之间;Put the bonded wafer and ordinary silicon wafer into an oven, and set the temperature of the oven to be between 300°C and 500°C;
根据所述烘箱,进行退火,生成键合后的半导体产品。According to the oven, annealing is performed to produce a bonded semiconductor product.
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
将所述硅片的上表面进行深硅刻蚀并进行热氧处理;Carrying out deep silicon etching and thermal oxygen treatment on the upper surface of the silicon wafer;
将热氧处理后的硅片的上表面进行减薄处理,再在其上表面进行顶硅刻蚀;Thinning the upper surface of the silicon wafer after thermal oxygen treatment, and then etching the top silicon on the upper surface;
顶硅刻蚀后的硅片的下表面进行减薄去硅处理,并除去氧化层,得到目标硅片。The lower surface of the silicon wafer after top silicon etching is thinned and desiliconized, and the oxide layer is removed to obtain the target silicon wafer.
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
设置气体混合物,并在所述气体混合物上安装电极,通过电极施加电场;providing a gas mixture, and installing electrodes on said gas mixture through which an electric field is applied;
根据所述电场,通过带电粒子碰撞所述气体混合物的气体分子,生成电浆;其中,A plasma is generated by charged particles colliding with gas molecules of the gas mixture according to the electric field; wherein,
所述电场的强度由所述电极的电压确定,所述带电粒子的速度由所述电场的强度确定。The strength of the electric field is determined by the voltage of the electrodes, and the velocity of the charged particles is determined by the strength of the electric field.
本发明的有益效果在于:The beneficial effects of the present invention are:
本发明创新性的使用PETEOS(高密度电浆条件下硅酸乙酯加热分解)在250℃~450℃下制备而成的二氧化硅层作为键合面,无需进行1000℃的高温热氧工艺,且后续也无需经行1000℃高温退火工艺。可以大大减少对工艺机台的要求,降低能耗,降低综合成本,最重要的是为很多无法承受高温的材料及产品创造了可行的工艺路线,输出可靠的工艺效果。The invention innovatively uses the silicon dioxide layer prepared at 250°C to 450°C as the bonding surface by using PETEOS (thermally decomposing ethyl silicate under high-density plasma conditions), without the need for a high-temperature thermal oxygen process at 1000°C , and there is no need to undergo a high-temperature annealing process at 1000°C in the follow-up. It can greatly reduce the requirements for process machines, reduce energy consumption, and reduce overall costs. The most important thing is to create feasible process routes for many materials and products that cannot withstand high temperatures, and output reliable process effects.
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。本发明的目的和其他优点可通过在所写的说明书以及附图中所特别指出的结构来实现和获得。Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and appended drawings.
下面通过附图和实施例,对本发明的技术方案做进一步的详细描述。The technical solutions of the present invention will be described in further detail below with reference to the accompanying drawings and embodiments.
附图说明Description of drawings
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例一起用于解释本发明,并不构成对本发明的限制。在附图中:The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the description, and are used together with the embodiments of the present invention to explain the present invention, and do not constitute a limitation to the present invention. In the attached picture:
图1为本发明实施例中一种二氧化硅表面与硅表面低温键合的方法的流程图;Fig. 1 is a flow chart of a method for bonding a silicon dioxide surface to a silicon surface at a low temperature in an embodiment of the present invention;
图2为本发明实施例中超声波探伤的缺陷显示图;Fig. 2 is a defect display diagram of ultrasonic flaw detection in an embodiment of the present invention;
图3为本发明实施例中超声波探伤的无伤显示图。Fig. 3 is a non-destructive display diagram of ultrasonic flaw detection in the embodiment of the present invention.
具体实施方式Detailed ways
以下结合附图对本发明的优选实施例进行说明,应当理解,此处所描述的优选实施例仅用于说明和解释本发明,并不用于限定本发明。The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.
实施例1:Example 1:
如附图1所示,本发明为一种二氧化硅表面与硅表面低温键合的方法,包括:As shown in accompanying drawing 1, the present invention is a method for low-temperature bonding of a silicon dioxide surface and a silicon surface, comprising:
设置第一低温条件,并在衬底的键合面上通过硅酸乙酯加热分解工艺沉底二氧化硅,生成晶圆;Set the first low temperature condition, and sink the bottom silicon dioxide on the bonding surface of the substrate through the thermal decomposition process of ethyl silicate to generate a wafer;
将所述晶圆通过电子云活化,并进行去离子水洗,引入氢键;Activating the wafer through an electron cloud, washing it with deionized water, and introducing hydrogen bonds;
将引入氢键后的晶圆和普通硅片在预设压力下键合,并在键合完成后在第二低温下进行退火,生成键合后的半导体产品;Bonding the hydrogen-bonded wafer and ordinary silicon wafer under a preset pressure, and annealing at a second low temperature after the bonding is completed, to generate a bonded semiconductor product;
将所述半导体产品进行超声波探伤和研磨测试,判断键合结果。The semiconductor product is subjected to ultrasonic flaw detection and grinding test, and the bonding result is judged.
上述技术方案的工作原理为:本发明是一种创新的方式,相对于现有技术,本发明无需在1000℃的高温上进行键合,从而对于大量的不耐高温的材料来说,本发明的键合方式更加适合,现有技术中也是存在低温键合技术的,但是现有技术中的低温键合,容易在键合的时候,出现不稳定和未成对的化学键这些化学键贴合的时候容易成健,但是对于环境要求比较高,平整度和洁净度需要达到非常高的程度,而达到这种非常高的程度最容易的环境条件是真空,但是真空状态下,键合面的活化性不好,难以键合。The working principle of the above-mentioned technical solution is: the present invention is an innovative method. Compared with the prior art, the present invention does not need to be bonded at a high temperature of 1000°C. Therefore, for a large number of materials that are not resistant to high temperatures, the present invention The bonding method is more suitable. There is also low-temperature bonding technology in the prior art, but the low-temperature bonding in the prior art is prone to unstable and unpaired chemical bonds when bonding these chemical bonds. It is easy to become healthy, but the requirements for the environment are relatively high, and the flatness and cleanliness need to reach a very high level, and the easiest environmental condition to achieve this very high level is vacuum, but in a vacuum state, the activation of the bonding surface Not good, hard to bond.
因此,传统的键合工艺还是通过高温键合,通过在硅片或其他材料片键合面上进行1000℃热氧工艺生成二氧化硅,然后与硅片进行预键合,然后再经历1000℃的退火工艺,实现完全键合。其键合强度及质量的关键主要取决于预键合工艺时二氧化硅材料及硅材料的2种键合面材料应力表现,弯曲度,粗糙度,以及预键合后退火工艺的条件。Therefore, the traditional bonding process is still through high-temperature bonding, by performing a 1000°C thermal oxygen process on the bonding surface of silicon wafers or other materials to generate silicon dioxide, and then pre-bonding with silicon wafers, and then undergoing 1000°C annealing process to achieve complete bonding. The key to its bonding strength and quality mainly depends on the stress performance, curvature, roughness of the two bonding surface materials of silicon dioxide material and silicon material during the pre-bonding process, and the conditions of the annealing process after pre-bonding.
但是,高温工艺不适宜一些产品要求,如含有空腔的特殊结构产品或热敏材料,且高温工艺整体能耗高,对硬件要求高。However, the high-temperature process is not suitable for some product requirements, such as special structural products containing cavities or heat-sensitive materials, and the high-temperature process consumes a lot of energy overall and requires high hardware requirements.
在传统工作一中,高温的主要作用是,在生成硅氧键时,产生的水向中的扩 散不明显,而团可以破坏桥接氧原子的一个键使其转变为非桥接氧原子,从而实现更 好的键合,而在高温状态下,键合的临近原子之间相互反应,产生共价键,使得键合完成,这 也是最主要的工艺。 In traditional work 1, the main effect of high temperature is that when the silicon-oxygen bond is formed, the water generated The diffusion in is not obvious, while The group can break a bond of the bridging oxygen atom and turn it into a non-bridging oxygen atom, so as to achieve better bonding, and at high temperature, the adjacent atoms of the bonding react with each other to generate a covalent bond, making the bonding Finishing is also the most important process.
但是本发明打破了这个高温的局面,本发明在高密度电浆中进行制备二氧化硅层 作为键合面,因为热氧化的目的是,让水向中的扩散明显,是为了实现等离子体表面 的活化,现有工艺主要是通过高温进行活化,但是本发明是通过电子云进行活化,也达到了 高温氧化使得等离子体表面的活化的效果。另外,现有工艺会通过在增加悬挂键方面,主要 是基于等离子体表面的活化,然后基于化学溶液生成非桥键的羟基,但是本发明通过去离 子水洗,引入氢键,也到了现有技术的效果,相对于现有技术本发明更加的简单。在键合面 的洁净度上,本发明高密度电浆活化,就可以通过电浆的作用,对键合面可能存在的污染物 通过电浆除杂,电浆通过大量的电子轰击污染物,达到较高的清洁度,同时电浆还具有蚀刻 作用,达到一个较高的平滑度。去离子水的作用就像海绵一样。它吸收污染物和颗粒容易, 并清除积极。其纯度促进空化气泡在超声波清洗机的形成。它是一个不同的清洗剂,除去的 宽范围内的部分污染物,实现双重去除污染物,达到真空状态下的高效除尘结果。 However, the present invention breaks this high-temperature situation. The present invention prepares a silicon dioxide layer as a bonding surface in a high-density plasma, because the purpose of thermal oxidation is to allow water to The obvious diffusion in the plasma is to realize the activation of the plasma surface. The existing technology is mainly activated by high temperature, but the present invention is activated by electron cloud, and also achieves the effect of high temperature oxidation to activate the plasma surface. In addition, the existing process will increase the dangling bonds, mainly based on the activation of the plasma surface, and then generate non-bridging hydroxyl groups based on chemical solutions, but the present invention introduces hydrogen bonds through deionized water washing, which also reaches the existing technology Compared with the prior art, the present invention is simpler. In terms of the cleanliness of the bonding surface, the high-density plasma activation of the present invention can remove impurities that may exist on the bonding surface through the plasma, and the plasma bombards the pollutants with a large number of electrons. To achieve a higher degree of cleanliness, while the plasma also has an etching effect to achieve a higher smoothness. Deionized water acts like a sponge. It absorbs pollutants and particles easily, and removes aggressively. Its purity promotes the formation of cavitation bubbles in ultrasonic cleaners. It is a different cleaning agent, which removes part of the pollutants in a wide range, realizes double removal of pollutants, and achieves high-efficiency dust removal results in a vacuum state.
最后在键合上,现有技术主要是通过加热实现,温度是键合的关键作用,而本发明是在预设压力下进行的第二低温下的退火。相对于现有技术本发明需要键合机,在低温下,首先进行预键合,然后通过退火工艺,实现键合。Finally, in terms of bonding, the prior art is mainly realized by heating, and temperature is the key function of bonding, while the present invention is annealing at a second low temperature under a preset pressure. Compared with the prior art, the present invention requires a bonding machine, and at low temperature, pre-bonding is performed first, and then the bonding is realized through an annealing process.
上述技术方案的有益效果为:本发明创新性的使用PETEOS(高密度电浆条件下硅酸乙酯加热分解)在250℃~450℃下制备而成的二氧化硅层作为键合面,无需进行1000℃的高温热氧工艺,且后续也无需经行1000℃高温退火工艺。可以大大减少对工艺机台的要求,降低能耗,降低综合成本,最重要的是为很多无法承受高温的材料及产品创造了可行的工艺路线,输出可靠的工艺效果。The beneficial effect of the above technical solution is: the invention innovatively uses the silicon dioxide layer prepared at 250°C~450°C as the bonding surface by using PETEOS (thermally decomposing ethyl silicate under high-density plasma conditions), without Perform a high-temperature thermal oxygen process at 1000°C, and there is no need to undergo a high-temperature annealing process at 1000°C subsequently. It can greatly reduce the requirements for process machines, reduce energy consumption, and reduce overall costs. The most important thing is to create feasible process routes for many materials and products that cannot withstand high temperatures, and output reliable process effects.
实施例2:Example 2:
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
设置气相沉积台,并控制所述气相沉积台的温度条件在250℃~450℃之间;Setting up a vapor deposition platform, and controlling the temperature of the vapor deposition platform to be between 250°C and 450°C;
设置高密度电浆,并在所述高密度电浆的条件下,将二氧化硅进行沉积;setting a high-density plasma, and depositing silicon dioxide under the conditions of the high-density plasma;
在所述沉积完成过后,生成具备键合面的晶圆。After the deposition is complete, a wafer with a bonding surface is produced.
上述技术方案的工作原理为:本发明通过气相沉积台,可以在低温的情况下进行二氧化硅的沉积形成第一键合面,设置250℃和~450℃之间的原因是第一个达到低温的环境,但是又不能是特别低的温度,特别低的温度会导致二氧化硅层无法成型。但是还要设置一个前提条件,就是高密度电浆,高密度电浆主要的作用是蚀刻,但是在本发明中,它替代了现有技术中需要高温处理,实现键合面抛光的作用。The working principle of the above technical solution is: the present invention can deposit silicon dioxide at a low temperature to form the first bonding surface through the vapor deposition platform, and the reason for setting between 250°C and ~450°C is the first to reach A low temperature environment, but not a particularly low temperature, which will cause the silicon dioxide layer to fail to form. But there is also a precondition to be set, which is high-density plasma. The main function of high-density plasma is etching, but in the present invention, it replaces the need for high-temperature treatment in the prior art to realize the role of bonding surface polishing.
上述技术方案的有益效果为:本发明相对于现有技术,在形成键合面的时候,采用二氧化硅沉积和高密度电浆的处理,相对于现有技术,抛光效果更好,更能得到平滑的键合面。The beneficial effect of the above-mentioned technical solution is: compared with the prior art, the present invention adopts silicon dioxide deposition and high-density plasma treatment when forming the bonding surface. Compared with the prior art, the polishing effect is better, and the Get a smooth bonded surface.
实施例3:Example 3:
作为本发明的一种实施例:所述超声波探伤包括:As an embodiment of the present invention: the ultrasonic flaw detection includes:
对键合后的普通硅片一面进行红外线扫描,获取红外扫描图像;Infrared scanning is performed on one side of the bonded ordinary silicon wafer to obtain an infrared scanning image;
对所述红外扫描图像在颜色空间中进行颜色识别,判断是否存在颜色差异;其中,Carry out color recognition to described infrared scanning image in color space, judge whether there is color difference; Wherein,
当存在颜色差异时,表示键合结果不合格;When there is a color difference, it means that the bonding result is unqualified;
当不存在颜色差异时,通过超声波探头对键合后的半导体产品进行三向扫描;其中,When there is no color difference, the bonded semiconductor product is scanned in three directions by an ultrasonic probe; among them,
所述三向扫描包括:从所述普通硅片面进行直射探伤、从所述晶圆面进行直射探伤,从键合处进行横向探伤;The three-way scanning includes: performing direct-ray flaw detection from the ordinary silicon wafer surface, direct-ray flaw detection from the wafer surface, and lateral flaw detection from the bond;
根据所述三向扫描,分别获取三个不同超声波探伤的反射回波;According to the three-direction scanning, respectively acquire three reflected echoes of different ultrasonic flaw detections;
根据所述反射回波判断所述键合后的半导体产品有无气泡;judging whether there are bubbles in the bonded semiconductor product according to the reflected echo;
根据所述气泡,确定缺陷及相应的缺陷位置。According to the bubbles, the defects and corresponding defect positions are determined.
上述技术方案的工作原理为:本发明在键合成功之后,最主要的是进行检测,本发明采用的方式是超声波探伤,但是在超声波探伤之前,本发明首先采用的红外线扫描,因为硅是能够透过红外线的,所以,采用红外线扫描的时候,能够对键合效果不好的地方通过颜色差异进行及时的划分,不过,红外扫描的方式只能发现大的缺陷,对于极小的气泡,或者颜色差异不大的地方无法发现,所以本发明又采用通过超声波探伤,从键合后,半导体的上面,下面和侧面三个面进行三向的超声波探伤,通过这种方式,如果三个方向都发现,某一点存在瑕疵,存在缺陷,必定是键合的效果不太好。超声波探伤的结果如附图2和3所示。现有技术中,存在通过超声波实现固有频率的键合方法,但是与本发明通过超声波进行探伤是完全不同的技术方案。The working principle of the above-mentioned technical solution is: after the bonding is successful, the most important thing of the present invention is to perform detection. The method adopted by the present invention is ultrasonic flaw detection, but before the ultrasonic flaw detection, the present invention firstly adopts infrared scanning, because silicon can Through infrared, so when infrared scanning is used, it is possible to timely divide the places with poor bonding effect through color differences. However, infrared scanning can only find large defects, for extremely small bubbles, or The place where the color difference is not large can not be found, so the present invention uses ultrasonic flaw detection again. After bonding, three-way ultrasonic flaw detection is carried out from the top, bottom and side surfaces of the semiconductor. In this way, if the three directions are all It is found that there is a flaw at a certain point, and if there is a flaw, it must be that the bonding effect is not very good. The results of ultrasonic flaw detection are shown in Figures 2 and 3. In the prior art, there is a bonding method that realizes the natural frequency by ultrasonic waves, but it is a completely different technical solution from the flaw detection by ultrasonic waves in the present invention.
上述技术方案的有益效果为:本发明通过创新型的双重筛选方式,对键合后的半导体进行探伤,判断键合效果是否合适,相对于现有技术,本发明不仅实现了键合,还能发现键合后的缺陷。The beneficial effect of the above-mentioned technical solution is: the present invention detects the flaws of the bonded semiconductors through an innovative double screening method, and judges whether the bonding effect is appropriate. Compared with the prior art, the present invention not only achieves bonding, but also Find post-bonding defects.
实施例4:Example 4:
作为本发明的一种实施例:所述研磨测试包括:As an embodiment of the present invention: the grinding test includes:
将所述键合后的半导体产品按照设定的预设转位固定第一转盘和第二转盘之间;Fixing the bonded semiconductor product between the first turntable and the second turntable according to the set preset indexing;
设置第一转盘和第二转盘的转力区间,根据所述转力区间的最低转力值,控制键合后的半导体产品随第一转盘和第二转盘的相互反向运动,进行整面研磨,并在所述第一转盘和第二转盘的转力值达到所述转力区间的最大值时,停止转动,并判度所述半导体产品是否脱落,当不脱落时,达到第一键合强度标准,并确定整面研磨的研磨时间;其中,Set the rotation ranges of the first turntable and the second turntable, and control the bonded semiconductor products to move in opposite directions with the first turntable and the second turntable according to the lowest rotation value in the rotation range, and perform full-surface grinding , and when the torque values of the first turntable and the second turntable reach the maximum value of the rotation force range, stop the rotation, and judge whether the semiconductor product falls off, and when it does not fall off, reach the first bonding Intensity criteria and determine the grinding time for full face grinding; where,
在所述整面研磨时,所述半导体产品的正反两面粗糙度增加;When the entire surface is ground, the roughness of the front and back sides of the semiconductor product increases;
在所述半导体达到第一键合强度标准时,通过所述第一转盘和第二转盘对所述半导体产品进行边缘研磨,并设置边缘研磨时间和所述整面研磨时间相同,在边缘研磨完成后,判度所述半导体产品是否脱落,当不脱落时,达到第二键合强度标准,When the semiconductor reaches the first bonding strength standard, edge grinding is performed on the semiconductor product through the first turntable and the second turntable, and the edge grinding time is set to be the same as the entire surface grinding time, after the edge grinding is completed , to determine whether the semiconductor product falls off, and when it does not fall off, it reaches the second bonding strength standard,
在所述半导体产品达到所述第二键合强度标准后,将所述半导体产品设置在脉冲磁场中,并通过磁性磨料进行切削研磨,并将所述键合后的半导体产品键合的两面研磨的厚度研磨至100um~200um,再次判断所述半导体产品有无脱落,并在无脱落时,达到目标键合强度标准。After the semiconductor product reaches the second bonding strength standard, the semiconductor product is placed in a pulsed magnetic field, and the magnetic abrasive is used for cutting and grinding, and the bonded two sides of the bonded semiconductor product are ground Grind to a thickness of 100um~200um, judge again whether the semiconductor product has fallen off, and when there is no falloff, reach the target bonding strength standard.
上述技术方案的工作原理为:本发明的键合效果测试包括两种,除了进行超声波的探测,剩下的就是进行研磨测试,研磨主要是为了判断在研磨后,如果键合的两部分分离了就表示键合效果不好,如果不分离,就表示键合效果很好。The working principle of the above-mentioned technical solution is: the bonding effect test of the present invention includes two types. In addition to the ultrasonic detection, the rest is to carry out the grinding test. The grinding is mainly to judge if the two bonded parts are separated after grinding. It means that the bonding effect is not good, and if it does not separate, it means that the bonding effect is good.
因为现有技术中的研磨,没有什么固定的标准,研磨的主要作用是为了削薄整个半导体产品,对于研磨中对于键合强度的测试,属于削薄过程中的附带能力,一般情况下,键合强度很低。Because there is no fixed standard for grinding in the prior art, the main function of grinding is to thin the entire semiconductor product. For the test of bonding strength in grinding, it belongs to the incidental ability of the thinning process. The joint strength is very low.
因此本发明结合键合的时候我们对于键合产品的整体,我们设定的厚薄的研磨标准,市场上最佳的厚度在100um~200um之间。我们根据这个标准,通过三重研磨判断是不是键合合格,同时达到削薄和键合强度测试的能力。Therefore, when the present invention combines bonding, we set the thickness grinding standard for the whole bonding product, and the best thickness in the market is between 100um and 200um. According to this standard, we judge whether the bonding is qualified through triple grinding, and at the same time achieve the ability of thinning and bonding strength testing.
在这个过程中,我们设置了两个转盘,这两个转盘是会在一定的转力区间内进行转动,这个转力区间就是随着对键合后半导体产品的研磨,粗糙度增加之后的最大测试力度,因为越粗糙,必定需要的研磨力越大。这个研磨的转力区间是通过多次的实验测试得到。基于转力区间,进行第一次研磨,获得第一个键合强度标准,达到这个键合强度标准的时候,已经比市面上所有的键合测试方式,测试的最高强度要高了,但是,市面上现有的测试方式,主要还是削薄,本发明是弄得更加粗糙,相对于来说,粗糙是有利于更好的进行键合强度测试,但是不利于削薄,变得平整。In this process, we set up two turntables, and these two turntables will rotate within a certain range of rotation force. This range of rotation force is the maximum after the roughness increases with the grinding of the bonded semiconductor product. Test the strength, because the rougher it is, the greater the grinding force must be. The grinding torque range is obtained through multiple experimental tests. Based on the rotation force range, the first grinding is carried out to obtain the first bonding strength standard. When this bonding strength standard is reached, the highest strength of the test is already higher than all bonding test methods on the market. However, The existing test methods on the market are mainly thinning. The present invention makes it rougher. Relatively speaking, roughness is conducive to better bond strength testing, but it is not conducive to thinning and making it smooth.
在第一键合强度标准达到之后,市面上只是一次测试,就是整片研磨,整片研磨的时候受力比较均匀,因此,键合强度的测试力度是整体均分的,测试效果就不会特别好,因此本发明设置了边缘研磨,这个边缘一般是半导体产品两面的深度达到百分之三十的边缘区域,边缘研磨的时候,受力只是边缘的一点,对其它部分存在一个拉扯力,如果键合强度不高,很容易拉扯分离。所以这是第二个键合强度测试,达到这个键合强度,键合强度标注已经非常高了,这时候就要处理对于研磨过程中,两个面的粗糙,不平滑的状态。我们采用了脉冲磁场,通过磁性磨料进行厚度研磨,顺便进行厚薄调整,这些磁性磨料在脉冲磁场的作用下,沿着磁感线水平均匀的同步研磨,进而,能够快速的达到想要的厚度,同时水平研磨,沿着磁感线,能够达到同步研磨,对于水平度不一样的地方,因为都在一条磁感线上,凹凸不平的地方只对凸的地方研磨。当然这个磁场是认为设置的水平的磁场,不是电磁铁类似的圆形磁场,这个水平磁场又对称平行的两个永磁体构成,具有水平的中轴线,构成水平的正向对称磁场。After the first bonding strength standard is reached, there is only one test on the market, that is, the whole chip is ground, and the force is relatively uniform when the whole chip is ground. It is particularly good, so the present invention is provided with edge grinding, and this edge is generally the edge area where the depth of both sides of the semiconductor product reaches 30%. When the edge is ground, the force is only a point on the edge, and there is a pulling force on other parts. If the bonding strength is not high, it is easy to pull and separate. So this is the second bond strength test. When this bond strength is reached, the bond strength mark is already very high. At this time, it is necessary to deal with the rough and uneven state of the two surfaces during the grinding process. We use a pulsed magnetic field to grind the thickness through magnetic abrasives, and adjust the thickness by the way. Under the action of the pulsed magnetic field, these magnetic abrasives are evenly and synchronously ground along the magnetic induction line, and then can quickly reach the desired thickness. At the same time, horizontal grinding, along the magnetic induction line, can achieve synchronous grinding. For places with different levels, because they are all on the same magnetic induction line, the uneven places only grind the convex places. Of course, this magnetic field is a horizontal magnetic field that is considered to be set, not a circular magnetic field similar to an electromagnet. This horizontal magnetic field is composed of two symmetrical and parallel permanent magnets, with a horizontal central axis, forming a horizontal positive symmetrical magnetic field.
上述技术方案的有益效果为:本发明通过强硬的物理研磨手段,去判断键合的效果是不是符合标准。The beneficial effects of the above technical solution are: the present invention judges whether the bonding effect meets the standard through strong physical grinding means.
实施例5:Example 5:
作为本发明的一种实施例:所述电子云活化包括:As an embodiment of the present invention: the electronic cloud activation includes:
设置第一机台,并将所述晶圆放在第一机台中;其中,setting the first platform, and placing the wafer in the first platform; wherein,
第一机台设置有增氧装置和两个激光发射装置;The first machine is equipped with an oxygen increasing device and two laser emitting devices;
将所述晶圆进行放置在高氧气密度的环境中;placing the wafer in an environment with high oxygen density;
分别设置第一激光束和第二激光束,通过第一激光束投射所述晶圆,生成离子束团;setting the first laser beam and the second laser beam respectively, and projecting the wafer through the first laser beam to generate ion clusters;
通过第二激光束投射所述离子束团的外围,生成中空电子云。A hollow electron cloud is generated by projecting the periphery of the ion bunch with a second laser beam.
上述技术方案的工作原理为:本发明在进行电子云活化的时候,因为电子云生成的方式有很多种,但是,最适合本发明的就是激光生成电子云,因为可以进行定向生成电子云进行活化,所以本发明通过设置对应的机台,提供一个高氧气密度的环境,通过两束不同的激光生成中空的电子云,实现对本发明晶圆的活化。The working principle of the above-mentioned technical solution is: when the present invention activates the electron cloud, there are many ways to generate the electron cloud, but the most suitable method for the present invention is the laser-generated electron cloud, because the electronic cloud can be generated directionally for activation , so the present invention provides a high oxygen density environment by setting up the corresponding machine, and generates a hollow electron cloud through two different laser beams to realize the activation of the wafer of the present invention.
上述技术方案的有益效果为:本发明能够通过激光的方式实现晶圆活化,相对于现有技术,本发明更加方便,不仅能活化,还是实现基于电子云的定向活化,活化的时候更加全面。The beneficial effects of the above technical solution are: the present invention can realize wafer activation by means of laser. Compared with the prior art, the present invention is more convenient, not only can activate, but also realize directional activation based on electron cloud, and the activation is more comprehensive.
实施例6:Embodiment 6:
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
设置第二机台,将所述电子云活化后的晶圆放置在所述第二机台中;其中,A second machine is set, and the wafer activated by the electron cloud is placed in the second machine; wherein,
所述第二机台设置有无菌水槽和离子水洗槽;The second machine is provided with a sterile water tank and an ion water washing tank;
将所述电子云活化后的晶圆先放置在所述无菌水槽进行浸泡1H;The wafer after the electron cloud activation is first placed in the sterile water tank for 1H soaking;
在浸泡结束后,通过所述离子水洗槽进行离子水洗涤,直至所述电子云活化后的晶圆中存在氢键。After the immersion, the ion water washing tank is used for washing with ion water until hydrogen bonds exist in the wafer after the activation of the electron cloud.
上述技术方案的工作原理为:在活化之后,就是生成氢键,本发明相对于现有技术中的方式,本发明更加的方便生成氢键,现有技术,高温活化之后,通过化学溶液生成非桥键的羟基,这种方式生成的非桥键的氢键必定在在平滑度上存在一定的问题,而本发明无菌水先行浸泡,这样会使得活化的表面更加温润,然后通过离子水洗涤,就很容易产生氢键。The working principle of the above technical solution is: after activation, hydrogen bonds are generated. Compared with the methods in the prior art, the present invention is more convenient to generate hydrogen bonds. In the prior art, after high temperature activation, non-hydrogen bonds are generated through chemical solutions. The hydroxyl group of the bridging bond, the non-bridging hydrogen bond generated in this way must have certain problems in smoothness, and the sterile water of the present invention is first soaked, which will make the activated surface more moist, and then washed by ionized water , it is easy to form hydrogen bonds.
上述技术方案的有益效果为:相对于现有技术本发明更加的方便,而且能够更加快速的生成更多的氢键,达到更好的键合效果。The beneficial effects of the above technical solution are: compared with the prior art, the present invention is more convenient, and more hydrogen bonds can be generated more quickly to achieve a better bonding effect.
实施例7:Embodiment 7:
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
设置键合机;其中,Set up the bonder; where,
所述键合机存在真空室和常压室;There is a vacuum chamber and a normal pressure chamber in the bonding machine;
将所述引入氢键后的晶圆和普通硅片放置在所述键合机中,并设置所述键合机的压力为:60KN~120KN之间。Place the hydrogen-bonded wafer and ordinary silicon wafer in the bonding machine, and set the pressure of the bonding machine to be between 60KN and 120KN.
上述技术方案的工作原理为:在键合的时候,现有技术,是通过高温退火工艺的直接键合。但是本发明设置对应的键合机,首先通过这个键合机进行预键合,设置一定的压力通过压力保证键合的效果。The working principle of the above technical solution is: when bonding, the prior art is direct bonding through a high temperature annealing process. However, in the present invention, a corresponding bonding machine is provided, and pre-bonding is performed through this bonding machine first, and a certain pressure is set to ensure the bonding effect through pressure.
上述技术方案的有益效果为:相对于现有技术中的直接高温退火键合,本发明复杂了流程,但是,本发明再将流程划分之后,键合更加的方便。不需要高温,更适合多种不同的材料。The beneficial effects of the above technical solution are: compared with the direct high-temperature annealing bonding in the prior art, the present invention complicates the process, but after the present invention divides the process, the bonding is more convenient. Does not require high temperatures and is more suitable for many different materials.
实施例8:Embodiment 8:
作为本发明的一种实施例:所述第二低温下进行退火包括:As an embodiment of the present invention: performing annealing at the second low temperature includes:
将所述键合完成后的晶圆和普通硅片放入烘箱,并设置烘箱温度为300℃~500℃之间;Put the bonded wafer and ordinary silicon wafer into an oven, and set the temperature of the oven to be between 300°C and 500°C;
根据所述烘箱,进行退火,生成键合后的半导体产品。According to the oven, annealing is performed to produce a bonded semiconductor product.
上述技术方案的工作原理为:本发明在预键合之后通过第二低温进行键合,但是需要放入烘箱之中,通过温度的逐渐增高实现更好的退火键合。The working principle of the above technical solution is: the present invention performs bonding at a second low temperature after pre-bonding, but needs to be placed in an oven to achieve better annealing bonding by gradually increasing the temperature.
上述技术方案的有益效果为:因为本发明提前进行了预键合,所以退火工艺的时候,就不需要太高的温度,去实现键合。The beneficial effects of the above technical solution are: because the present invention performs pre-bonding in advance, during the annealing process, too high temperature is not required to realize the bonding.
实施例9:Embodiment 9:
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
将所述硅片的上表面进行深硅刻蚀并进行热氧处理;Carrying out deep silicon etching and thermal oxygen treatment on the upper surface of the silicon wafer;
将热氧处理后的硅片的上表面进行减薄处理,再在其上表面进行顶硅刻蚀;Thinning the upper surface of the silicon wafer after thermal oxygen treatment, and then etching the top silicon on the upper surface;
顶硅刻蚀后的硅片的下表面进行减薄去硅处理,并除去氧化层,得到目标硅片。The lower surface of the silicon wafer after top silicon etching is thinned and desiliconized, and the oxide layer is removed to obtain the target silicon wafer.
上述技术方案的工作原理为:对于硅片,越平滑的硅片在键合的时候效果越好,另外本发明的键合检测时同红外扫描的方式和超声波的方式,需要达到一定的条件才能实现检测,也就是硅片需要薄到能够实现检测的程度,这时候就需要上述步骤。The working principle of the above-mentioned technical solution is: for silicon wafers, the smoother silicon wafers are more effective when bonding. In addition, the bonding detection of the present invention is the same as the infrared scanning method and the ultrasonic method, and it needs to meet certain conditions to be able to To achieve detection, that is, the silicon wafer needs to be thin enough to enable detection, and the above steps are required at this time.
上述技术方案的有益效果为:本发明通过对硅片的预先处理,是的硅片能够更好的进行键合,使得键合面更加的平滑,还能达到实现最终的键合检测的厚薄要求。The beneficial effects of the above technical solution are: the present invention can better bond the silicon wafers through the pretreatment of the silicon wafers, making the bonding surface smoother, and can also meet the thickness requirements for final bonding detection .
实施例10:Example 10:
作为本发明的一种实施例:所述方法还包括:As an embodiment of the present invention: the method also includes:
设置气体混合物,并在所述气体混合物上安装电极,通过电极施加电场;providing a gas mixture, and installing electrodes on said gas mixture through which an electric field is applied;
根据所述电场,通过带电粒子碰撞所述气体混合物的气体分子,生成电浆;其中,A plasma is generated by charged particles colliding with gas molecules of the gas mixture according to the electric field; wherein,
所述电场的强度由所述电极的电压确定,所述带电粒子的速度由所述电场的强度确定。The strength of the electric field is determined by the voltage of the electrodes, and the velocity of the charged particles is determined by the strength of the electric field.
上述技术方案的工作原理为:本发明的高密度电浆,是需要一定的生成条件的,现有技术多时通过气体混合物产生电浆,但是高密度电浆就很难产生了,所以本发明通过电极施加电场,通过电场强度调节带电粒子的速度,从而达到实现生成高密度电浆的目的。The working principle of the above-mentioned technical solution is: the high-density plasma of the present invention requires certain generation conditions. In the prior art, the gas mixture is often used to generate plasma, but high-density plasma is difficult to produce, so the present invention passes The electrodes apply an electric field, and the velocity of the charged particles is adjusted through the strength of the electric field, so as to achieve the purpose of generating high-density plasma.
上述技术方案的有益效果为:相对于现有技术来说,本发明虽然生成高密度电浆的方式简单,原理简单,但是更加符合本发明的适用场景,如果键合的两个面就存在电极的情况下,本发明就不需要施加电极了,节约了流程。The beneficial effect of the above-mentioned technical solution is: compared with the prior art, although the method and principle of the present invention to generate high-density plasma are simple, it is more in line with the applicable scene of the present invention. If there are electrodes on the two surfaces of the bonding In the case of the present invention, there is no need to apply electrodes, which saves the process.
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and equivalent technologies thereof, the present invention also intends to include these modifications and variations.
Claims (7)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210327717.1A CN114420549B (en) | 2022-03-31 | 2022-03-31 | Method for bonding silicon dioxide surface and silicon surface at low temperature |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210327717.1A CN114420549B (en) | 2022-03-31 | 2022-03-31 | Method for bonding silicon dioxide surface and silicon surface at low temperature |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114420549A CN114420549A (en) | 2022-04-29 |
| CN114420549B true CN114420549B (en) | 2022-11-18 |
Family
ID=81263724
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210327717.1A Active CN114420549B (en) | 2022-03-31 | 2022-03-31 | Method for bonding silicon dioxide surface and silicon surface at low temperature |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114420549B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119208247A (en) * | 2023-06-25 | 2024-12-27 | 润芯感知科技(南昌)有限公司 | Method for manufacturing semiconductor structure |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6911375B2 (en) * | 2003-06-02 | 2005-06-28 | International Business Machines Corporation | Method of fabricating silicon devices on sapphire with wafer bonding at low temperature |
| US7776718B2 (en) * | 2007-06-25 | 2010-08-17 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor substrate with reduced gap size between single-crystalline layers |
| US20090004764A1 (en) * | 2007-06-29 | 2009-01-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate and method for manufacturing semiconductor device |
| JP5455595B2 (en) * | 2008-12-11 | 2014-03-26 | 信越化学工業株式会社 | Manufacturing method of bonded wafer |
| FR2963982B1 (en) * | 2010-08-20 | 2012-09-28 | Soitec Silicon On Insulator | LOW TEMPERATURE BONDING PROCESS |
| US8772130B2 (en) * | 2011-08-23 | 2014-07-08 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of SOI substrate |
| CN109411340A (en) * | 2018-10-31 | 2019-03-01 | 德淮半导体有限公司 | Wafer bonding method |
| CN109545672A (en) * | 2018-11-21 | 2019-03-29 | 德淮半导体有限公司 | Wafer bonding method and bonded wafer |
| US10971472B2 (en) * | 2019-07-09 | 2021-04-06 | Mikro Mesa Technology Co., Ltd. | Method of liquid assisted bonding |
-
2022
- 2022-03-31 CN CN202210327717.1A patent/CN114420549B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN114420549A (en) | 2022-04-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107633997B (en) | A wafer bonding method | |
| JP4379943B2 (en) | Semiconductor substrate manufacturing method and semiconductor substrate manufacturing apparatus | |
| US9177601B1 (en) | Multiple cleaning processes in a single tank | |
| TWI718279B (en) | Manufacturing method of composite wafer with oxide single crystal film | |
| US8530331B2 (en) | Process for assembling substrates with low-temperature heat treatments | |
| US7776719B2 (en) | Method for manufacturing bonded wafer | |
| US6900113B2 (en) | Method for producing bonded wafer and bonded wafer | |
| CN101981654B (en) | Method for producing SOI substrate | |
| US9496130B2 (en) | Reclaiming processing method for delaminated wafer | |
| CN114420549B (en) | Method for bonding silicon dioxide surface and silicon surface at low temperature | |
| CN104078407A (en) | Thin film and method for manufacturing thin film | |
| TW200913128A (en) | Method for manufacturing SOI wafer | |
| US8772132B2 (en) | Method of manufacturing laminated wafer by high temperature laminating method | |
| CN111009496B (en) | A kind of semiconductor substrate with high thermal conductivity and preparation method thereof | |
| EP1134808A1 (en) | Method for producing bonded wafer and bonded wafer | |
| CN106683998A (en) | Flexible substrate pretreatment process | |
| US20080057678A1 (en) | Semiconductor on glass insulator made using improved hydrogen reduction process | |
| KR20060039016A (en) | Method for manufacturing thin semiconductor material from donor wafer both sides | |
| CN112786448A (en) | Processing technology of IGBT wafer | |
| EP3696869A1 (en) | Nano-scale single crystal thin film | |
| CN119910511B (en) | A plasma double-sided diamond polishing device and polishing method | |
| CN110190025A (en) | A kind of etching method for forming through hole of single layer silicon substrates | |
| Li et al. | Room temperature wafer bonding by surface activated ALD-Al2O3 | |
| JP2009246323A (en) | Production process for soi substrate | |
| CN119072769A (en) | Method of forming a composite substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20230412 Address after: 1st Floor, Nanchang High tech Microelectronics Technology Park, No. 588 Tianxiang North Avenue, High tech Development Zone, Nanchang City, Jiangxi Province, 330224 Patentee after: Runxin Perception Technology (Nanchang) Co.,Ltd. Patentee after: China Resources Microelectronics Holding Co.,Ltd. Address before: 518110 508, Zhongke building, Gaoxin South 1st Road, Nanshan District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Newsonic Technologies Co.,Ltd. |
|
| TR01 | Transfer of patent right |