CN114852948B - MEMS sensor integrated device based on through silicon via and manufacturing method thereof - Google Patents

Abstract

The present disclosure relates to a through-silicon via-based MEMS sensor integrated device and a manufacturing method thereof. The device includes: a plurality of vertically stacked sensors and an interconnection layer between the sensors; each sensor includes a sensor body and a base body carrying the sensor body and provided with a plurality of through silicon holes; the test electrode of the sensor body is located above the base body and connected to The corresponding through silicon holes and sensitive material layers cover the test electrodes; the sensitive layer holes of each interconnection layer are used to accommodate the sensitive material layer of the sensor below; the interconnections are respectively provided in the multiple line through holes of each interconnection layer Both ends of the line are connected to the test electrode of the lower sensor and the through silicon via of the upper sensor respectively. Each through silicon via in each sensor belongs to a different through silicon via group, and the through silicon vias in each through silicon via group are interconnected. The lines are connected in series, and the symmetry axes of each through silicon hole in at least one through silicon hole group are coincident. The device integration density is higher, the package size is smaller, the power consumption and cost are lower, and the application range is wide.

Description

MEMS sensor integrated device based on through silicon vias and manufacturing method thereof

Technical Field

The present disclosure relates to the technical field of integrated circuit packaging, and in particular to a through-silicon via-based MEMS sensor integrated device and a manufacturing method thereof.

Background technique

With the improvement of manufacturing level, Micro Electro Mechanical System (MEMS) technology is gradually being applied to the field of sensors. Compared with traditional sensors, MEMS sensors are smaller in size, lighter in weight, lower in power consumption, and lower in cost, making them more suitable for integration in smart devices and wearable devices. Therefore, MEMS sensors are gradually becoming one of the important directions in this field.

While pushing sensors towards miniaturization, the design of sensor chips in related technologies has been challenged. For example, device miniaturization requires higher reliability and smaller three-dimensional packaging; the sensitive film coating process needs to be better compatible with the wafer-level preparation process; and a more efficient tape-out process requires wafer-level ball implantation and packaging process design. In addition, the demand for miniaturization of sensors has also put forward higher requirements for the mass production of micro-sensors in the industry. The complex and tiny device structure requires stricter failure analysis and stress control in the entire production process. The goals of mass production and low cost require the device to adopt wafer-level packaging, and the preparation of sensitive films requires compatibility with micro-nano processing technology and wafer-level substrates.

Therefore, how to improve a thin film sensor and its manufacturing method that can solve the above problems is an urgent problem to be solved.

Sensors are indispensable devices for electronic devices to sense the air and environment. Therefore, sensors are widely used in various fields such as environment, energy, petrochemicals, medical care, industry and national defense, and have become one of the high-tech development directions of various countries. With the development of microelectronics technology and the improvement of chip integration, miniaturization, low power consumption and high comprehensive performance of sensors have become a development trend.

Micro-Electro-Mechanical System (MEMS) technology integrates the heating element and sensitive element of the sensor device. Compared with traditional ceramic substrate-based sensors, microstructured gas sensors using MEMS technology have small size. , low power consumption, high sensitivity, good repeatability, easy mass production and other advantages, it has become a research hotspot.

In order to further expand the functional scope and application fields of micro-sensor devices, it is necessary to promote microsystems towards higher integration density, smaller package size, lower power consumption, and lower cost structures. However, the typical structure of MEMS sensors in related technologies still requires the packaging method of wire-bonding lead-out electrodes, which cannot achieve wafer-level packaging. As a result, the size of the device is limited by external packaging and cannot be further reduced, and the MEMS processing technology cannot be fully utilized. The advantages of miniaturized devices are not conducive to the preparation of high-density arrays of sensors, which limits the application range of sensors.

How to provide a MEMS sensor integrated device with higher integration density, smaller package size, lower power consumption, and lower cost is a technical problem that needs to be solved urgently.

Summary of the invention

In view of this, the present disclosure proposes a through-silicon via-based MEMS sensor integrated device and a manufacturing method thereof.

According to an aspect of the present disclosure, a MEMS sensor integrated device based on through silicon vias is provided. The device includes: a plurality of vertically stacked sensors and an interconnection layer between two adjacent sensors, each of which is The sensor includes a sensor body and a base body for carrying the sensor body;

The base body is provided with a plurality of through silicon holes; the sensor body includes a test electrode and a sensitive material layer; the test electrode is located above the base body and connected to the corresponding through silicon hole; the sensitive material layer Cover the target area of the test electrode;

Each of the interconnection layers includes a sensitive layer hole and a plurality of line through holes. Each of the line through holes is provided with an interconnection line. Both ends of each of the interconnection lines are respectively connected to the test of the sensor below the interconnection layer. The through silicon holes of the electrodes and sensors above the interconnection layer, and each of the sensitive layer holes is used to accommodate the sensitive material layer of the sensor below the interconnection layer;

The multiple silicon vias in each of the sensors belong to different silicon via groups, each of the silicon via groups includes silicon vias in the multiple silicon vias of each sensor that are connected in series through the interconnection lines, and the symmetry axes of the silicon vias in at least one of the silicon via groups coincide.

In a possible implementation, the base body further includes a substrate, a dielectric layer and a first insulating layer;

The dielectric layer covers at least a portion of the first surface of the substrate, and each of the through silicon vias penetrates the substrate and the dielectric layer;

The first insulating layer covers the second surface of the substrate and at least exposes a through-hole region corresponding to each of the through-silicon vias;

Wherein, the test electrode is located above the dielectric layer.

In a possible implementation, the sensor body further includes: a heating electrode and a second insulating layer,

The heating electrode is located above the dielectric layer and connected to the corresponding through silicon holes;

The second insulating layer is located above the dielectric layer and covers the surface of the heating electrode except the first connection area. The second insulating layer is provided with at least two electrode through holes, each of the electrode through holes Exposing the through silicon via connected to the test electrode;

Wherein, the test electrode is located above the second insulating layer and the target area overlaps the heating electrode and is connected to the corresponding through silicon via through the electrode through hole.

In a possible implementation, the symmetry axes of the through silicon holes in each of the through silicon via groups coincide with each other, and are located at different locations from the symmetry axes of the through silicon holes in the through silicon via group. The straight lines are different.

In a possible implementation, there is at least one non-overlapping through silicon via group among the plurality of through silicon via groups, and at least two through silicon holes among the plurality of through silicon holes in the non-overlapping through silicon via group are The axes of symmetry do not coincide,

Wherein, the interconnection layer is also provided with metal wiring, the metal wiring is used to connect the test electrode of the sensor below the interconnection layer and the through silicon via of the sensor above the interconnection layer, and/or, the metal wiring Used to connect the heating electrode of the sensor below the interconnect layer to the through silicon via of the sensor above the interconnect layer.

In a possible implementation, the multiple sensors include a gas sensor, a temperature sensor, and an acceleration sensor. In the device, the gas sensor is located above the temperature sensor, and the acceleration sensor is located below the temperature sensor.

In a possible implementation, the device further includes: a substrate and an alarm module. The lowest sensor among the plurality of sensors and the alarm module are fixed on the substrate and electrically connected through the substrate. ,

The alarm module is configured to issue an alarm prompt when it is determined that the alarm conditions are met based on the detection results of each of the sensors.

In a possible implementation manner, the diameter of each through silicon hole is 20 μm to 50 μm, and the aspect ratio of each through silicon hole is 5:1 to 10:1.

In a possible implementation, the shape of the heating electrode includes an extensible shape, and the extensible shape includes any one of a serpentine shape and an S-shape; and/or

The test electrode includes an interdigital electrode, the target area is a periodic pattern area of the interdigital electrode, and the extensible shape area of the heating electrode matches the size of the target area and overlaps in position.

According to another aspect of the present disclosure, a method for manufacturing a through-silicon via-based MEMS sensor integrated device is provided, which is characterized in that it is used to manufacture the above-mentioned through-silicon via-based MEMS sensor integrated device, and the method includes: sensor manufacturing steps and sensor stacking steps,

The sensor manufacturing steps include: preparing a dielectric layer on the first surface of the substrate; manufacturing a plurality of silicon through holes penetrating the substrate and the dielectric layer; preparing a first insulating layer on the second surface of the substrate, and etching the first insulating layer to at least expose the through hole area corresponding to each silicon through hole, so as to obtain the base of the sensor; manufacturing a test electrode above the dielectric layer; manufacturing a sensitive material layer above the target area of the test electrode, so as to obtain the sensor body, and complete the sensor manufacturing;

The sensor stacking step includes: preparing an interconnection layer above the lowest sensor based on the stacking sequence of multiple sensors in the device; etching the interconnection layer to form sensitive layer holes and multiple line through holes to pass through The sensitive layer holes expose the sensitive material layer, and the test electrodes are exposed through each of the line through holes; fill the line through holes with metal to form interconnection lines; connect the uppermost layer of the sensor to the The upper sensor adjacent to the lowermost sensor is fixed to the interconnection layer; the upper sensor is used as the lowermost sensor to continue fixing the next sensor until all the sensors are stacked.

Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the accompanying drawings.

The MEMS sensor integrated device based on through silicon vias and its manufacturing method provided by the embodiments of the present disclosure have higher integration density, smaller package size, lower power consumption and lower cost. And has a wide range of applications.

Description of drawings

The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and together with the description serve to explain the principles of the disclosure.

1 and 2 show a schematic structural diagram of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

3A and 3B show a schematic structural diagram of a sensor in a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

Figure 4 shows a schematic structural diagram of a heating electrode according to an embodiment of the present disclosure.

Figure 5 shows a schematic structural diagram of a test electrode according to an embodiment of the present disclosure.

Figure 6 shows a schematic structural diagram of a sensitive material layer according to an embodiment of the present disclosure.

FIG. 7 is a schematic diagram showing the relative positions of a heating electrode, a testing electrode, and a sensitive material layer according to an embodiment of the present disclosure.

FIG. 8 shows a schematic structural diagram of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

FIG. 9 shows a schematic structural diagram of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

FIG. 10 shows a schematic structural diagram of a capping layer in a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

FIG. 11 shows a schematic structural diagram of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

FIG. 12 shows a flow chart of a manufacturing method of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

FIG. 13 shows a schematic diagram of a process of manufacturing a sensor in a method of manufacturing a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

14 shows a schematic diagram of a process of sensor stacking in a manufacturing method of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

FIG. 15 shows a schematic diagram of the manufacturing process of the through silicon via in the manufacturing method of the through silicon via based MEMS sensor integrated device according to an embodiment of the present disclosure.

Detailed ways

Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numbers in the drawings identify functionally identical or similar elements. Although various aspects of the embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

The word "exemplary" as used herein means "serving as an example, example, or illustrative." Any embodiment described herein as "exemplary" is not necessarily to be construed as superior or superior to other embodiments.

In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the present disclosure.

In order to solve the above technical problems, the present disclosure provides a through-silicon via-based MEMS sensor integrated device and a manufacturing method thereof. The manufactured device has higher integration density, smaller package size, lower power consumption and more Low cost and wide application range.

1 and 2 show a schematic structural diagram of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure. As shown in Figures 1 and 2, the device includes a plurality of vertically stacked sensors and an interconnection layer 51 between two adjacent sensors. Each sensor includes a sensor body and a sensor for carrying the sensor. The main body of the body 1.

As shown in Fig. 1 and Fig. 2, the substrate 1 is provided with a plurality of through silicon vias 15. The sensor body comprises a test electrode 20 and a sensitive material layer 21. The test electrode 20 is located above the substrate 1 and connected to the corresponding through silicon vias 15. The sensitive material layer 21 covers the target area of the test electrode 20.

As shown in Figures 1 and 2, each of the interconnection layers 51 includes a sensitive layer hole 511 and a plurality of line through holes 512. Each of the line through holes 512 is provided with an interconnection line 513. Each of the interconnection lines The two ends of 513 are respectively connected to the test electrode 20 of the sensor below the interconnection layer 51 and the through silicon hole 15 of the sensor above the interconnection layer 51. Each of the sensitive layer holes 511 is used to accommodate the sensor below the interconnection layer 51. Sensitive material layer 21. The sensitive layer hole 511 may be a through hole as shown in FIG. 1 and FIG. 2 . Alternatively, if the working process of the sensitive material layer 21 is not affected by whether it is covered with a film layer, the sensitive layer holes 511 may not be provided in the interconnection layer 51 . In this case, the interconnection layer 51 directly covers the surface of the sensitive material layer 21 .

In a possible implementation, as shown in FIG. 1 and FIG. 2 , the plurality of TSVs 15 in each of the sensors belong to different TSV groups, each TSV group includes TSVs 15 connected in series through the interconnection lines among the plurality of TSVs 15 in each of the sensors, and the symmetry axes of the TSVs 15 in at least one TSV group coincide. For example, the plurality of TSVs 15 in the dashed box 80 shown in FIG. 1 and FIG. 2 belong to the same TSV group, and the symmetry axes of the TSVs 15 coincide.

In a possible implementation, as shown in FIG. 2 , there may be at least one non-overlapping through silicon via group among the plurality of through silicon via groups, and the plurality of through silicon vias 15 of the non-overlapping through silicon via group The symmetry axes of at least two through silicon holes 15 do not coincide. Then the interconnection layer 51 is also provided with a metal wiring 514. The metal wiring 514 is used to connect the test electrode of the sensor below the interconnection layer and the through silicon via of the sensor above the interconnection layer, and/or the metal wiring 514. The wiring 514 is used to connect the heating electrode of the sensor below the interconnection layer and the through silicon via of the sensor above the interconnection layer. Each of the plurality of through silicon via groups may be a non-overlapping through silicon via group.

In this embodiment, the substrate 11 may be a silicon substrate. The material of the sensitive material layer can be oxide, metal, polymer, etc., and different materials can be switched according to actual needs. The sensitive material layer can be formed using film-forming processes such as self-assembly, whole-wafer coating, and sputtering, and can be patterned through photolithography to be better compatible with wafer-level manufacturing technology. Among them, a certain voltage can be applied to both ends of the test electrode during the working process of the sensor body. When the sensitive material layer undergoes specific changes during the sensing process, the electrical signal at both ends of the test electrode will change. This can be achieved by reading the signal change. Test accordingly.

3A and 3B show a schematic structural diagram of a sensor in a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure.

In a possible implementation, as shown in FIG. 3A and FIG. 3B , the base 1 further includes a substrate 11 , a dielectric layer 12 and a first insulating layer 16 . The dielectric layer 12 covers at least part of the first surface of the substrate 11 , and each of the through silicon holes 15 penetrates the substrate 11 and the dielectric layer 12 . The first insulating layer 16 covers the second surface of the substrate 11 and exposes at least the through hole area 17 corresponding to each of the through silicon holes 15 . Wherein, the test electrode 20 is located above the dielectric layer 12 .

In this implementation, a dielectric layer is used to isolate the substrate from the test electrode in the sensor body and the heating electrode described below. The dielectric layer can be an ONO dielectric layer. The ONO dielectric layer can be a silicon oxide (SiO ₂ )/silicon nitride (SiN _x )/silicon oxide layer. Plasma Enhanced Chemical Vapor Deposition (PECVD) and other processes can be used. preparation. Since silicon nitride and silicon oxide have opposite thermal expansion characteristics, the additional stress caused by thermal expansion can be reduced in high-temperature processes, so the dielectric layer can be set as an ONO dielectric layer. For example, as shown in FIG. 3B , the dielectric layer 12 may include a silicon oxide layer 121 , a silicon nitride layer 122 and a silicon oxide layer 123 .

In this implementation manner, the material of the first insulating layer may be an insulating material such as silicon oxide, and the thickness of the first insulating layer may be 300 nm to 1000 nm. Those skilled in the art can set the materials and sizes of the dielectric layer and the first insulating layer according to actual needs, and this disclosure does not limit this.

In a possible implementation, as shown in FIG3B , in the case where the sensitive material layer 21 in the manufactured sensor needs to be heated to a certain temperature before it can work normally, the sensor body further includes: a heating electrode 18 and a second insulating layer 19. The heating electrode 18 is located above the dielectric layer 12 and connected to the corresponding through-silicon vias 15. The second insulating layer 19 is located above the dielectric layer 12 and covers the surface of the heating electrode 18 except the first connection area 181 (as shown in FIG4 ). The second insulating layer 19 is provided with at least two electrode through holes 191, each of which exposes the through-silicon via 15 to which the test electrode 20 is connected. The test electrode 20 is located above the second insulating layer 19 and the target area overlaps with the heating electrode 18, and is connected to the corresponding through-silicon vias 15 through the electrode through holes 191.

In this implementation, the heating electrode 18 is used to generate heat when energized. This heat can heat the sensitive material layer 21 in the sensor body and adjust the temperature of the sensitive material layer 21 so that the sensitive material layer 21 can be used during the working process of the sensor. at the working temperature to ensure that the sensor body can perform corresponding detection. Wherein, if the sensor is a gas sensor (that is, a sensor used to detect gas types and/or concentrations in the external environment), the sensor body may also include a heating electrode 18, a second insulating layer 19, and a sensitive material layer 21. The material can be a gas-sensitive material, and the gas-sensitive material can specifically bind to gas molecules after being heated. The second insulating layer 19 is used to isolate the test electrode 20 and the heating electrode 18 so that the test electrode 20 and the heating electrode 18 are not connected to each other. The material of the second insulating layer 19 may be silicon oxide, silicon nitride or other insulating materials, which is not limited in this disclosure.

Figure 4 shows a schematic structural diagram of a heating electrode according to an embodiment of the present disclosure. Figure 5 shows a schematic structural diagram of a test electrode according to an embodiment of the present disclosure. Figure 6 shows a schematic structural diagram of a sensitive material layer according to an embodiment of the present disclosure. Figure 7 shows a schematic diagram of the relative positions of the heating electrode, the test electrode and the sensitive material layer according to an embodiment of the present disclosure. Among them, in order to more clearly illustrate the relative positional relationship between the heating electrode 18, the test electrode 20 and the sensitive material layer 21 in space, the second insulating layer 19 is not shown in FIG. 7 .

In one possible implementation, the shape of the heating electrode 18 may include an extensible shape, and the extensible shape may include a serpentine shape, an S shape, or other malleable shapes as shown in FIG. 4 and FIG. 7 . In this way, the length of the heating electrode can be increased. The heating electrode 18 may include a ductile shape region M1, a first connection region 181 for connecting the through silicon via 15, and a first wire region 182 for realizing connection between the ductile shape region M1 and the first connection region 181.

In a possible implementation, as shown in FIG. 5 , the test electrode 20 may be an interdigital electrode. Interdigital interdigital electrodes that are not connected to each other can be connected through the sensitive material layer 21 covering them. The test electrode 20 may include a periodic pattern area M2, a second connection area 201 for connecting the through silicon via 15, and a second wire area 202 for realizing connection between the periodic pattern area M2 and the second connection area 201. The target area may be the periodic pattern area M2.

Wherein, the width w1 of the ductile shape area M1 and the first wire area 182 in the heating electrode 18 is equal to the width w2 of the interdigital electrode (that is, the width of the periodic pattern area M2 and the second connection area 201), that is, w1= w2. The distance s1 between the strip metals in the ductile shape area M1 is the same as the distance s2 between the interdigitated electrodes (that is, the distance between the strip metals in the periodic pattern area M2), that is, s1=s2. Moreover, w1 and s1 can be equal. The extensible shape area M1 and the periodic pattern area M2 have the same size. The number of periods of the stretchable shape region M1 and the periodic pattern region M2 can also be the same. The number of periods of the stretchable shape region M1 shown in Figures 4 and 7 is 4, and the number of periods of the stretchable shape region M1 shown in Figures 5 and 7 is 4. The number of cycles of the pattern area M2 is four. The thickness of the heating electrode 18 and the thickness of the test electrode 20 may be the same, and the thickness may be 80 nm to 150 nm. For example, the thickness of the heating electrode 18 and the test electrode 20 is set to 110 nm.

In this implementation, the materials of the heating electrode 18 and the test electrode 20 may be metals such as titanium (Ti), platinum (Pt), etc., which are not limited in this disclosure.

In a possible implementation, as shown in FIGS. 6 and 7 , the sensitive material layer 21 may be a self-assembled cluster of spherical sensitive materials 211 . The size of the sensitive material layer 21 may be slightly smaller than or equal to the size of the periodic pattern area M2, so that the sensitive material layer 21 can completely cover the periodic pattern area M2 to ensure circuit conduction of the sensor.

In this embodiment, the sizes of the sensitive material layer 21, the test electrode 20, and the heating electrode 18 can be set according to the size setting requirements of the sensor. Assume that the size of the sensitive material layer 21 is determined to be 100μm×100μm～300μm×300μm according to the size setting of the sensor, then s1, s2, w1, w2 can be 5μm～20μm, and the length of the test electrode 20 and the heating electrode 18 can be 35μm～380μm. . It can be understood that those skilled in the art can set the size, material, etc. of each part of the sensor body according to actual needs, and this disclosure does not limit this.

FIG. 8 shows a schematic structural diagram of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure. In a possible implementation, as shown in FIG. 8 , the device may include a base plate 71 and an alarm module 61 . The lowest sensor among the plurality of sensors and the alarm module 61 are fixed on the base plate 71 and are electrically connected through the base plate 71 . The alarm module 61 is configured to issue an alarm prompt when it is determined that the alarm conditions are met according to the detection results of each of the sensors. The lowest layer sensor and the alarm module 61 can be electrically connected through the wire layer 711 inside the substrate 71 .

In this implementation, the alarm module may issue an alarm prompt through one or more of the following methods: sound, vibration, light, etc., and the present disclosure does not limit this.

In this embodiment, the number of sensors in the device can be set according to actual needs. The order of vertical stacking can also be set according to the functions of each sensor in the device, and this disclosure does not limit this. For example, assuming that the device includes three sensors, namely a gas sensor, a temperature sensor and an acceleration sensor, the gas sensor in the device is located above the temperature sensor, and the acceleration sensor is located above the temperature sensor. below. In this way, the gas sensor is located on the top layer to ensure that it can accurately detect specific gases in the environment. The temperature sensor in the middle layer can detect the temperature in the environment. Setting the acceleration sensor on the bottom layer can ensure that the entire device can detect vibrations at the installation location of the device. This allows devices including gas sensors, temperature sensors and acceleration sensors to implement highly integrated, miniaturized, multi-functional industrial production environment monitoring and alarm systems, which can detect toxic gas leaks, fires and abnormal vibrations in factories, and detect abnormalities when abnormalities are found. When the alarm occurs, an alarm prompt is issued through the alarm module. Among them, the alarm module can also report upwards, such as to the factory's control center, monitoring center, etc., when it is determined that the alarm conditions are met based on the detection results of each sensor, so that relevant personnel can respond in a timely manner.

FIG9 shows a schematic diagram of the structure of a MEMS sensor integration device based on silicon through vias according to an embodiment of the present disclosure. In a possible implementation, as shown in FIG9 , in order to ensure the safety of the top-layer sensor of the device and improve the reliability and stability of the device, the device may include a cap layer. When the top-layer sensor is an acceleration sensor, a pressure sensor or other sensor that does not need to contact the external environment, the cap layer may include a cap substrate 31 and a bonding ring 32 as shown in FIG9 . A receiving groove 312 is provided on the first surface of the cap substrate 31, and at least a portion of the top-layer sensor is located in the receiving groove 312. The bonding ring 32 is provided on the first surface of the cap substrate 31 and is closed around the receiving groove 312, and is used to fix the top-layer sensor and the cap layer together.

FIG. 10 shows a schematic structural diagram of a capping layer in a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure. In a possible implementation, as shown in Figure 10, if the top sensor in the device is a gas sensor, the cap layer may also include a breathable film layer 33 and a dustproof mesh layer 34. The second surface of the cap substrate 31 may be provided with a vent 311 connected to the accommodating groove 312 and located corresponding to the target area of the test electrode in the top sensor. The breathable film layer 33 is located above the second surface of the cap substrate 31 and at least covers the vent hole 311 . The dust-proof mesh layer 34 is located on the second surface of the cap substrate 31 and covers at least the area of the breathable film layer 33 corresponding to the ventilation holes 311. The dust-proof mesh layer 34 corresponds to the ventilation holes. The portion 311 is provided with a plurality of through holes 341 .

In this implementation, the breathable film layer 33 can cover the entire area of the second side of the cap substrate 31 (as shown in FIG. 11 ), or can only cover the second side of the cap substrate 31 corresponding to the above-mentioned area. The area of the vent 311. The breathable film layer 33 has selective permeability, allowing gas to enter the vent hole 311 and blocking ten micron-level contaminants from entering the vent hole 311 . For example, the material of the breathable film layer 33 may be polymer. In this way, contamination and damage caused by pollutants to the sensitive material layer in the sensor can be avoided. Those skilled in the art can set the material and thickness of the breathable film layer according to actual needs, and this disclosure does not limit this.

In this implementation manner, the dustproof mesh layer 34 can cover the entire area of the breathable film layer 33 (as shown in FIG. 10 ), or can only cover the area of the breathable film layer 33 corresponding to the ventilation holes 311 . The sizes of the dust-proof mesh layer 34 and the breathable film layer 33 may be the same or different, and this disclosure does not limit this. The dust-proof mesh layer 34 is used to prevent dust and other large particles of dirt from falling into the gas sensor on the top layer through the ventilation hole 311, so as to prevent large particles of dirt from causing contamination and mechanical damage to the sensitive material layer in the gas sensor. The material of the dust-proof mesh layer 34 may be metal or other materials that can resist corrosion by corrosive gases to improve the reliability of the sensor. For example, the material of the dust-proof mesh layer 34 may be Pt. The thickness of the dust-proof mesh layer 34 may be 100 nm to 300 nm. Those skilled in the art can set the material and thickness of the dust-proof mesh layer according to actual needs, and this disclosure does not limit this.

In a possible implementation, if the top sensor in the device is a gas sensor, the cap layer may also only include a dust-proof mesh layer (that is, not including a breathable film layer), and the dust-proof mesh layer and the dust-proof mesh layer are located on the cap lining. The second surface of the bottom 31 covers at least the area corresponding to the ventilation hole 311 , and a plurality of through holes 341 is provided in at least the area of the dustproof mesh layer covering the ventilation hole 311 .

In this embodiment, the thickness of the capping layer can be 200 microns to 400 microns, and the substrate 11 and the capping substrate 31 can be made of silicon or other materials, so that they have high compatibility with the device layer manufacturing process and ensure that the substrate Matching of contact strength with bonded rings. The material of the capping layer may also be glass or other materials, which is not limited in this disclosure.

In this embodiment, the cap layer and the substrate in the top sensor may have the same size, similar thickness, or the same structure. In this way, it can be ensured that the base and cap layers in the top sensor have comparable mechanical properties, and no problems will arise due to mismatch in expansion coefficient, compressive strength, etc. during bonding and subsequent operations. The material of the bonding ring 32 may be a material that is easy to bond with the substrate in the top sensor. For example, the material of the bonding ring 32 may be a metal such as gold (Au). In order to ensure the reliability of the fixed connection between the capping layer and the substrate in the top-level sensor, the width w3 and thickness h of the bonding ring can be set. For example, w3 can be 100 μm to 150 μm, and h can be 150 nm. The bonding ring 32 may surround the receiving groove and be located at an edge of the first side of the cap substrate 31 .

In this embodiment, the bonding ring 32 can be fixed to the substrate of the top sensor by bonding, so as to fix the cap layer and the substrate of the top sensor together. However, due to the difference in the structure of the substrate of the top sensor and the sensor body, the structure bonded to the bonding ring 32 is different, and the bonding methods 1, 2, 3, 4, and 5 are schematically described below.

Bonding method one:

If the top sensor body further includes a second insulating layer and a heating electrode, and the dielectric layer 12 covers the area corresponding to the accommodating groove 312 on the first surface of the substrate 11 and the second insulating layer 19 also At most, the exposed dielectric layer 12 is covered, and the bonding ring 32 is fixedly connected to the first surface of the substrate 11 by bonding, so that the base body and the capping layer are fixedly connected together. , the sensor body and the dielectric layer 12 are located in the accommodating groove 312 .

Bonding method two:

If the top sensor body also includes a second insulating layer and a heating electrode, and the dielectric layer 12 covers the entire area of the first surface of the substrate 11, and the second insulating layer 19 also covers at most the exposed dielectric In the area of the layer 12 corresponding to the accommodation groove 312, the bonding ring 32 is fixedly connected to the dielectric layer 12 by bonding, so that the base and the capping layer are fixedly connected together. , the sensor body is located in the accommodating groove 312 .

Bonding method three:

If the top sensor body also includes a second insulating layer and a heating electrode, and the dielectric layer 12 covers the entire area of the first surface of the substrate 11 and the second insulating layer also covers the exposed dielectric layer 12 In all areas, the bonding ring 32 is fixedly connected to the second insulating layer 19 by bonding, so that the base body and the capping layer are fixedly connected together, and at least the sensitive material layer 21 is located inside the accommodating groove 312 .

Bonding method four:

If the top sensor body only includes a test electrode and a sensitive material layer, and the dielectric layer 12 covers the area corresponding to the accommodation groove 312 on the first surface of the substrate 11 , then the sensor can be bonded by bonding. The bonding ring 32 is fixedly connected to the first surface of the substrate 11 so that the base body and the cap layer are fixedly connected together, and the sensor body and the dielectric layer 12 are located in the accommodating groove 312 .

Bonding method five:

If the top sensor body only includes a test electrode and a sensitive material layer, and the dielectric layer 12 covers the entire area of the first surface of the substrate 11, the bonding ring 32 and the dielectric layer are bonded together. The layer 12 is fixedly connected, so that the base body and the cap layer are fixedly connected together, and at least the sensitive material layer 21 in the sensor body is located in the accommodating groove 312.

In a possible implementation, the sensor may also include a processing module, which is used to control the energization of the heating electrodes in each sensor in the device, so that during operation of the device, the sensor equipped with the heating electrode The heating electrode can be energized to heat the sensitive material layer to operating temperature. During the operation of the device, the processing module is also used to control the energization of the test electrodes in each sensor. The processing module itself or controls the corresponding detection module to monitor the current flowing through the test electrodes in each sensor, and determine based on the monitoring results. The data related to the object detected by each sensor is used as the detection result. The detection object may be gas, temperature, humidity, acceleration, speed, etc., which is not limited by this disclosure.

In this embodiment, the position, size and shape of the accommodating groove 312 can be set according to the position, size and shape of the sensor body, so that at least the sensitive material layer 21 of the top sensor is located in the accommodating groove 312 . The depth of the accommodating groove 312 may be 100 microns to 300 microns.

For example, if the size of the sensitive material layer 21 is 100 μm×100 μm to 300 μm×300 μm, the receiving groove 312 may be a rectangular parallelepiped structure with a size of 500 μm×500 μm×100 μm (100 μm is the depth).

FIG. 11 shows a schematic structural diagram of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure. In a possible implementation, as shown in FIG. 11 , the device may also include device electrodes 41 . The device electrode 41 is disposed in the corresponding through-hole region 17 and is electrically connected to the corresponding through-silicon via 15 . In this way, by connecting the device electrode 41 under the through silicon via 15, the planar metal wiring can be reduced, and the test area and the electrical area can be effectively isolated, thereby improving the reliability of the device and miniaturizing the device.

Wherein, the through hole area 17 of the underlying sensor in the device may be larger than the cross-sectional area of the corresponding through silicon hole 15, and the metal electrode deposition layer 40 is disposed in the through hole area 17. The metal electrode deposition layer 40 is located in each through hole area 17 and covers each through hole area 17 . The material of the metal electrode deposition layer 40 may be titanium (Ti), platinum (Pt), gold (Au) and other metals. The thickness of the metal electrode deposition layer 40 may be 550 nm. The metal electrode deposition layer 40 can facilitate the subsequent preparation of the device electrode 41 through ball planting, ensuring the smooth progress of ball planting. Those skilled in the art can set the materials and sizes of the metal electrode deposition layer and the device electrode according to actual needs, and this disclosure does not limit this. The device electrode 41 may be a metal ball manufactured by a ball planting method such as laser ball planting, and the material of the metal ball may be lead-tin alloy (PbSn) or the like.

In some embodiments, as shown in FIG1 , the symmetry axes of the through silicon vias 15 in each through silicon via group coincide, and the symmetry axes of the through silicon vias 15 in different through silicon via groups are located on different straight lines. In this way, multiple sensors can be connected in series by means of through silicon vias, thereby improving the integration of the device and reducing the thickness of the device.

In this embodiment, each through silicon via 15 is arranged below the first connection area 181 of the heating electrode 18 or the second connection area 201 of the test electrode 20, and the filling metal in each through silicon via 15 contacts the heating electrode 18 or the test electrode 20 on the first surface of the substrate 11. The filling metal in the through silicon via 15 is connected to the test electrode or the heating electrode of the lower sensor. The through silicon via 15 in the bottom sensor can be connected to the outside so that the detected signal is input to the processing circuit. In this way, the through silicon via 15 is used as an interconnection line to realize the three-dimensional packaging of the wafer, and the interconnection line is spatially isolated from the circuit area and the test area, thereby realizing the vertical integration of the MEMS sensor in the device and reducing the thickness of the device. The use of through silicon via interconnection technology can realize the upper and lower electrical conduction of multiple sensors in the device, which is conducive to the realization of multi-layer stacking of sensors and ICs, so that the device has the characteristics of high performance, high density and low power consumption.

In a possible implementation, the through silicon via 15 can be a through silicon via with a large aperture and a high aspect ratio. The diameter of the through silicon via 15 can be 20 μm to 50 μm, and the aspect ratio can be 5:1 to 10:1. . In this way, the preparation of interconnection lines for high-current and high-power MEMS sensors and their horizontal and vertical integration structures can be achieved.

FIG. 12 shows a flow chart of a manufacturing method of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure. FIG. 13 shows a schematic diagram of a process of manufacturing a sensor in a method of manufacturing a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure. 14 shows a schematic diagram of a process of sensor stacking in a manufacturing method of a through-silicon via-based MEMS sensor integrated device according to an embodiment of the present disclosure. FIG. 15 shows a schematic diagram of the manufacturing process of the through silicon via in the manufacturing method of the through silicon via based MEMS sensor integrated device according to an embodiment of the present disclosure.

As shown in Figures 12 to 15, the method includes: a sensor manufacturing step and a sensor stacking step. Figure 13 schematically takes the manufacturing of the sensor shown in Figure 3B as an example, Figure 14 schematically takes the manufacturing of three sensors based on Figure 13 as an example, and Figure 15 simply illustrates the manufacturing process of one of the multiple silicon through vias as an example, showing the flow of the device manufacturing method. The sensor manufacturing step is performed before the sensor stacking step.

As shown in FIG. 12 , the sensor manufacturing steps may include: a substrate manufacturing step and a sensor body manufacturing step. The substrate manufacturing step includes step S501 to step S503. The sensor body manufacturing steps include steps S504 to S505.

In step S501 , a dielectric layer 12 is prepared on the first surface of the substrate 11 . The dielectric layer 12 may be composed of a silicon oxide layer 121 , a silicon nitride layer 122 and a silicon oxide layer 123 . The dielectric layer 12 can be prepared using a PECVD process.

In step S502 , the substrate 11 and the dielectric layer 12 are etched, and the substrate 11 is thinned to form a plurality of through silicon holes 15 .

As shown in Figure 15, step S502 may include:

The substrate 11 and the dielectric layer 12 are etched using the BOSCH process to form multiple high aspect ratio blind holes 13 required to prepare the sensor; through thermal oxidation, PECVD, and low pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition, LPCVD) The silicon oxide insulating layer 131 is prepared on the surface of the blind hole 13 by other methods. The thermal oxidation method to manufacture the insulating layer can avoid subsequent high temperature damage to the insulating layer. Then, a barrier layer 132 of materials such as TiN and Ti/W is prepared on the surface of the insulating layer 131 using an atomic layer deposition (ALD) process or a physical vapor deposition (PVD) process. The thickness of the barrier layer 132 can be 50nm～150nm. A seed layer 133 of Cu or other materials is prepared on the surface of the barrier layer by means of physical vapor deposition, atomic layer deposition, electroless plating, etc. The thickness of the seed layer 133 may be 500 nm to 1 μm. Electroplating and other processes can be used to fill the blind hole 13 with conductive metal such as copper to form a metal structure 14 as shown in FIG. 13 , and then can be annealed to partially release the stress caused by the filling metal. Since the metal structure 14 is also electroplated on the dielectric layer 12, processes such as chemical mechanical polishing (CMP) can continue to be used to polish the metal structure 14 on the dielectric layer 12. After polishing, the second surface of the substrate 11 is thinned until the blind hole 13 is exposed to obtain the through silicon via 15 . For simplicity, the insulating layer 131, the barrier layer 132 and the seed layer 133 in the through silicon hole are not shown in FIG. 13 . The insulating layer is used to achieve electrical insulation between the metal pillars in the through silicon via 15 and the substrate 11 . The barrier layer is used to prevent the electrode metal in the metal pillar in the through silicon via 15 from diffusing into the insulating layer and the substrate 11 .

The dielectric layer 12 may be etched using an etching technique such as inductively coupled plasma (ICP), and the substrate 11 may be etched using a Bosch process, so as to finally form a plurality of blind holes 13 .

In step S503, a first insulating layer 16 is prepared on the second side of the substrate 11, and the first insulating layer 16 is etched to expose at least the through hole area corresponding to each of the through silicon holes 15. 17. Complete the manufacturing of the matrix.

Among them, PECVD can be used to prepare the first insulating layer 16, which can avoid metal diffusion in the through silicon holes at high temperatures. Then, a photolithography process may be used to pattern the through-hole areas, and then a dry etching process such as an ICP process may be used to etch the first insulating layer 16 until each through-hole area 17 is exposed. Then, a metal electrode deposition layer 40 can be deposited in the through hole area 14 by a metal deposition method such as magnetron sputtering or evaporation coating, as a contact area for subsequent ball planting (the manufacturing step of the contact area is an optional step). Through polishing in the process of preparing through silicon holes and thinning in step S503, wafer warpage caused by film stress can be eliminated and the smooth implementation of subsequent processes can be ensured.

Sensor body manufacturing steps: including steps S504 to S505.

In step S504, the test electrode 20 is prepared on the surface of the dielectric layer 12.

Among them, photoresist can be coated on the surface of the dielectric layer 12. After the photoresist is patterned based on the structure and size of the test electrode 20, the area on the surface of the dielectric layer 12 where the test electrode 20 needs to be prepared is exposed, and metal deposition is performed by metal deposition methods such as magnetron sputtering or evaporation coating to form the test electrode 20, and then the excess photoresist on the surface of the dielectric layer 12 is removed.

In step S505, the sensitive material layer 21 is manufactured above the target area of the test electrode 20 to complete the manufacturing of the sensor body.

Among them, photolithography is used to pattern the target area of the test electrode 20 to expose the area on the surface of the test electrode 20 where the sensitive material layer 21 needs to be prepared, and then the sensitive material is coated by coating, and the photolithography is peeled off. After gluing, the sensitive material layer 21 is obtained, and the sensor body is obtained.

In a possible implementation, if the sensor body further includes a heating electrode and a second insulating layer (as shown in FIG. 3B ), the manufacturing step of the sensor body may include: preparing the heating electrode 18 on the surface of the dielectric layer 12 . A second insulating layer 19 is formed on the surface of the heating electrode 18 and the exposed dielectric layer 12; the second insulating layer 19 is etched to form electrode through holes 191, so as to expose a plurality of through silicon holes 15 through the electrode through holes 191. For the through silicon hole connected to the test electrode 20; on the second insulating layer 19, a test electrode 20 with a target area overlapping the heating electrode 18 is manufactured, and the test electrode 20 is passed through the electrode through hole 191 and the corresponding The through silicon via 15 is connected; a sensitive material layer 21 is manufactured above the target area to complete the manufacturing of the sensor body.

In this implementation, photoresist can be coated on the surface of the dielectric layer 12. After patterning the photoresist based on the structure and size of the heating electrode 18, the area on the surface of the dielectric layer 12 where the heating electrode 18 needs to be manufactured is exposed. Metal deposition is performed by magnetron sputtering or evaporation coating to form a heating electrode, and then excess photoresist on the surface of the dielectric layer 12 is removed. The second insulating layer can be deposited using a PECVD process. Photoresist can be coated on the surface of the second insulating layer 19, and after patterning the photoresist based on the position and size of the through silicon hole 15 connected to the test electrode 20, the second insulating layer 19 can be etched through a dry etching process. Etching is performed to expose the through silicon holes used to connect to the test electrodes 20 among the plurality of through silicon holes 15 and then the excess photoresist on the surface of the second insulating layer 19 is removed. Photoresist can be coated on the surface of the second insulating layer 19. After patterning the photoresist based on the structure and size of the test electrode 20, the area on the surface of the second insulating layer 19 where the test electrode 20 needs to be prepared is exposed. The test electrode 20 is formed by metal deposition using a metal deposition method such as sputtering or evaporation coating, and then the excess photoresist on the surface of the second insulating layer 19 is removed. Use photolithography to pattern the top of the target area of the test electrode 20 to expose the second insulating layer 19 and the area on the surface of the test electrode 20 where the sensitive material layer 21 needs to be prepared, and then use coating to coat the sensitive material. , after peeling off the photoresist, the sensitive material layer 21 is obtained, and the sensor body is obtained.

In the case where the device further includes a capping layer, the manufacturing method of the device further includes a capping layer manufacturing step. The capping layer manufacturing step (ie, manufacturing the capping layer as shown in FIG. 9 ) may include: first forming the capping substrate 31 The bonding ring 32 is prepared. The first surface of the cap substrate 31 is etched to form an accommodating groove 312 .

Among them, photolithography can be used to pattern the bonding ring area, and then metal deposition such as magnetron sputtering or evaporation coating can be used to deposit, and then the excess adhesive layer is peeled off to obtain the bonding ring 32 . The area of the first side of the cap substrate 31 corresponding to the accommodating groove can be patterned by photolithography, and the cap substrate 31 in the patterned area can be etched using a BOSCH process to form the accommodating groove 312 .

In a possible implementation, if the sensor is a gas sensor, the capping layer manufacturing step (that is, manufacturing the capping layer shown in FIG. 10 ) may include: etching the capping substrate 31 to form a layer through the capping layer 31 . The vent 311 caps the substrate 31 and corresponds to the target area. Among them, the cap substrate 31 can be etched using a BOSCH process to form the vent hole 311 . The first surface of the cap substrate 31 is etched to form an accommodating groove 312 connected to the ventilation hole 311 . Wherein, the area of the first side of the cap substrate 31 corresponding to the accommodating groove can be patterned by photolithography, and the BOSCH process is used to etch the cap substrate 31 in the patterned area to form the accommodating groove 312 . The pre-prepared breathable film is attached to the second surface of the cap substrate 31 and at least covers the ventilation holes 311 to form the breathable film layer 33 . A dust-proof mesh layer is prepared above the breathable film layer 33 to form a dust-proof mesh layer 34 with a plurality of through holes 341 that covers at least a portion of the breathable film layer 33 . Among them, the dust-proof mesh layer can be patterned by photolithography to expose the area where the dust-proof mesh layer needs to be prepared above the breathable film layer 33 and above the second side of the cap substrate, and the film can be coated by magnetron sputtering or evaporation. Metal deposition is performed using a metal deposition method to form a dust-proof mesh layer, and then excess photoresist is removed to complete the preparation of the dust-proof mesh layer 34 .

In a possible implementation, if the sensor is a gas sensor and the cap layer includes a dust-proof mesh layer but does not include a breathable film layer, the cap layer manufacturing step may include: etching the cap substrate to form a through-hole The cap substrate and the vent corresponding to the target area. The first surface of the cap substrate is etched to form an accommodating groove connected to the vent hole. The dust-proof mesh layer can be patterned by photolithography to expose the area where the dust-proof mesh layer needs to be prepared above the second side of the cap substrate, and metal deposition can be performed by metal deposition methods such as magnetron sputtering or evaporation coating. The dust-proof mesh layer is then removed, and the excess photoresist is removed to complete the preparation of the dust-proof mesh layer, thereby obtaining a dust-proof mesh layer with multiple through holes that at least covers the vent hole.

In a possible implementation, if the device includes a cap layer, the manufacturing step of the top sensor or the sensor stacking step may further include a fixing and connecting step. The fixing and connecting step includes fixing the bonding ring 32 and the substrate together by bonding, so that at least the sensitive material layer 21 in the top sensor is in the receiving groove 312.

In the bonding process, reverse compressive stress can be applied to the top layer sensor or multiple stacked sensor devices to further reduce the warping.

Among them, according to the difference in structure between the base body and the sensor body, the fixed connection step can include any of the following implementation methods:

If the sensor body of the top sensor does not include a heating electrode and a second insulating layer, and the dielectric layer 12 covers the area of the first surface of the substrate 11 corresponding to the receiving groove 312, the bonding ring 32 is fixedly connected to the first surface of the substrate 11 by bonding, so that the base and the cap layer are fixedly connected together, and the sensor body and the dielectric layer 12 are located in the receiving groove 312.

If the sensor body of the top-level sensor does not include a heating electrode and a second insulating layer, and the dielectric layer 12 covers the entire area of the first surface of the substrate 11, the bonding ring 32 is fixedly connected to the dielectric layer 12 by bonding, so that the base and the cap layer are fixedly connected together and at least the sensitive material layer 21 in the sensor body is located in the accommodating groove 312.

If the sensor body of the top sensor includes a heating electrode 18 and a second insulating layer 19, and the dielectric layer 12 covers the area corresponding to the accommodating groove 312 on the first surface of the substrate 11 and the second insulating The layer 19 can cover at most the exposed dielectric layer 12, and the bonding ring 32 is fixedly connected to the first surface of the substrate 11 by bonding, so that the base and the capping layer are fixed. Connected together, the sensor body and the dielectric layer 12 are located in the accommodating groove 312 .

If the sensor body of the top sensor includes a heating electrode 18 and a second insulating layer 19, and the dielectric layer 12 covers the entire area of the first surface of the substrate 11, and the second insulating layer 19 also covers at most the exposed In the area of the dielectric layer 12 corresponding to the accommodating groove 312, the bonding ring 32 is fixedly connected to the dielectric layer 12 by bonding, so that the base body and the cap layer are fixed. Connected together, the sensor body is located in the receiving groove 312 .

If the sensor body of the top sensor includes a heating electrode 18 and a second insulating layer 19, and the dielectric layer 12 covers the entire area of the first surface of the substrate 11, and the second insulating layer 19 also covers the exposed In the entire area of the dielectric layer 12, the bonding ring 32 is fixedly connected to the second insulating layer 19 by bonding, so that the base body and the capping layer are fixedly connected together, at least the sensitive The material layer 21 is located in the receiving groove 312 .

The sensor stacking step includes: step S506-step S508.

In step S506, based on the stacking order of multiple sensors in the device, an interconnection layer 51 is prepared above the bottommost sensor. The interconnection layer 51 is etched to form a sensitive layer hole 511 and a plurality of line through holes 512, so as to expose the sensitive material layer 21 through the sensitive layer hole 511 and expose the test electrode 20 through each of the line through holes 512.

Among them, methods such as CVD can be used to grow the interconnection layer 51 directly above the lowermost sensor. The interconnection layer 51 may be an interposer, and the material of the interconnection layer may be SiGI, Si, etc. The interconnection layer can be etched by photolithography or other methods to form sensitive layer holes 511 and a plurality of line via holes 512 .

In step S507, metal is filled in the line via 512 to form an interconnection line 513. The metal can be filled in the line via 512 by PVD or other methods to form the interconnection line 513.

In step S508, an upper layer sensor adjacent to the lowermost layer sensor above the lowermost layer sensor is fixed to the interconnection layer 51. Then, the upper sensor is used as the lowest sensor and the next sensor is fixed until all the sensors are stacked.

In a possible implementation, if there is at least one non-overlapping through silicon via group among the plurality of through silicon via groups, at least two through silicon holes among the plurality of through silicon holes in the non-overlapping through silicon via group symmetry axes do not coincide, the sensor stacking step may also include: preparing metal wiring in the process of manufacturing the interconnection layer 51, so that the metal wiring can connect the test electrode of the sensor below the interconnection layer and the interconnection layer where it is located. The through silicon via of the upper sensor, and/or the metal wiring is used to connect the heating electrode of the sensor below the interconnection layer and the through silicon via of the sensor above the interconnection layer.

In a possible implementation, if the device includes a device electrode, the method may further include an electrode manufacturing step: implanting a ball in the through-hole region of the bottom sensor to form a device electrode 41, thereby completing the preparation of the device. The implantation may be performed by laser implantation.

It should be noted that, although the above embodiment is used as an example to introduce a MEMS sensor integrated device based on silicon through vias and a manufacturing method thereof, those skilled in the art will understand that the present disclosure should not be limited thereto. In fact, the user can flexibly set each step and each part of the device according to personal preferences and/or actual application scenarios, as long as it complies with the technical solution of the present disclosure.

The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (10)

1. A through silicon via based MEMS sensor integrated device, the device comprising: a plurality of sensors vertically stacked and an interconnection layer between two adjacent sensors, each of the sensors including a sensor body and a base body for carrying the sensor body;

the substrate is provided with a plurality of through silicon vias; the sensor body includes a test electrode and a layer of sensitive material; the test electrode is positioned above the matrix and connected to each corresponding through silicon via; the sensitive material layer covers a target area of the test electrode;

each interconnection layer comprises a sensitive layer hole and a plurality of wire through holes, wherein each wire through hole is provided with an interconnection wire, two ends of each interconnection wire are respectively connected to a test electrode of a sensor below the interconnection layer and a silicon through hole of a sensor above the interconnection layer, and each sensitive layer hole is used for accommodating a sensitive material layer of the sensor below the interconnection layer;

the plurality of through silicon vias in each sensor respectively belong to different through silicon via groups, each through silicon via group comprises through silicon vias which are connected in series through the interconnection lines in the plurality of through silicon vias in each sensor, and symmetry axes of the through silicon vias in at least one through silicon via group coincide.

2. The apparatus of claim 1, wherein the base further comprises a substrate, a dielectric layer, and a first insulating layer;

the dielectric layer covers at least part of the area of the first surface of the substrate, and each silicon through hole penetrates through the substrate and the dielectric layer;

the first insulating layer covers the second surface of the substrate and at least exposes a through hole area corresponding to each through silicon hole;

wherein the test electrode is located above the dielectric layer.

3. The apparatus of claim 2, wherein the sensor body further comprises: the electrode and the second insulating layer are heated,

the heating electrode is positioned above the dielectric layer and connected with each corresponding silicon through hole;

the second insulating layer is positioned above the dielectric layer and covers the surface of the heating electrode except the first connecting region, and is provided with at least two electrode through holes, and each electrode through hole exposes a silicon through hole connected with the test electrode;

the test electrode is located above the second insulating layer, the target area is overlapped with the heating electrode, and the test electrode is connected to each corresponding through silicon via through the electrode via.

4. The apparatus of claim 1, wherein axes of symmetry of the through-silicon vias in each of the through-silicon via groups coincide and the lines of symmetry of the through-silicon vias in different ones of the through-silicon via groups are not identical.

5. The apparatus of claim 1 or 3, wherein at least one misaligned through-silicon via group is present in a plurality of said through-silicon via groups, the symmetry axes of at least two through-silicon vias in the plurality of through-silicon vias of said misaligned through-silicon via group being misaligned,

and the metal wiring is used for connecting the heating electrode of the sensor below the interconnection layer and the through silicon hole of the sensor above the interconnection layer.

6. The device of claim 1, wherein the plurality of sensors includes a gas sensor, a temperature sensor, and an acceleration sensor, the gas sensor being located above the temperature sensor and the acceleration sensor being located below the temperature sensor in the device.

7. The apparatus of claim 1, wherein the apparatus further comprises: the sensor at the lowest layer of the plurality of sensors and the alarm module are fixed on the substrate and are electrically connected through the substrate,

the alarm module is used for sending out alarm prompts under the condition that the alarm conditions are met according to the detection results of the sensors.

8. The apparatus of claim 1, wherein each of the through-silicon vias has a diameter of 20 μm to 50 μm and an aspect ratio of 5:1 to 10:1.

9. The apparatus of claim 3, wherein the device comprises a plurality of sensors,

the shape of the heating electrode comprises a malleable shape, and the malleable shape comprises any one of a snake shape and an S shape; and/or

The test electrode comprises an interdigital electrode, the target area is a periodic pattern area of the interdigital electrode, and the ductile-shaped area of the heating electrode and the target area are matched in size and overlapped in position.

10. A method of manufacturing a through-silicon via based MEMS sensor integrated device according to any one of claims 1-9, the method comprising: a sensor manufacturing step and a sensor stacking step,

The sensor manufacturing steps include: preparing a dielectric layer on a first surface of a substrate; manufacturing a plurality of through silicon vias penetrating through the substrate and the dielectric layer; preparing a first insulating layer on the second surface of the substrate, and etching the first insulating layer to at least expose a through hole area corresponding to each silicon through hole to obtain a matrix of the sensor; manufacturing a test electrode above the dielectric layer; manufacturing a sensitive material layer above a target area of the test electrode to obtain a sensor main body, and finishing the preparation of the sensor;

the sensor stacking step includes: preparing an interconnect layer over a lowermost sensor based on a stacking order of a plurality of sensors in the device; etching the interconnection layer to form a sensitive layer hole and a plurality of line through holes so as to expose the sensitive material layer through the sensitive layer hole and expose the test electrode through each line through hole; filling metal in the wire through hole to form an interconnection wire; fixing an upper sensor adjacent to the lowermost sensor above the lowermost sensor to the interconnect layer; and taking the upper layer sensor as the lowest layer sensor to continuously fix the next sensor until all the sensors are stacked.