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CN115274488B - Method for Predicting Etching Depth Selective Ratio of SiC Die and SiC Mask Layer - Google Patents

Method for Predicting Etching Depth Selective Ratio of SiC Die and SiC Mask Layer Download PDF

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CN115274488B
CN115274488B CN202211180073.4A CN202211180073A CN115274488B CN 115274488 B CN115274488 B CN 115274488B CN 202211180073 A CN202211180073 A CN 202211180073A CN 115274488 B CN115274488 B CN 115274488B
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silicon carbide
etching
etching depth
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任娜
盛况
钟浩
柏松
黄润华
李士颜
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Zhejiang University ZJU
CETC 55 Research Institute
ZJU Hangzhou Global Scientific and Technological Innovation Center
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Abstract

本发明涉及半导体技术领域中的碳化硅裸片与碳化硅掩膜层刻蚀深度选择比预测方法，包括以下步骤：获取在第一刻蚀温度下，碳化硅裸片的第一刻蚀深度变化数据一和碳化硅掩膜层的第二刻蚀深度变化数据一，以及获取在第二刻蚀温度下，碳化硅裸片的第一刻蚀深度变化数据二和碳化硅掩膜层的第二刻蚀深度变化数据二；拟合碳化硅裸片刻蚀深度与刻蚀温度关系，以及拟合碳化硅掩膜层刻蚀深度与刻蚀温度关系；基于碳化硅裸片刻蚀深度与刻蚀温度关系，以及碳化硅掩膜层刻蚀深度与刻蚀温度关系，预测在不同刻蚀温度下，碳化硅裸片与碳化硅掩膜层的刻蚀深度，并计算预测选择比，突破了工作人员在等离子刻蚀工艺调试过程中负荷较高的瓶颈。

Figure 202211180073

The invention relates to a method for predicting the etching depth selection ratio of a silicon carbide bare chip and a silicon carbide mask layer in the field of semiconductor technology, comprising the following steps: obtaining the first etching depth change of the silicon carbide bare chip at the first etching temperature Data 1 and the second etching depth change data 1 of the silicon carbide mask layer, and obtain the first etching depth change data 2 of the silicon carbide die and the second etching depth change data 2 of the silicon carbide mask layer at the second etching temperature Etching depth change data 2; fitting the relationship between etching depth and etching temperature of silicon carbide die, and fitting the relationship between etching depth and etching temperature of silicon carbide mask layer; based on the relationship between etching depth and etching temperature of silicon carbide die , and the relationship between the etching depth of the silicon carbide mask layer and the etching temperature, predict the etching depth of the silicon carbide die and the silicon carbide mask layer at different etching temperatures, and calculate the predicted selection ratio, breaking through the staff in A bottleneck with a high load during the debugging of the plasma etching process.

Figure 202211180073

Description

碳化硅裸片与碳化硅掩膜层刻蚀深度选择比预测方法Method for Predicting Etching Depth Selective Ratio of SiC Die and SiC Mask Layer

技术领域technical field

本发明涉及半导体技术领域，具体涉及碳化硅裸片与碳化硅掩膜层刻蚀深度选择比预测方法。The invention relates to the technical field of semiconductors, in particular to a method for predicting the etching depth selection ratio of a silicon carbide bare chip and a silicon carbide mask layer.

背景技术Background technique

等离子体刻蚀是去除材料表面物质的一种重要工艺过程。等离子体刻蚀过程可以具有化学选择性，即只从表面去除一种材料而不影响其他材料，也可以是各向异性的，即只去除沟槽底部的材料而不影响侧壁上同样的材料。Plasma etching is an important process for removing material surface substances. The plasma etch process can be either chemoselective, which removes only one material from the surface without affecting others, or anisotropic, which removes only material at the bottom of the trench without affecting the same material on the sidewalls .

由于刻蚀机理的研究是综合化学刻蚀与物理刻蚀的结果，单因素改变对刻蚀结果影响较大，又因为影响等离子体刻蚀工艺的因素众多，在芯片制造过程中，需要经历大量且复杂的工艺调试才能得到较理想的需要的等离子体刻蚀选择比，大幅度增加了工作人员的刻蚀调试负荷。Since the study of etching mechanism is the result of comprehensive chemical etching and physical etching, the change of a single factor has a great influence on the etching result, and because there are many factors affecting the plasma etching process, in the chip manufacturing process, a lot of experience is required. Moreover, the ideal plasma etching selection ratio can only be obtained through complex process debugging, which greatly increases the etching debugging load of the staff.

发明内容Contents of the invention

本发明针对现有技术中的缺点，提供了一种碳化硅裸片与碳化硅掩膜层刻蚀深度选择比预测方法，突破了工作人员在等离子刻蚀工艺调试过程中负荷较高的瓶颈。Aiming at the shortcomings in the prior art, the present invention provides a method for predicting the etching depth selection ratio of the silicon carbide bare chip and the silicon carbide mask layer, which breaks through the bottleneck of high load of staff during the debugging process of the plasma etching process.

为了解决上述技术问题，本发明通过下述技术方案得以解决：In order to solve the above technical problems, the present invention is solved through the following technical solutions:

一种碳化硅裸片与碳化硅掩膜层刻蚀深度选择比预测方法，包括以下步骤：A method for predicting the etching depth selectivity ratio between a silicon carbide bare chip and a silicon carbide mask layer, comprising the following steps:

获取在第一刻蚀温度下，碳化硅裸片的第一刻蚀深度变化数据一和碳化硅掩膜层的第二刻蚀深度变化数据一，以及Obtaining the first etching depth change data 1 of the silicon carbide die and the second etching depth change data 1 of the silicon carbide mask layer at the first etching temperature, and

获取在第二刻蚀温度下，碳化硅裸片的第一刻蚀深度变化数据二和碳化硅掩膜层的第二刻蚀深度变化数据二；Obtaining the first etching depth change data 2 of the silicon carbide die and the second etching depth change data 2 of the silicon carbide mask layer at the second etching temperature;

拟合碳化硅裸片刻蚀深度与刻蚀温度关系，以及拟合碳化硅掩膜层刻蚀深度与刻蚀温度关系；Fitting the relationship between etching depth of silicon carbide die and etching temperature, and fitting the relationship between etching depth of silicon carbide mask layer and etching temperature;

基于所述碳化硅裸片刻蚀深度与刻蚀温度关系，以及碳化硅掩膜层刻蚀深度与刻蚀温度关系，预测在不同刻蚀温度下，碳化硅裸片与碳化硅掩膜层的刻蚀深度，并计算预测选择比。Based on the relationship between the etching depth of the silicon carbide die and the etching temperature, and the relationship between the etching depth of the silicon carbide mask layer and the etching temperature, it is predicted that the etching temperature of the silicon carbide bare chip and the silicon carbide mask layer will be different under different etching temperatures. eclipse depth and calculate the predicted selection ratio.

可选的，获取碳化硅裸片的第一刻蚀深度变化数据一和碳化硅掩膜层的第二刻蚀深度变化数据一，包括以下步骤：Optionally, obtaining the first etch depth change data 1 of the silicon carbide die and the second etch depth change data 1 of the silicon carbide mask layer includes the following steps:

多点测量第一刻蚀温度下，每一时刻的碳化硅裸片的膜厚和碳化硅掩膜层的膜厚，并获取每一时刻的碳化硅裸片膜厚均值一和碳化硅掩膜膜厚均值一；Multi-point measurement of the film thickness of the silicon carbide die and the film thickness of the silicon carbide mask layer at each moment at the first etching temperature, and obtain the average value of the film thickness of the silicon carbide die and the silicon carbide mask layer at each moment The average film thickness is one;

计算每一时刻的第一碳化硅裸片刻蚀深度和第一碳化硅掩膜刻蚀深度，分别得到第一刻蚀深度变化数据一和第二刻蚀深度变化数据一。Calculate the etching depth of the first silicon carbide bare chip and the etching depth of the first silicon carbide mask at each moment, and obtain the first etching depth variation data 1 and the second etching depth variation data 1 respectively.

可选的，获取碳化硅裸片的第一刻蚀深度变化数据二和碳化硅掩膜层的第二刻蚀深度变化数据二，包括以下步骤：Optionally, obtaining the first etch depth change data 2 of the silicon carbide bare chip and the second etch depth change data 2 of the silicon carbide mask layer includes the following steps:

多点测量第二刻蚀温度下，每一时刻的碳化硅裸片的膜厚和碳化硅掩膜层的膜厚，并获取每一时刻的碳化硅裸片膜厚均值二和碳化硅掩膜膜厚均值二；Multi-point measurement of the film thickness of the silicon carbide die and the film thickness of the silicon carbide mask layer at each moment at the second etching temperature, and obtain the average value of the film thickness of the silicon carbide die and the silicon carbide mask layer at each moment Average film thickness 2;

计算每一时刻的第二碳化硅裸片刻蚀深度和第二碳化硅掩膜刻蚀深度，分别得到第一刻蚀深度变化数据二和第二刻蚀深度变化数据二。Calculate the etching depth of the second silicon carbide bare chip and the etching depth of the second silicon carbide mask at each moment, and obtain the first etching depth variation data 2 and the second etching depth variation data 2 respectively.

可选的，所述拟合碳化硅裸片刻蚀深度与刻蚀温度关系，包括以下步骤：Optionally, the fitting the relationship between the etching depth of the silicon carbide bare chip and the etching temperature includes the following steps:

根据每一时刻以及对应的第一碳化硅裸片刻蚀深度，生成碳化硅裸片刻蚀深度与时间的函数关系一；According to each moment and the corresponding etching depth of the first silicon carbide die, a functional relationship between the etching depth of the silicon carbide die and time is generated;

根据每一时刻以及对应的第二碳化硅裸片刻蚀深度，生成碳化硅裸片刻蚀深度与时间的函数关系二；According to each moment and the corresponding etching depth of the second silicon carbide die, a functional relationship between the etching depth of the silicon carbide die and time is generated;

根据能量方程，在所述函数关系一和函数关系二中添加温度模型，得到碳化硅裸片刻蚀深度与刻蚀温度函数关系。According to the energy equation, a temperature model is added to the first functional relationship and the second functional relationship to obtain the functional relationship between the etching depth of the silicon carbide die and the etching temperature.

可选的，所述拟合碳化硅掩膜层刻蚀深度与刻蚀温度关系，包括以下步骤：Optionally, the fitting the relationship between the etching depth of the silicon carbide mask layer and the etching temperature includes the following steps:

根据每一时刻以及对应的第一碳化硅掩膜刻蚀深度，生成碳化硅掩膜刻蚀深度与时间的函数关系三；According to each moment and the corresponding etching depth of the first silicon carbide mask, generate a functional relationship between the etching depth of the silicon carbide mask and time;

根据每一时刻以及对应的第二碳化硅掩膜刻蚀深度，生成碳化硅掩膜刻蚀深度与时间的函数关系四；According to each moment and the corresponding etching depth of the second silicon carbide mask, a function relationship between the etching depth of the silicon carbide mask and time is generated;

根据能量方程，在所述函数关系三和函数关系四中添加温度模型，得到碳化硅掩膜刻蚀深度与刻蚀温度函数关系。According to the energy equation, a temperature model is added to the third functional relationship and the fourth functional relationship to obtain the functional relationship between the etching depth of the silicon carbide mask and the etching temperature.

可选的，还包括获取刻蚀前碳化硅基底的初始碳化硅裸片膜厚和初始碳化硅掩膜膜厚，包括以下步骤：Optionally, it also includes obtaining the initial silicon carbide die film thickness and the initial silicon carbide mask film thickness of the silicon carbide substrate before etching, including the following steps:

多点测量碳化硅裸片的膜厚值和碳化硅掩膜层的膜厚值，并计算出初始碳化硅裸片膜厚和初始碳化硅掩膜膜厚。Measure the film thickness value of the silicon carbide die and the film thickness value of the silicon carbide mask layer at multiple points, and calculate the initial silicon carbide die film thickness and the initial silicon carbide mask film thickness.

可选的，还包括验证所述预测选择比的准确性。Optionally, verifying the accuracy of the predicted selection ratio is also included.

可选的，验证所述预测选择比的准确性，包括以下步骤：Optionally, verifying the accuracy of the predicted selection ratio includes the following steps:

选取第三刻蚀温度对碳化硅裸片和碳化硅掩膜层进行刻蚀，并测量实际刻蚀选择比；Selecting a third etching temperature to etch the silicon carbide die and the silicon carbide mask layer, and measuring the actual etching selectivity;

根据所述碳化硅裸片刻蚀深度与刻蚀温度关系，以及碳化硅掩膜层刻蚀深度与刻蚀温度关系，计算预测选择比；According to the relationship between the etching depth of the silicon carbide bare chip and the etching temperature, and the relationship between the etching depth of the silicon carbide mask layer and the etching temperature, calculate the predicted selection ratio;

设定误差阈值，计算所述实际刻蚀选择比与预测选择比的相对偏差值，若所述相对偏差值小于且等于误差阈值，则所述预测选择比准确。An error threshold is set, and a relative deviation value between the actual etching selection ratio and the predicted selection ratio is calculated. If the relative deviation value is less than or equal to the error threshold, the predicted selection ratio is accurate.

可选的，刻蚀所述碳化硅裸片和碳化硅掩膜层时，控制腔压、气体、气体流量和上电极功率不变，同时控制下电极功率为0，仅改变刻蚀温度和刻蚀时间。Optionally, when etching the silicon carbide die and the silicon carbide mask layer, control the cavity pressure, gas, gas flow rate, and power of the upper electrode to be constant, while controlling the power of the lower electrode to be 0, and only change the etching temperature and the etching temperature. Eclipse time.

可选的，使用干法刻蚀技术对所述碳化硅裸片与碳化硅掩膜层进行等离子化学刻蚀。Optionally, plasma chemical etching is performed on the silicon carbide die and the silicon carbide mask layer using a dry etching technique.

采用本发明提供的技术方案，与现有技术相比，具有如下有益效果：Compared with the prior art, the technical solution provided by the invention has the following beneficial effects:

通过在不同刻蚀温度下，获取碳化硅裸片与碳化硅掩膜层的刻蚀深度变化，得到碳化硅裸片的刻蚀深度与刻蚀时间的关系以及碳化硅掩膜层的刻蚀深度与刻蚀时间的关系，并在基于纯化学刻蚀的基础上，引入温度拟合，从而分别得到碳化硅裸片刻蚀深度与刻蚀温度的关系以及碳化硅掩膜层刻蚀深度与刻蚀温度的关系，使得工作人员仅需控制刻蚀温度以及刻蚀时的化学能量变化，即可得到需要的碳化硅裸片刻蚀深度以及碳化硅掩膜层刻蚀深度，无需工作人员花费大量时间精力在刻蚀深度的重复测量、重复调整上，降低了工作人员的工作负荷。By obtaining the etching depth variation of the silicon carbide die and the silicon carbide mask layer at different etching temperatures, the relationship between the etching depth of the silicon carbide die and the etching time and the etching depth of the silicon carbide mask layer are obtained The relationship between the etching time and the etching time, and on the basis of pure chemical etching, temperature fitting is introduced to obtain the relationship between the etching depth of the silicon carbide die and the etching temperature, and the etching depth and etching temperature of the silicon carbide mask layer. The temperature relationship allows the staff to only control the etching temperature and the chemical energy change during etching to obtain the required etching depth of the silicon carbide die and the etching depth of the silicon carbide mask layer, without requiring the staff to spend a lot of time and effort In the repeated measurement and repeated adjustment of the etching depth, the workload of the staff is reduced.

附图说明Description of drawings

为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained according to these drawings without any creative effort.

图1为本实施例一提出的一种碳化硅裸片与碳化硅掩膜层刻蚀深度选择比预测方法的流程图，以及实施例二提出的预测选择比的验证流程图。FIG. 1 is a flow chart of a method for predicting the etching depth selection ratio of a silicon carbide die and a silicon carbide mask layer proposed in the first embodiment, and a flow chart of verification of the predicted selection ratio proposed in the second embodiment.

具体实施方式Detailed ways

下面结合实施例对本发明做进一步的详细说明，以下实施例是对本发明的解释而本发明并不局限于以下实施例。The present invention will be further described in detail below in conjunction with the examples, the following examples are explanations of the present invention and the present invention is not limited to the following examples.

实施例一Embodiment one

首先需要说明的是，本实施例中所说的碳化硅裸片指的是碳化硅基底上碳化硅膜层，其中，碳化硅基底上碳化硅膜层指的是碳化硅物质的膜，而碳化硅掩膜层指的是氧化硅、氮化硅材料的膜层，在进行刻蚀时是以碳化硅掩膜层做阻挡刻蚀的碳化硅基底上碳化硅膜层。First of all, it needs to be explained that the silicon carbide bare chip mentioned in this embodiment refers to the silicon carbide film layer on the silicon carbide substrate, wherein the silicon carbide film layer on the silicon carbide substrate refers to the film of silicon carbide material, and the carbonized The silicon mask layer refers to the film layer of silicon oxide and silicon nitride materials. When etching, the silicon carbide mask layer is used as the silicon carbide film layer on the silicon carbide substrate to stop the etching.

如图1所示，一种碳化硅裸片与碳化硅掩膜层刻蚀深度选择比预测方法，包括以下步骤：获取刻蚀前碳化硅基底的初始碳化硅裸片膜厚和初始碳化硅掩膜膜厚，具体的，采用多点测量碳化硅裸片的膜厚值和碳化硅掩膜层的膜厚值，从而计算出初始碳化硅裸片膜厚和初始碳化硅掩膜膜厚，进一步的，使用白光干涉仪、椭偏仪或膜厚仪等用于测量膜厚的设备对碳化硅裸片和碳化硅掩膜层进行多点测量，测量的具体方法为，使用膜厚测量设备测量碳化硅裸片多个点的膜厚值Hi裸片，然后通过计算均值得到刻蚀前的碳化硅裸片的膜厚，即初始碳化硅裸片膜厚Hb，具体的均值计算公式为

Figure DEST_PATH_IMAGE002
，其中i为测量点个数，且i≥1，同样的，计算初始碳化硅掩膜膜厚Hc，且计算公式为
Figure DEST_PATH_IMAGE004
。As shown in Figure 1, a method for predicting the etching depth selectivity ratio between a silicon carbide die and a silicon carbide mask layer includes the following steps: obtaining the initial silicon carbide die film thickness and the initial silicon carbide mask layer thickness of the silicon carbide substrate before etching Film thickness, specifically, the film thickness value of the silicon carbide die and the film thickness value of the silicon carbide mask layer are measured at multiple points, so as to calculate the initial silicon carbide die film thickness and the initial silicon carbide mask film thickness, and further Yes, use white light interferometer, ellipsometer or film thickness meter and other equipment for measuring film thickness to perform multi-point measurement on silicon carbide die and silicon carbide mask layer. The specific method of measurement is to use film thickness measurement equipment to measure The film thickness value Hi bare chip of multiple points of the silicon carbide die, and then calculate the average value to obtain the film thickness of the silicon carbide die before etching, that is, the initial silicon carbide die film thickness Hb, the specific average value calculation formula is
Figure DEST_PATH_IMAGE002
, where i is the number of measurement points, and i≥1, similarly, calculate the initial silicon carbide mask film thickness Hc, and the calculation formula is
Figure DEST_PATH_IMAGE004
.

进一步地，使用干法刻蚀技术对碳化硅裸片与碳化硅掩膜层进行等离子化学刻蚀，且刻蚀碳化硅裸片和碳化硅掩膜层时，控制腔压、气体、气体流量和上电极功率不变，同时控制下电极功率为0，仅改变刻蚀温度和刻蚀时间，其中，下电极功率为0即表明在刻蚀过程中没有外界施加的力的作用，刻蚀为等离子中纯化学刻蚀。Further, use dry etching technology to perform plasma chemical etching on the silicon carbide die and the silicon carbide mask layer, and when etching the silicon carbide die and the silicon carbide mask layer, control the chamber pressure, gas, gas flow rate and The power of the upper electrode remains unchanged, while the power of the lower electrode is controlled to 0, and only the etching temperature and etching time are changed. Among them, the power of the lower electrode is 0, which means that there is no external force during the etching process, and the etching is plasma. Medium-pure chemical etching.

然后基于初始碳化硅裸片膜厚和初始碳化硅掩膜膜厚，获取在第一刻蚀温度下，碳化硅裸片的第一刻蚀深度变化数据一和碳化硅掩膜层的第二刻蚀深度变化数据一，具体包括以下步骤：多点测量第一刻蚀温度下，每一时刻的碳化硅裸片的膜厚和碳化硅掩膜层的膜厚，并获取每一时刻的碳化硅裸片膜厚均值一和碳化硅掩膜膜厚均值一；计算每一时刻的第一碳化硅裸片刻蚀深度和第一碳化硅掩膜刻蚀深度，分别得到第一刻蚀深度变化数据一和第二刻蚀深度变化数据一，其中，第一刻蚀深度变化数据一包含多个刻蚀时间以及多个刻蚀时间对应的碳化硅裸片刻蚀深度，第二刻蚀刻蚀深度变化数据一包括多个刻蚀时间以及多个刻蚀时间对应的碳化硅掩膜刻蚀深度。Then, based on the initial silicon carbide die film thickness and the initial silicon carbide mask film thickness, obtain the first etching depth change data of the silicon carbide die and the second etching depth change data of the silicon carbide mask layer at the first etching temperature. Etching depth change data 1, specifically includes the following steps: under the first etching temperature, the film thickness of the silicon carbide die and the film thickness of the silicon carbide mask layer at each moment are measured at multiple points, and the silicon carbide mask layer at each moment is obtained. Die film thickness average value 1 and silicon carbide mask film thickness average value 1; calculate the first silicon carbide die etching depth and the first silicon carbide mask etching depth at each moment, and obtain the first etching depth change data respectively And the second etch depth change data one, wherein the first etch depth change data one includes a plurality of etching times and the silicon carbide die etching depths corresponding to the multiple etching times, and the second etch depth change data one It includes multiple etching times and silicon carbide mask etching depths corresponding to the multiple etching times.

具体地，在第一刻蚀温度T1下，且T1≥-20℃，对碳化硅裸片以及碳化硅掩膜层进行刻蚀，刻蚀时间为1秒以上，此时随着刻蚀时间的变化，两者的刻蚀深度在不断地增加，以某一时刻t1为例，此时计算碳化硅裸片膜厚均值一

Figure DEST_PATH_IMAGE006
以及碳化硅掩膜膜厚均值一
Figure DEST_PATH_IMAGE008
的方式与初始碳化硅裸片膜厚、初始碳化硅掩膜膜厚方法相同，即
Figure DEST_PATH_IMAGE010
，
Figure DEST_PATH_IMAGE012
，其中，j为测量点个数，且j≥1，然后计算得到在t1时刻，第一碳化硅裸片刻蚀深度D裸片以及第一碳化硅掩膜刻蚀深度D掩膜，计算公式为：
Figure DEST_PATH_IMAGE014
，
Figure DEST_PATH_IMAGE016
，从而得到在T1温度下，碳化硅裸片刻蚀深度随刻蚀时间的变化关系数据，以及碳化硅掩膜层刻蚀深度随刻蚀时间的变化关系数据，即第一刻蚀深度变化数据一和第二刻蚀深度变化数据一。Specifically, at the first etching temperature T 1 , and T 1 ≥ -20°C, the silicon carbide die and the silicon carbide mask layer are etched, and the etching time is more than 1 second. As time changes, the etching depth of the two is constantly increasing. Taking a certain time t 1 as an example, the average thickness of the silicon carbide die is calculated at this time
Figure DEST_PATH_IMAGE006
and the average thickness of the silicon carbide mask
Figure DEST_PATH_IMAGE008
The method of is the same as that of initial SiC die film thickness and initial SiC mask film thickness, that is
Figure DEST_PATH_IMAGE010
,
Figure DEST_PATH_IMAGE012
, where j is the number of measurement points, and j ≥ 1, and then calculated at time t 1 , the first silicon carbide die etching depth D die and the first silicon carbide mask etching depth D mask , the calculation formula for:
Figure DEST_PATH_IMAGE014
,
Figure DEST_PATH_IMAGE016
, so as to obtain the relationship data of the etching depth of the silicon carbide die with the etching time at the temperature T1 , and the relationship data of the etching depth of the silicon carbide mask layer with the etching time, that is, the first etching depth variation data One and the second etch depth change data one.

同样地，再获取在第二刻蚀温度下，碳化硅裸片的第一刻蚀深度变化数据二和碳化硅掩膜层的第二刻蚀深度变化数据二，具体包括以下步骤：多点测量第二刻蚀温度下，每一时刻的碳化硅裸片的膜厚和碳化硅掩膜层的膜厚，并获取每一时刻的碳化硅裸片膜厚均值二和碳化硅掩膜膜厚均值二；计算每一时刻的第二碳化硅裸片刻蚀深度和第二碳化硅掩膜刻蚀深度，分别得到第一刻蚀深度变化数据二和第二刻蚀深度变化数据二，其中，第一刻蚀深度变化数据二包含多个刻蚀时间以及多个刻蚀时间对应的碳化硅裸片刻蚀深度，第二刻蚀刻蚀深度变化数据二包括多个刻蚀时间以及多个刻蚀时间对应的碳化硅掩膜刻蚀深度。Similarly, at the second etching temperature, the first etch depth change data 2 of the silicon carbide die and the second etch depth change data 2 of the silicon carbide mask layer are obtained, specifically including the following steps: multi-point measurement Under the second etching temperature, the film thickness of the silicon carbide die and the film thickness of the silicon carbide mask layer at each moment, and obtain the average value of the film thickness of the silicon carbide die and the average value of the film thickness of the silicon carbide mask at each moment 2. Calculate the etching depth of the second silicon carbide die and the etching depth of the second silicon carbide mask at each moment, and obtain the first etching depth change data two and the second etching depth change data two respectively, wherein the first The etching depth change data two includes multiple etching times and the etching depths of the silicon carbide die corresponding to the multiple etching times, and the second etching depth change data two includes multiple etching times and the etching depths corresponding to the multiple etching times Silicon carbide mask etch depth.

具体地，在第一刻蚀温度T2下，且T2≥-20℃，T1与T2不相等，对碳化硅裸片以及碳化硅掩膜层进行刻蚀，刻蚀时间为1秒以上，此时随着刻蚀时间的变化，两者的刻蚀深度在不断地增加，以某一时刻t2为例，此时计算碳化硅裸片膜厚均值二

Figure DEST_PATH_IMAGE018
以及碳化硅掩膜膜厚均值二
Figure DEST_PATH_IMAGE020
的方式与初始碳化硅裸片膜厚、初始碳化硅掩膜膜厚方法相同，即
Figure DEST_PATH_IMAGE022
，
Figure DEST_PATH_IMAGE024
，然后计算得到在t2时刻，第二碳化硅裸片刻蚀深度D裸片以及第二碳化硅掩膜刻蚀深度D掩膜，计算公式为：
Figure DEST_PATH_IMAGE026
，
Figure DEST_PATH_IMAGE028
，从而得到在T2温度下，碳化硅裸片刻蚀深度随刻蚀时间的变化关系数据，以及碳化硅掩膜层刻蚀深度随刻蚀时间的变化关系数据，即第一刻蚀深度变化数据二和第二刻蚀深度变化数据二。Specifically, at the first etching temperature T 2 , and T 2 ≥ -20°C, T 1 and T 2 are not equal, the silicon carbide die and the silicon carbide mask layer are etched, and the etching time is 1 second As mentioned above, at this time, with the change of etching time, the etching depth of the two is continuously increasing. Taking a certain time t 2 as an example, the average film thickness of the silicon carbide die is calculated at this time.
Figure DEST_PATH_IMAGE018
and the average thickness of the silicon carbide mask
Figure DEST_PATH_IMAGE020
The method of is the same as that of initial SiC die film thickness and initial SiC mask film thickness, that is
Figure DEST_PATH_IMAGE022
,
Figure DEST_PATH_IMAGE024
, and then calculate the second silicon carbide die etching depth D die and the second silicon carbide mask etching depth D mask at time t2 , the calculation formula is:
Figure DEST_PATH_IMAGE026
,
Figure DEST_PATH_IMAGE028
, so as to obtain the relationship data of the etching depth of the silicon carbide die with the etching time at the temperature T2 , and the relationship data of the etching depth of the silicon carbide mask layer with the etching time, that is, the first etching depth variation data Two and the second etch depth change data two.

进一步地，基于第一刻蚀深度变化数据一和第一刻蚀深度变化数据二，拟合碳化硅裸片刻蚀深度与刻蚀温度关系，并基于第二刻蚀深度变化数据一和第二刻蚀深度变化数据二，拟合碳化硅掩膜层刻蚀深度与刻蚀温度关系，由于纯物理刻蚀存在能量变化，但衡量能量变化的能量维度很多，例如受下电极施加的功率影响、不同材料本身键合的区别等，这些所涉及的物理变化为原子尺度，过于微观，导致难以将所有影响因素归纳起来，因此，本实施例从纯化学刻蚀角度出发，又由于化学刻蚀相当于化学反应，而化学反应最直观的就是存在能量变化，可以直接的通过吸热放热体现能量变化，因此本实施例通过添加温度模型的方法，对碳化硅裸片刻蚀深度与刻蚀温度关系进行拟合，得到碳化硅裸片刻蚀深度与刻蚀温度以及能量关系，对碳化硅掩膜层刻蚀深度与刻蚀温度关系进行拟合，得到碳化硅掩膜层刻蚀深度与刻蚀温度以及能量关系。Further, based on the first etch depth change data 1 and the first etch depth change data 2, the relationship between the etch depth of the silicon carbide die and the etching temperature is fitted, and based on the second etch depth change data 1 and the second etch depth Etching depth change data 2, fitting the relationship between the etching depth of the silicon carbide mask layer and the etching temperature, because there is energy change in pure physical etching, but there are many energy dimensions to measure the energy change, such as the influence of the power applied by the lower electrode, different The difference in the bonding of the material itself, etc., the physical changes involved are at the atomic scale, which is too microscopic, making it difficult to sum up all the influencing factors. Therefore, this embodiment starts from the perspective of pure chemical etching, and because chemical etching is equivalent to Chemical reaction, and the most intuitive chemical reaction is the existence of energy change, which can directly reflect energy change through heat absorption and heat release. Therefore, this embodiment uses the method of adding a temperature model to study the relationship between the etching depth of the silicon carbide die and the etching temperature. Fitting, the relationship between the etching depth of the silicon carbide bare chip and the etching temperature and energy is obtained, and the relationship between the etching depth of the silicon carbide mask layer and the etching temperature is fitted, and the etching depth and the etching temperature of the silicon carbide mask layer are obtained. energy relationship.

具体地，拟合碳化硅掩膜层刻蚀深度与刻蚀温度关系，包括以下步骤：根据每一时刻以及对应的第一碳化硅掩膜刻蚀深度，生成碳化硅掩膜刻蚀深度与时间的函数关系三；根据每一时刻以及对应的第二碳化硅掩膜刻蚀深度，生成碳化硅掩膜刻蚀深度与时间的函数关系四；根据能量方程，在函数关系三和函数关系四中添加温度模型，得到碳化硅掩膜刻蚀深度与刻蚀温度函数关系。Specifically, fitting the relationship between the etching depth of the silicon carbide mask layer and the etching temperature includes the following steps: generating the etching depth and time of the silicon carbide mask according to each moment and the corresponding etching depth of the first silicon carbide mask The functional relationship three; according to each moment and the corresponding second silicon carbide mask etching depth, generate the functional relationship four of the silicon carbide mask etching depth and time; according to the energy equation, in the functional relationship three and the functional relationship four A temperature model is added to obtain the functional relationship between the etching depth of the silicon carbide mask and the etching temperature.

其中，根据不同温度下，碳化硅掩膜层刻蚀深度随刻蚀时间的变化关系数据，进行对数化处理，即得到的函数关系三公式为

Figure DEST_PATH_IMAGE030
，函数关系四公式为
Figure DEST_PATH_IMAGE032
，其中，t选取3个以上的时间点，a、b均为常数，然后将函数关系三和函数关系四两边去对数处理，分别可得
Figure DEST_PATH_IMAGE034
；
Figure DEST_PATH_IMAGE036
，然后采用能量方程中的阿伦尼乌斯公式添加温度模型后，拟合得到
Figure DEST_PATH_IMAGE038
，其中，A、n为常数，R为摩尔气体常数，Q1为碳化硅掩膜层化学刻蚀所产生的能量值，其中，需要说明的是，在能量方程中，任何化学变化中的能量都遵循阿伦尼乌斯公式，且拟合成立的充分条件是碳化硅裸片刻蚀深度随刻蚀时间变化关系中满足
Figure DEST_PATH_IMAGE040
，成立的必要条件是
Figure DEST_PATH_IMAGE042
。Among them, according to the data of the relationship between the etching depth of the silicon carbide mask layer and the etching time at different temperatures, the logarithmic processing is carried out, that is, the obtained functional relationship is as follows:
Figure DEST_PATH_IMAGE030
, the functional relationship four formula is
Figure DEST_PATH_IMAGE032
, where, t selects more than 3 time points, a and b are both constants, and then logarithmically process the two sides of the functional relationship 3 and the functional relationship 4, respectively, we can get
Figure DEST_PATH_IMAGE034
;
Figure DEST_PATH_IMAGE036
, and then using the Arrhenius formula in the energy equation to add the temperature model, the fitting is obtained
Figure DEST_PATH_IMAGE038
, where A and n are constants, R is the molar gas constant, and Q1 is the energy value produced by chemical etching of the silicon carbide mask layer, where it should be noted that in the energy equation, the energy in any chemical change All follow the Arrhenius formula, and the sufficient condition for the fitting is that the relationship between the etching depth of the silicon carbide die and the etching time satisfies
Figure DEST_PATH_IMAGE040
, the necessary condition for the establishment of
Figure DEST_PATH_IMAGE042
.

更具体地，在基于上述充分条件和必要条件成立的前提下，才能确定两个温度下得到的函数关系式是同一个趋向，才能对两个函数关系添加温度模型进行拟合处理，得到

Figure 790661DEST_PATH_IMAGE038
，而
Figure 832435DEST_PATH_IMAGE038
来源于
Figure DEST_PATH_IMAGE044
，其中k、g、l均为常数，由于logD掩膜和logt的关系是线性的，由此可知，logD掩膜和温度T的关系热力学里面默认为logD掩膜与
Figure DEST_PATH_IMAGE046
线性相关，所以在
Figure DEST_PATH_IMAGE048
和
Figure DEST_PATH_IMAGE050
的公式基础上，直接添加温度模型，可以直接得到公式
Figure 408910DEST_PATH_IMAGE044
，再将
Figure 804119DEST_PATH_IMAGE044
去对数处理即可得到
Figure 415229DEST_PATH_IMAGE038
，至此完成碳化硅掩膜层的拟合。More specifically, on the premise that the above sufficient and necessary conditions are established, it can be determined that the functional relationship obtained at the two temperatures has the same trend, and then the temperature model can be added to the two functional relationships for fitting, and the obtained
Figure 790661DEST_PATH_IMAGE038
,and
Figure 832435DEST_PATH_IMAGE038
from
Figure DEST_PATH_IMAGE044
, where k, g, and l are all constants. Since the relationship between logD mask and logt is linear, it can be seen that the relationship between logD mask and temperature T is defaulted in thermodynamics as logD mask and
Figure DEST_PATH_IMAGE046
are linearly related, so in
Figure DEST_PATH_IMAGE048
and
Figure DEST_PATH_IMAGE050
On the basis of the formula, directly add the temperature model, you can directly get the formula
Figure 408910DEST_PATH_IMAGE044
, and then
Figure 804119DEST_PATH_IMAGE044
After logarithmic processing, we can get
Figure 415229DEST_PATH_IMAGE038
, so far the fitting of the silicon carbide mask layer is completed.

另一方面，拟合碳化硅裸片刻蚀深度与刻蚀温度关系，包括以下步骤： 根据每一时刻以及对应的第一碳化硅裸片刻蚀深度，生成碳化硅裸片刻蚀深度与时间的函数关系一；根据每一时刻以及对应的第二碳化硅裸片刻蚀深度，生成碳化硅裸片刻蚀深度与时间的函数关系二；根据能量方程，在函数关系一和函数关系二中添加温度模型，得到碳化硅裸片刻蚀深度与刻蚀温度函数关系。On the other hand, fitting the relationship between the etching depth of the silicon carbide die and the etching temperature includes the following steps: generating a functional relationship between the etching depth of the silicon carbide die and time according to each moment and the corresponding etching depth of the first silicon carbide die 1. According to each moment and the corresponding etching depth of the second silicon carbide die, a function relation 2 of the etching depth of the silicon carbide die and time is generated; according to the energy equation, a temperature model is added to the function relation 1 and the function relation 2 to obtain SiC die etch depth as a function of etch temperature.

其中，根据不同温度下，碳化硅裸片刻蚀深度随刻蚀时间的变化关系数据，进行对数化处理，即得到的函数关系一公式为

Figure DEST_PATH_IMAGE052
，函数关系二公式为
Figure DEST_PATH_IMAGE054
，其中，t选取3个以上的时间点，c、d均为常数，然后将函数关系一和函数关系二两边去对数，分别可得
Figure DEST_PATH_IMAGE056
；
Figure DEST_PATH_IMAGE058
，然后采用能量方程中的阿伦尼乌斯公式添加温度模型后，拟合得到
Figure DEST_PATH_IMAGE060
，其中，B、m为常数，R为摩尔气体常数，Q2为碳化硅裸片化学刻蚀所产生的能量值，其中，需要说明的是，在能量方程中，任何化学变化中的能量都遵循阿伦尼乌斯公式，且拟合成立的充分条件是碳化硅裸片刻蚀深度随刻蚀时间变化关系中
Figure DEST_PATH_IMAGE062
，成立的必要条件是
Figure DEST_PATH_IMAGE064
。Among them, according to the data of the relationship between the etching depth of the silicon carbide die and the etching time at different temperatures, logarithmic processing is performed, that is, the obtained functional relationship is as follows:
Figure DEST_PATH_IMAGE052
, the formula of the second functional relationship is
Figure DEST_PATH_IMAGE054
, where, t selects more than 3 time points, c and d are constants, and then take the logarithm on both sides of functional relation 1 and functional relation 2, respectively, we can get
Figure DEST_PATH_IMAGE056
;
Figure DEST_PATH_IMAGE058
, and then using the Arrhenius formula in the energy equation to add the temperature model, the fitting is obtained
Figure DEST_PATH_IMAGE060
, where B and m are constants, R is the molar gas constant, and Q2 is the energy value produced by chemical etching of the silicon carbide die. It should be noted that in the energy equation, the energy in any chemical change is Follow the Arrhenius formula, and the sufficient condition for the fitting is that the etching depth of the silicon carbide die varies with the etching time.
Figure DEST_PATH_IMAGE062
, the necessary condition for the establishment of
Figure DEST_PATH_IMAGE064
.

更具体地，在基于上述充分条件和必要条件成立的前提下，才能确定两个温度下得到的函数关系式是同一个趋向，才能对两个函数关系添加温度模型进行拟合处理，得到

Figure 221380DEST_PATH_IMAGE060
，而
Figure 222834DEST_PATH_IMAGE060
来源于
Figure DEST_PATH_IMAGE066
，其中
Figure DEST_PATH_IMAGE068
、
Figure DEST_PATH_IMAGE070
、
Figure DEST_PATH_IMAGE072
均为常数，由于logD裸片和logt的关系是线性的，由此可知，logD裸片和温度T的关系热力学里面默认为logD裸片与
Figure 546368DEST_PATH_IMAGE046
线性相关，所以在
Figure DEST_PATH_IMAGE074
和
Figure DEST_PATH_IMAGE076
的公式基础上，直接添加温度模型，可以直接得到公式
Figure 11985DEST_PATH_IMAGE066
，再将
Figure 124123DEST_PATH_IMAGE066
去对数处理即可得到
Figure 878452DEST_PATH_IMAGE060
，至此完成碳化硅裸片的拟合。More specifically, on the premise that the above sufficient and necessary conditions are established, it can be determined that the functional relationship obtained at the two temperatures has the same trend, and then the temperature model can be added to the two functional relationships for fitting, and the obtained
Figure 221380DEST_PATH_IMAGE060
,and
Figure 222834DEST_PATH_IMAGE060
from
Figure DEST_PATH_IMAGE066
,in
Figure DEST_PATH_IMAGE068
,
Figure DEST_PATH_IMAGE070
,
Figure DEST_PATH_IMAGE072
Both are constants. Since the relationship between logD die and logt is linear, it can be seen that the relationship between logD die and temperature T is defaulted in thermodynamics as logD die and temperature T.
Figure 546368DEST_PATH_IMAGE046
are linearly related, so in
Figure DEST_PATH_IMAGE074
and
Figure DEST_PATH_IMAGE076
On the basis of the formula, directly add the temperature model, you can directly get the formula
Figure 11985DEST_PATH_IMAGE066
, and then
Figure 124123DEST_PATH_IMAGE066
After logarithmic processing, we can get
Figure 878452DEST_PATH_IMAGE060
, so far the fitting of the silicon carbide die is completed.

最后，基于碳化硅裸片刻蚀深度与刻蚀温度关系，以及碳化硅掩膜层刻蚀深度与刻蚀温度关系，预测在不同刻蚀温度下，碳化硅裸片与碳化硅掩膜层的刻蚀深度，并计算预测选择比。Finally, based on the relationship between the etching depth of the silicon carbide die and the etching temperature, and the relationship between the etching depth of the silicon carbide mask layer and the etching temperature, the etching temperature of the silicon carbide die and the silicon carbide mask layer is predicted at different etching temperatures. eclipse depth and calculate the predicted selection ratio.

完成拟合后，当工作人员在进行化学刻蚀时，通过上述拟合得到的关系式，即可预测出碳化硅裸片以及碳化硅掩膜层的刻蚀深度，并通过公式得到预测选择比S预测，其中，预测选择比的计算公式为：S预测=D裸片/D掩膜，从而通过刻蚀温度控制即可实现纯化学刻蚀中，对于碳化硅裸片以及碳化硅掩膜层刻蚀深度的把控，无需工作人员通过不断实测进行调节两者刻蚀深度的控制，大幅度降低了工作人员的工作负荷。After the fitting is completed, when the staff is performing chemical etching, the etching depth of the silicon carbide die and the silicon carbide mask layer can be predicted through the above fitting relationship, and the predicted selection ratio can be obtained through the formula S prediction , where the calculation formula of the prediction selection ratio is: S prediction = D die / D mask , so that pure chemical etching can be realized through etching temperature control, for silicon carbide die and silicon carbide mask layer The control of the etching depth does not require the staff to adjust the control of the etching depth through continuous measurement, which greatly reduces the workload of the staff.

本实施例中，以取若干4寸SiC基底进行化学刻蚀为例进行说明，保证刻蚀参数不变，刻蚀时间分别为2.5min、5min、10min、16.6min、25min不等，碳化硅腌膜层及碳化硅裸片的刻蚀温度分别10℃、150℃。得到碳化硅腌膜层在10℃、150℃刻蚀深度随时间的数据，如下表1，碳化硅裸片在10℃、150℃刻蚀深度随时间的数据，如下表2。In this embodiment, taking several 4-inch SiC substrates for chemical etching as an example to illustrate, to ensure that the etching parameters remain unchanged, the etching time is 2.5min, 5min, 10min, 16.6min, 25min, etc. The etching temperatures of the film layer and silicon carbide die are 10°C and 150°C, respectively. The data of the etching depth of the silicon carbide pickled film layer at 10°C and 150°C over time are obtained, as shown in Table 1 below, and the data of the etching depth of the silicon carbide die at 10°C and 150°C over time are shown in Table 2 below.

其中，由表1可建立碳化硅腌膜层刻蚀深度随刻蚀时间的关系为：10℃下，logD掩膜=2.01+0.90logt；150℃下，logD掩膜=2.02+0.87logt，由表2可建立碳化硅裸片刻蚀深度随刻蚀时间的关系为：10℃下，logD裸片=1.85+1.08logt；150℃下，logD裸片=2.07+1.05logtAmong them, the relationship between the etching depth of the silicon carbide pickled film layer and the etching time can be established from Table 1: at 10°C, logD mask =2.01+0.90logt; at 150°C, logD mask =2.02+0.87logt, by Table 2 can establish the relationship between the etching depth of silicon carbide die and the etching time: at 10°C, logD die =1.85+1.08logt; at 150°C, logD die =2.07+1.05logt

此时，碳化硅腌膜层刻蚀深度随刻蚀时间的变化关系的充分条件为

Figure DEST_PATH_IMAGE078
，满足要求，因此可得到温度拟合后的碳化硅腌膜层刻蚀深度与刻蚀温度以及能量值之间的关系式：
Figure DEST_PATH_IMAGE080
，且满足必要条件
Figure DEST_PATH_IMAGE082
，同样可得，碳化硅裸片刻蚀深度随刻蚀时间的变化关系的充分条件为
Figure DEST_PATH_IMAGE084
，满足要求，因此可得到温度拟合后的碳化硅裸片刻蚀深度与刻蚀温度以及能量值之间的关系式：
Figure DEST_PATH_IMAGE086
，且满足必要条件
Figure DEST_PATH_IMAGE088
。At this time, the sufficient condition for the relationship between the etching depth of the silicon carbide pickled film layer and the etching time is
Figure DEST_PATH_IMAGE078
, to meet the requirements, so the relationship between the etching depth of the silicon carbide pickled film layer after temperature fitting and the etching temperature and energy value can be obtained:
Figure DEST_PATH_IMAGE080
, and satisfy the necessary conditions
Figure DEST_PATH_IMAGE082
, it can also be obtained that the sufficient condition for the relationship between the etching depth of silicon carbide die and the etching time is
Figure DEST_PATH_IMAGE084
, to meet the requirements, so the relationship between the etching depth of the silicon carbide die after temperature fitting and the etching temperature and energy value can be obtained:
Figure DEST_PATH_IMAGE086
, and satisfy the necessary conditions
Figure DEST_PATH_IMAGE088
.

再计算得到预测的刻蚀选择比如下：

Figure DEST_PATH_IMAGE090
，从而通过刻蚀温度控制即可实现纯化学刻蚀中，对于碳化硅裸片以及碳化硅掩膜层刻蚀深度的把控。Then calculate the predicted etching selection ratio as follows:
Figure DEST_PATH_IMAGE090
, so that the control of the etching depth of the silicon carbide die and the silicon carbide mask layer in pure chemical etching can be realized by controlling the etching temperature.

Figure DEST_PATH_IMAGE092
Figure DEST_PATH_IMAGE092

表1Table 1

Figure DEST_PATH_IMAGE094
Figure DEST_PATH_IMAGE094

表2Table 2

实施例二Embodiment two

如图1所示，一种碳化硅裸片与碳化硅掩膜层刻蚀深度选择比预测方法，还包括验证预测选择比的准确性，具体包括以下步骤：选取第三刻蚀温度对碳化硅裸片和碳化硅掩膜层进行刻蚀，并测量实际刻蚀选择比；根据碳化硅裸片刻蚀深度与刻蚀温度关系，以及碳化硅掩膜层刻蚀深度与刻蚀温度关系，计算预测选择比；设定误差阈值，计算实际刻蚀选择比与预测选择比的相对偏差值，若相对偏差值小于且等于误差阈值，则预测选择比准确。As shown in Figure 1, a method for predicting the etching depth selection ratio of a silicon carbide die and a silicon carbide mask layer also includes verifying the accuracy of the predicted selection ratio, which specifically includes the following steps: selecting the third etching temperature for silicon carbide Etch the die and the silicon carbide mask layer, and measure the actual etching selectivity ratio; calculate and predict according to the relationship between the etching depth of the silicon carbide die and the etching temperature, and the relationship between the etching depth of the silicon carbide mask layer and the etching temperature Selection ratio: set the error threshold, calculate the relative deviation value between the actual etching selection ratio and the predicted selection ratio, if the relative deviation value is less than or equal to the error threshold value, the predicted selection ratio is accurate.

通过实施例一中的方法得到预测选择比后，还可对预测选择比进行准确性验证，且判断依据为选择验证刻蚀温度T3，且T3在T1和T2之间，刻蚀时间t3，通过与实施例一相同的多点测量的方法并计算得到碳化硅裸片刻蚀深度以及碳化硅掩膜刻蚀深度，然后通过选择比计算公式，计算得到实际选择比S实际，再得到在T3温度以及刻蚀时间为t3下的预测选择比S预测，误差阈值设定为20%，然后计算相对偏差值，判断是否满足相对偏差值≤20%，若满足，则实施例一的方法得到的预测选择比可靠，反之则不可靠，其中相对偏差值的计算公式为：

Figure DEST_PATH_IMAGE096
，从而实现对预测选择比的可靠性验证。After the predicted selection ratio is obtained by the method in Example 1, the accuracy of the predicted selection ratio can also be verified, and the judgment is based on the selection and verification etching temperature T 3 , and T 3 is between T 1 and T 2 . At time t 3 , the etching depth of the silicon carbide die and the etching depth of the silicon carbide mask are calculated by the same multi-point measurement method as in Example 1, and then the actual selection ratio Sactual is obtained by calculating the selection ratio calculation formula, and then Obtain the prediction selection ratio S prediction under T3 temperature and etching time t3 , the error threshold is set to 20%, then calculate the relative deviation value, judge whether to satisfy the relative deviation value≤20%, if satisfied, then embodiment The prediction selection ratio obtained by the first method is reliable, and vice versa, it is not reliable, and the calculation formula of the relative deviation value is:
Figure DEST_PATH_IMAGE096
, so as to realize the reliability verification of the prediction selection ratio.

在本实施例中，以实施例一中的实验数据为例，验证实施例一中的预测选择比的可靠性时，可以得到，第三刻蚀温度为100℃、刻蚀时间为5min时，实验得到碳化硅掩膜层刻蚀深度为361nm，碳化硅裸片刻蚀深度520nm，则可得S实际为1.44，计算S预测为1.29，进而得到相对偏差值=

Figure DEST_PATH_IMAGE098
，即预测选择比准确可靠，同样的，调整刻蚀时间可以得到，第三刻蚀温度为100℃、刻蚀时间为16.6min时，实验得到碳化硅掩膜层刻蚀深度1011nm，碳化硅裸片刻蚀深度1522nm，则可得S实际为1.50，计算S预测为1.58，进而得到相对偏差值=
Figure DEST_PATH_IMAGE100
，同样验证了所得到的预测选择比的准确性。In this embodiment, taking the experimental data in Embodiment 1 as an example, when verifying the reliability of the predicted selectivity ratio in Embodiment 1, it can be obtained that when the third etching temperature is 100°C and the etching time is 5 minutes, The experiment shows that the etching depth of the silicon carbide mask layer is 361nm, and the etching depth of the silicon carbide die is 520nm, then the actual S is 1.44, and the calculated S is predicted to be 1.29, and then the relative deviation value =
Figure DEST_PATH_IMAGE098
, that is, the prediction selection ratio is accurate and reliable. Similarly, adjusting the etching time can be obtained. When the third etching temperature is 100°C and the etching time is 16.6min, the experimentally obtained silicon carbide mask layer etching depth is 1011nm, and the silicon carbide bare If the etching depth of the chip is 1522nm, the actual value of S is 1.50, and the calculated S is predicted to be 1.58, and then the relative deviation value =
Figure DEST_PATH_IMAGE100
, also verified the accuracy of the obtained prediction selection ratio.

本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，以上所述，仅为本发明的较佳实施例，并非对本发明任何形式上和实质上的限制，应当指出，对于本技术领域的普通技术人员，在不脱离本发明方法的前提下，还将可以做出若干改进和补充，这些改进和补充也应视为本发明的保护范围。凡熟悉本专业的技术人员，在不脱离本发明的精神和范围的情况下，当可利用以上所揭示的技术内容而做出的些许更动、修饰与演变的等同变化，均为本发明的等效实施例；同时，凡依据本发明的实质技术对上述实施例所作的任何等同变化的更动、修饰与演变，均仍属于本发明的技术方案的范围内。Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above-mentioned embodiments can be completed through computer programs to instruct related hardware. Formal and substantive limitations, it should be pointed out that for those of ordinary skill in the art, without departing from the premise of the method of the present invention, some improvements and supplements can also be made, and these improvements and supplements should also be regarded as the present invention. scope of protection. Those who are familiar with this profession, without departing from the spirit and scope of the present invention, when they can use the technical content disclosed above to make some changes, modifications and equivalent changes of evolution, are all included in the present invention. Equivalent embodiments; at the same time, all changes, modifications and evolutions of any equivalent changes made to the above-mentioned embodiments according to the substantive technology of the present invention still belong to the scope of the technical solution of the present invention.

Claims (8)

1. A silicon carbide bare chip and silicon carbide mask layer etching depth selection ratio prediction method is characterized by comprising the following steps:
ensuring other etching parameters to be unchanged, and acquiring first etching depth change data I of the silicon carbide bare chip and second etching depth change data I of the silicon carbide mask layer at a first etching temperature, wherein the first etching depth change data I is data of the etching depth of the silicon carbide bare chip changing along with etching time, and the second etching depth change data I is data of the etching depth of the silicon carbide mask layer changing along with etching time, and
ensuring other etching parameters to be unchanged, and acquiring first etching depth change data II of the silicon carbide bare chip and second etching depth change data II of the silicon carbide mask layer at a second etching temperature, wherein the first etching depth change data II is data of the etching depth of the silicon carbide bare chip changing along with etching time, and the second etching depth change data II is data of the etching depth of the silicon carbide mask layer changing along with etching time;
fitting the relation between the etching depth and the etching temperature of the silicon carbide bare chip specifically comprises the following steps:
generating a silicon carbide die etch depth as a function of time from the first etch depth variation data:
Figure DEST_PATH_IMAGE001
wherein, in the process,
Figure 404912DEST_PATH_IMAGE002
is the first etching temperature T 1 The etching depth of the lower silicon carbide bare chip is one, t is more than 3 time points, and c and d are constants;
generating a second function relation of the etching depth of the silicon carbide bare chip and time according to the second first etching depth change data:
Figure DEST_PATH_IMAGE003
wherein, in the step (A),
Figure 184781DEST_PATH_IMAGE004
is the second etching temperature T 2 The etching depth of the lower silicon carbide bare chip is two, t is more than 3 time points, and c and d are constants;
according to the Arrhenius formula in the energy equation, the function relationship is IAnd adding a temperature model in the second functional relation to obtain the functional relation between the etching depth and the etching temperature of the silicon carbide bare chip:
Figure DEST_PATH_IMAGE005
wherein B, m is constant, R is the molar gas constant, Q 2 The energy value generated by the chemical etching of the silicon carbide bare chip and the sufficient condition that the functional relation between the etching depth and the etching temperature of the silicon carbide bare chip is established are
Figure 284324DEST_PATH_IMAGE006
The essential condition is that
Figure DEST_PATH_IMAGE007
；
Fitting the relation between the etching depth and the etching temperature of the silicon carbide mask layer, and specifically comprising the following steps:
generating a third function relation of the etching depth of the silicon carbide mask and time according to the second etching depth change data:
Figure 500541DEST_PATH_IMAGE008
wherein, in the step (A),
Figure DEST_PATH_IMAGE009
is the first etching temperature T 1 Etching depth I of the lower silicon carbide mask, t is more than 3 selected time points, and a and b are constants;
generating a fourth functional relation between the etching depth of the silicon carbide mask and time according to the second etching depth change data:
Figure 163473DEST_PATH_IMAGE010
wherein, in the process,
Figure DEST_PATH_IMAGE011
is the second etching temperature T 2 Etching depth of the lower silicon carbide mask is two, t is more than 3 selected time points, and a and b are constants;
according toAdding a temperature model in the third functional relation and the fourth functional relation to an Arrhenius formula in an energy equation to obtain a functional relation between the etching depth of the silicon carbide mask and the etching temperature:
Figure 843853DEST_PATH_IMAGE012
wherein A, n is constant, R is the molar gas constant, Q 1 The method comprises the steps of generating an energy value for chemical etching of a silicon carbide mask layer, wherein a sufficient condition that the functional relation between the etching depth of the silicon carbide mask and the etching temperature is established is that
Figure DEST_PATH_IMAGE013
With the proviso that
Figure 317559DEST_PATH_IMAGE014
；
Predicting the etching depths of the silicon carbide bare chip and the silicon carbide mask layer at different etching temperatures based on the relationship between the etching depth and the etching temperature of the silicon carbide bare chip and the relationship between the etching depth and the etching temperature of the silicon carbide mask layer, and calculating a prediction selection ratio;
the silicon carbide bare chip is a silicon carbide film layer on a silicon carbide substrate, the silicon carbide mask layer is a film layer of silicon oxide and silicon nitride materials, and the silicon carbide mask layer is used for blocking the silicon carbide film layer on the silicon carbide substrate from etching during an etching process.
2. The method of claim 1, wherein the step of obtaining first etching depth variation data one of the silicon carbide bare chip and second etching depth variation data one of the silicon carbide mask layer comprises the steps of:
measuring the film thickness of the silicon carbide bare chip and the film thickness of the silicon carbide mask layer at each moment at a first etching temperature at multiple points, and obtaining a first average value of the film thickness of the silicon carbide bare chip and a first average value of the film thickness of the silicon carbide mask at each moment;
and calculating the first etching depth of the silicon carbide bare chip and the first etching depth of the silicon carbide mask at each moment to respectively obtain first etching depth change data I and second etching depth change data I.
3. The method of claim 2, wherein obtaining the second data of the first etching depth variation of the silicon carbide bare chip and the second data of the second etching depth variation of the silicon carbide mask layer comprises the steps of:
measuring the film thickness of the silicon carbide bare chip and the film thickness of the silicon carbide mask layer at each moment at a second etching temperature at multiple points, and obtaining a second film thickness average value of the silicon carbide bare chip and a second film thickness average value of the silicon carbide mask at each moment;
and calculating the second etching depth of the silicon carbide bare chip and the second etching depth of the silicon carbide mask at each moment to respectively obtain second first etching depth change data and second etching depth change data.
4. The method of predicting the etching depth selection ratio of the silicon carbide bare chip to the silicon carbide mask layer according to claim 1, further comprising obtaining an initial silicon carbide bare chip film thickness and an initial silicon carbide mask film thickness of the silicon carbide substrate before etching, comprising the steps of:
and measuring the film thickness value of the silicon carbide bare chip and the film thickness value of the silicon carbide mask layer at multiple points, and calculating the initial film thickness of the silicon carbide bare chip and the initial film thickness of the silicon carbide mask.
5. The method of claim 1, further comprising verifying an accuracy of the predicted selectivity ratio.
6. The method of claim 5, wherein verifying the accuracy of the predicted selectivity comprises:
selecting a third etching temperature to etch the silicon carbide bare chip and the silicon carbide mask layerEtching is performed, and an actual etching selection ratio S is measured Practice of ；
Calculating and predicting selection ratio S according to the relation between the etching depth and the etching temperature of the silicon carbide bare chip and the relation between the etching depth and the etching temperature of the silicon carbide mask layer Prediction ；
Setting an error threshold, calculating a relative deviation value of the actual etching selection ratio and the predicted selection ratio, and if the relative deviation value is less than or equal to the error threshold, determining that the predicted selection ratio is accurate, wherein the calculation formula of the relative deviation value is as follows: relative deviation value =
Figure DEST_PATH_IMAGE015
。
7. The method of any one of claims 1 to 6, wherein during etching of the silicon carbide bare chip and the silicon carbide mask layer, the chamber pressure, the gas type, the gas flow and the power of the upper electrode are controlled to be unchanged, the power of the lower electrode is controlled to be 0, and only the etching temperature and the etching time are changed.
8. The method of any one of claims 1 to 6, wherein the silicon carbide bare chip and the silicon carbide mask layer are subjected to plasma chemical etching by using a dry etching technique.
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