Background
In the phase-shifting full-bridge power supply system, a control chip collects power supply output as a feedback signal, and outputs four-way switch control signals after processing signals in the chip to control the on and off of four switching tubes of the phase-shifting full-bridge circuit so as to output required voltage and realize a voltage conversion function. JUCC1895 is a phase-shifting full-bridge control chip developed by the 58 th research of the Chinese electric department, the chip has strong driving capability of output signals, a self-delay function and convenient realization of soft switching in the phase-shifting full-bridge, and meanwhile, the chip also has under-voltage and overvoltage protection and soft starting and soft switching-off functions, and is a phase-shifting full-bridge control chip with strong functions.
The soft start function of JUCC and 1895 chips can gradually increase the duty ratio or phase shift angle to complete the closed loop control of slow start of the power supply until reaching the duty ratio or phase shift angle required by the output voltage, and can effectively reduce the conduction adjustment stress of the switching tube in the full-bridge circuit. The soft start function of the chip is realized by externally connecting a capacitor Css between the ground of the chip through a soft start pin (hereinafter called SS pin), when the chip meets the start condition (no fault occurs, the start enable is released, the power supply voltage meets the requirements and other conditions), the pin becomes an approximate constant current source, a constant current is used for charging the externally connected capacitor Css, and the capacity value of the capacitor Css determines the time of the soft start process. When the chip enters a slow starting state, the SS pin charges the capacitor Css, the voltage of the Css gradually rises, meanwhile, the voltage of the SS pin of the chip synchronously rises along with the voltage of the capacitor of the Css, and when the voltage exceeds the threshold voltage of 0.5V in the chip, pulse output pins OUTA-OUTD of the chip start to generate pulses to push the power supply to start.
However, due to the influence of JUCC and 1895 chip manufacturing process, the anti-interference capability of the comparator inside the SS pin needs to be improved. When the SS pin is affected by noise, especially when the SS pin reaches about 0.5V of the chip threshold voltage, the output of the internal comparator jumps between high and low levels due to the noise, so that spike pulse occurs at the output end in the soft start process of the chip. The pulse spike has different duration and amplitude due to different external interference influence forms, and the switching tube is rapidly turned off after being rapidly turned on through the driving circuit even under the condition that the driving signals of the same bridge arm are temporarily overlapped, so that the power switching tube bears higher voltage variation dU/dt, misleading of the switching tube due to the influence of parasitic parameters and the like is extremely easy to occur, and further the damage of a power circuit of the switching power supply is caused.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a circuit for solving soft start spike pulse and a control method thereof. By adding peripheral circuits to JUCC and 1895 chips, the problem that SS pins are easy to be interfered by the outside and output spike pulses during soft start is solved. The actual soft start threshold voltage of the chip is increased to be above 0.5V by detecting the SS pin voltage and controlling the EAP pin level, so that spike pulse generated by the interference of the comparator when the threshold voltage of the chip is 0.5V is avoided. The control method of the invention describes the method objects, working and control sequences, etc. of the circuit control.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
in one aspect, the invention provides a circuit for solving soft start spike pulse, which comprises an EAN pin voltage lifting circuit, a voltage comparison circuit and a reference voltage circuit;
The output end of the EAN pin voltage lifting circuit is connected with the EAN pin of the JUCC1895 chip, and a third voltage is input to the EAN pin based on the pulse triggering starting condition of the JUCC1895 chip;
The output end of the voltage comparison circuit is connected with an EAP pin of the JUCC1895 chip, the input end of the voltage comparison circuit is connected with an SS pin of the JUCC1895 chip, and the voltage at the SS pin is collected to be a first voltage;
the reference voltage circuit is connected with the other input end of the voltage comparison circuit and provides a second voltage for the voltage comparison circuit as a reference voltage;
When the first voltage is not greater than the second voltage, the voltage comparison circuit pulls down the EAP pin of the JUCC1895 chip so that the EAOUT pin of the JUCC1895 chip is zero or negative, and the JUCC1895 chip closes the pulse output pins OUTA-OUTD;
When the first voltage exceeds the second voltage, the voltage comparison circuit releases control over the EAP pin of the JUCC1895 chip, the EAOUT pin of the JUCC1895 chip rises along with the clamp of the SS pin, and the pulse output pins OUTA-OUTD send waveforms to continue the soft start process.
Further, the second voltage ranges from 0.51V to 0.80V.
Further, the third voltage ranges from 0.30V to (the second voltage is-0.01V).
In a second aspect, the present invention also provides a control method for solving the problem of soft start spike pulse, comprising the steps of:
s1, inputting a third voltage to an EAN pin of a JUCC1895 chip through an EAN pin voltage lifting circuit based on a pulse trigger starting condition of the JUCC1895 chip, connecting the voltage comparison circuit through a reference voltage circuit, and providing the second voltage as a reference voltage for the voltage comparison circuit;
s2, acquiring the voltage at the SS pin of the JUCC1895 chip as a first voltage through a voltage comparison circuit, and comparing the first voltage with a second voltage;
And S3, according to a comparison result, controlling the voltage comparison circuit to pull down an EAP pin of the JUCC1895 chip when the first voltage is less than or equal to the second voltage, and releasing the control of the EAP pin of the JUCC1895 chip when the first voltage is greater than the second voltage.
When JUCC and 1895 chips start to enter soft start, the third voltage V3 and the reference voltage, i.e. the second voltage V2, are already established, and the third voltage V3 is already input to the EAN pin. According to the working principle and the starting process of the chip, when the SS pin of the chip is in soft start, the error amplifier output EAout pin of the chip is subjected to active clamping by the SS pin, the EAN pin voltage lifting circuit adds the third voltage V3 to the EAN pin, so that the EAout pin of the chip is in zero level or negative level, and the chip actively closes the pulse output pins OUTA-OUTD through internal comparison. Therefore, when the chip is in soft start, the capacitor Css is charged by the constant current, the first voltage V1 is gradually increased at this time, and before the first voltage V1 is increased to be not greater than the second voltage V2, the effect result of the EAN pin and the EAP pin, that is, EAout pin is zero or EAout pin, at this time, the chip actively turns off the pulse output pins OUTA-OUTD.
Preferably, the range of the second voltage V2 is 0.51V to 0.8V, and the smaller the value of the second voltage V2 in the range is, the better. The invention increases the actual soft start threshold voltage of the chip, namely the second voltage V2, to above 0.5V, thereby avoiding spike pulse generated by the interference of the comparator when the threshold voltage of the chip is 0.5V.
When the first voltage V1 exceeds the second voltage V2, the control on the EAP pin is released, the EAout pin rapidly follows the clamp rising of the SS pin, and the pulse output pins OUTA-OUTD of the chip send out waveforms to continue the soft start process.
The beneficial effects of the invention are as follows:
The actual soft start voltage of JUCC1895 chips is increased to more than 0.5V through a simple peripheral reference and comparison circuit, so that spike pulse generated by interference of an internal comparator caused by a production process and the like is avoided. The probability of the situations of error conduction and the like of the power tube of the switching power supply is reduced, the stability of a power loop of the switching power supply is improved, and the overhaul and maintenance cost is further reduced.
Detailed Description
In order to make the technical scheme of the invention more clear, the invention is clearly and completely described below with reference to the specific embodiments of the drawings.
Specifically, as shown in fig. 1, the output end of the voltage comparison circuit 3 is connected with the EAP pin of the JUCC1895 chip 2, so that the EAP pin can be controlled. The reference voltage circuit 4 is connected to the voltage comparing circuit 3, and provides the voltage comparing circuit 3 with the second voltage V2, which is the comparison reference voltage. The selection range of the second voltage V2 is 0.51V-0.80V, and according to the soft start process of the JUCC1895 chip 2, the smaller the voltage of the second voltage V2 is in the range, the better the voltage is, and the second voltage V2 can be selected to be 0.51V.
The EAN pin voltage lifting circuit 1 is connected with an EAN pin of the JUCC1895 chip 2, the EAN pin voltage lifting circuit 1 inputs a third voltage V3 for the EAN pin, the voltage range of V3 can be selected from the range of 0.30V to (V2-0.01V), and the voltage of V3 can be selected to be 0.4V according to the pulse triggering starting condition of the JUCC1895 chip 2.
As shown in fig. 2, when the EAN pin third voltage V3 and the reference voltage (the second voltage V2) are first established, the JUCC1895 chip 2 charges the capacitor Css through a constant current, the voltage at the SS pin is collected as the first voltage V1, the first voltage V1 gradually increases, when the first voltage V1 increases to be not greater than the second voltage V2 (i.e., V1 is less than or equal to V2 and is determined as Y), the EAN pin of the JUCC1895 chip 2 acts on the EAP pin (the EAP pin is pulled down) to obtain a result of being the EAout pin as zero or zero, at this time, the JUCC1895 chip 2 actively turns off the pulse output pin OUTA to OUTD through internal comparison, when the first voltage V1 exceeds the second voltage V2 (i.e., V1 is less than or equal to V2 and is determined as N at this time), the voltage comparison circuit 3 releases the control of the EAP pin, and the EAout pin rapidly follows the rising of the SS, and the pulse output pin OUTA of the soft JUCC chip 1895 continues to emit a waveform td.
The circuit or the control process realizes that the actual soft start threshold voltage of JUCC1895 chip 2 is increased to be more than 0.5V, thereby avoiding spike pulse generated by comparator interference when the SS pin voltage of JUCC1895 chip 2 passes through the threshold voltage of 0.5V.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.