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CN113778925A - Method for reading and writing off-board RAM data through CPCI bus and off-board data reading and writing module - Google Patents

Method for reading and writing off-board RAM data through CPCI bus and off-board data reading and writing module Download PDF

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CN113778925A
CN113778925A CN202111144165.2A CN202111144165A CN113778925A CN 113778925 A CN113778925 A CN 113778925A CN 202111144165 A CN202111144165 A CN 202111144165A CN 113778925 A CN113778925 A CN 113778925A
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cpci
ram
board
address
module
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崔晓颖
田兴科
赵立臻
王英胜
王莹
刘淑云
杨硕
林桔秋
郭黎霞
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China North Vehicle Research Institute
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus

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Abstract

本发明属于CPCI总线数据处理技术领域，具体涉及一种通过CPCI总线读写板外RAM数据的方法及板外数据读写模块。所述方法通过板外数据读写模块来实施，所述板外数据读写模块包括：CPCI从设备配置模块、CPCI从设备初始化模块、RAM首地址获得模块、读RAM模块、写RAM模块；其中，嵌入式设备中的板卡1与板卡2通过CPCI总线相连。板卡1上的MPU为CPCI主设备，板卡2上的CPCI桥为CPCI从设备；所述方法用于实现板卡1读写板卡2上的RAM数据；本发明主要针对基于CPCI总线的嵌入式系统读写板外RAM数据的需求开发而成，通过对RAM中大量数据的读写，满足了系统对数据处理和系统控制的要求。

Figure 202111144165

The invention belongs to the technical field of CPCI bus data processing, and in particular relates to a method for reading and writing off-board RAM data through a CPCI bus, and an off-board data reading and writing module. The method is implemented by an off-board data reading and writing module, and the off-board data reading and writing module includes: a CPCI slave device configuration module, a CPCI slave device initialization module, a RAM first address acquisition module, a RAM read module, and a RAM write module; wherein , the board 1 in the embedded device is connected with the board 2 through the CPCI bus. The MPU on the board 1 is a CPCI master device, and the CPCI bridge on the board 2 is a CPCI slave device; the method is used to implement the board 1 to read and write the RAM data on the board 2; the present invention is mainly aimed at CPCI bus-based The embedded system is developed to meet the needs of reading and writing off-board RAM data. By reading and writing a large amount of data in RAM, it meets the system's requirements for data processing and system control.

Figure 202111144165

Description

Method for reading and writing off-board RAM data through CPCI bus and off-board data reading and writing module
Technical Field
The invention belongs to the technical field of CPCI bus data processing, and particularly relates to a method for reading and writing off-board RAM data through a CPCI bus and an off-board data reading and writing module.
Background
With the continuous improvement of the digitization level, important data such as the real-time state, the historical data and the factory parameters of the system are recorded and stored. The data is collected by one board card in the embedded device and stored in the RAM on the board card, and meanwhile, the data needs to be provided for other board cards in the embedded device for system control and display.
Data exchange between the board cards in the embedded device is completed through an internal bus, and the CPCI bus is one of the widely used internal buses. The CPCI bus is formed by modifying the PCI bus, improves the reliability and the load capacity by improving the connector, supports hot plug and inherits the PCI bus technology.
The data transmission mode of the CPCI bus inherits the data transmission mode of the PCI bus. The data transmission operation mode of the CPCI bus is a master-slave mode, the CPCI bus is initiated by a CPCI master device, and the CPCI slave device responds as a target. CPCI equipment and a CPCI bridge can be connected to the CPCI bus in an attachable mode, only 1 main equipment is allowed, and the other main equipment is slave equipment. Bridging of the CPCI bridge is required when some chips without CPCI interface are to be accessed as a CPCI device.
Therefore, if the RAM chip on one board card in the embedded device is to be accessed by another board card in the embedded device and the two board cards are connected through the CPCI bus, the RAM chip needs to be connected with the CPCI bus by using the CPCI bridge chip first, and then the RAM chip can be accessed by the device on the CPCI bus.
Because of this, each large device provider actively develops a chip or a bridge chip based on CPCI for use, and how to realize reading and writing of off-board RAM data through a CPCI bus is a hot research topic in the technical field.
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is as follows: under the condition that a board card 1 and a board card 2 in the embedded equipment are connected through a CPCI bus, how to read and write RAM data on the board card 2 by the board card 1.
(II) technical scheme
In order to solve the above technical problem, the present invention provides a method for reading and writing off data of an off-board RAM through a CPCI bus, the method is implemented by an off-board data reading and writing module, and the off-board data reading and writing module includes: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
the MPU on the board card 1 is a CPCI master device, and the CPCI bridge on the board card 2 is a CPCI slave device; the board card 1 is connected with the board card 2 through a CPCI bus; the method is used for realizing the reading and writing of the RAM data on the board card 2 by the board card 1;
the method comprises the following steps:
step 1: the CPCI slave device configuration module configures the CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
step 2: the CPCI slave equipment initialization module initializes CPCI slave equipment according to the sender ID and the equipment ID;
and step 3: the RAM first address obtaining module obtains the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
and 4, step 4: the RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment;
and 5: the write RAM module writes data into a designated RAM address location of the CPCI slave device.
In the method, the RAM is connected to the CPCI bridge, the CPCI bridge is configured to be a slave device on a CPCI bus, and a master device on the CPCI bus performs operations of reading and writing RAM data through the CPCI bridge.
In the step 1, in the process of configuring the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class number are parameters for configuring the CPCI slave device, and the parameters are written into a configuration chip of the CPCI bridge chip and stored in a device which can be saved after power failure; and connecting the configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip.
In the step 2, in the process of initializing the CPCI slave device, the board card 1 and the board card 2 are two board cards in the embedded device, and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the step 3, in the process of obtaining the RAM space first address of the CPCI slave device, the RAM and the CPCI slave device, that is, the CPCI bridge are both located on the board card 2, and the RAM is connected to the board card 2, so that the RAM becomes a local memory of the CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
In the step 4, in the process of obtaining the data of the specified RAM address unit of the CPCI slave device, that is, reading the RAM, each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and the data of the RAM unit is read through the absolute address.
In the step 5, in the process of writing data into the designated RAM address unit of the CPCI slave device, that is, into the RAM, each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and data is written into the RAM unit through the absolute address.
In addition, the present invention also provides an off-board data read-write module, which is used for implementing the method for reading and writing off-board RAM data through the CPCI bus, and the off-board data read-write module includes: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
the CPCI slave device configuration module is used for configuring a CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
the CPCI slave device initialization module is used for initializing CPCI slave devices according to the sender ID and the device ID;
the RAM first address obtaining module is used for obtaining the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
the RAM reading module is used for obtaining the appointed RAM address unit data of the CPCI slave equipment;
the write RAM module is used for writing data into a designated RAM address unit of the CPCI slave device.
In the process that the CPCI slave device configuration module configures the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class number are parameters for configuring the CPCI slave device, the parameters are written into a configuration chip of the CPCI bridge chip, and the configuration is stored in a device which can be saved after power failure; connecting a configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip;
in the process that the CPCI slave equipment initialization module initializes the CPCI slave equipment, the board card 1 and the board card 2 are two board cards in the embedded equipment and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the process that the RAM initial address obtaining module obtains the RAM space initial address of the CPCI slave device, the RAM and the CPCI slave device, namely a CPCI bridge, are both positioned on the board card 2 and connected, so that the RAM becomes a local memory of a CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
The RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment, namely each RAM unit has an absolute address in the RAM reading process, the absolute address is obtained by adding an offset address to a first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the RAM unit data are read through the absolute addresses;
and in the process of writing data into a designated RAM address unit of the CPCI slave device, namely, the RAM, each RAM unit has an absolute address which is obtained by adding an offset address to the first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the data is written into the RAM unit through the absolute address.
(III) advantageous effects
Compared with the prior art, the invention provides a method for reading and writing the data of the off-board RAM through the CPCI bus and an off-board data reading and writing module, which are developed mainly aiming at the requirement of reading and writing the data of the off-board RAM of the embedded system based on the CPCI bus, and the requirements of the system on data processing and system control are met by reading and writing a large amount of data in the RAM.
Drawings
Fig. 1 is a hardware configuration diagram of the present invention.
Fig. 2 is a flowchart illustrating the operation of the board 1 according to the present invention.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
In order to solve the above technical problem, the present invention provides a method for reading and writing off data of an off-board RAM through a CPCI bus, the method is implemented by an off-board data reading and writing module, and the off-board data reading and writing module includes: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
as shown in fig. 1, the MPU on the board 1 is a CPCI master device, and the CPCI bridge on the board 2 is a CPCI slave device; the board card 1 is connected with the board card 2 through a CPCI bus; the method is used for realizing the reading and writing of the RAM data on the board card 2 by the board card 1;
the method comprises the following steps:
step 1: the CPCI slave device configuration module configures the CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
step 2: the CPCI slave equipment initialization module initializes CPCI slave equipment according to the sender ID and the equipment ID;
and step 3: the RAM first address obtaining module obtains the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
and 4, step 4: the RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment;
and 5: the write RAM module writes data into a designated RAM address location of the CPCI slave device.
In the method, the RAM is connected to the CPCI bridge, the CPCI bridge is configured to be a slave device on a CPCI bus, and a master device on the CPCI bus performs operations of reading and writing RAM data through the CPCI bridge.
In the step 1, in the process of configuring the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class number are parameters for configuring the CPCI slave device, and the parameters are written into a configuration chip of the CPCI bridge chip and stored in a device which can be saved after power failure; and connecting the configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip.
In the step 2, in the process of initializing the CPCI slave device, the board card 1 and the board card 2 are two board cards in the embedded device, and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the step 3, in the process of obtaining the RAM space first address of the CPCI slave device, the RAM and the CPCI slave device, that is, the CPCI bridge are both located on the board card 2, and the RAM is connected to the board card 2, so that the RAM becomes a local memory of the CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
In the step 4, in the process of obtaining the data of the specified RAM address unit of the CPCI slave device, that is, reading the RAM, each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and the data of the RAM unit is read through the absolute address.
In the step 5, in the process of writing data into the designated RAM address unit of the CPCI slave device, that is, into the RAM, each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and data is written into the RAM unit through the absolute address.
In addition, the present invention also provides an off-board data read-write module, which is used for implementing the method for reading and writing off-board RAM data through the CPCI bus, and the off-board data read-write module includes: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
the CPCI slave device configuration module is used for configuring a CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
the CPCI slave device initialization module is used for initializing CPCI slave devices according to the sender ID and the device ID;
the RAM first address obtaining module is used for obtaining the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
the RAM reading module is used for obtaining the appointed RAM address unit data of the CPCI slave equipment;
the write RAM module is used for writing data into a designated RAM address unit of the CPCI slave device.
In the process that the CPCI slave device configuration module configures the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class number are parameters for configuring the CPCI slave device, the parameters are written into a configuration chip of the CPCI bridge chip, and the configuration is stored in a device which can be saved after power failure; connecting a configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip;
in the process that the CPCI slave equipment initialization module initializes the CPCI slave equipment, the board card 1 and the board card 2 are two board cards in the embedded equipment and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the process that the RAM initial address obtaining module obtains the RAM space initial address of the CPCI slave device, the RAM and the CPCI slave device, namely a CPCI bridge, are both positioned on the board card 2 and connected, so that the RAM becomes a local memory of a CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
The RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment, namely each RAM unit has an absolute address in the RAM reading process, the absolute address is obtained by adding an offset address to a first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the RAM unit data are read through the absolute addresses;
and in the process of writing data into a designated RAM address unit of the CPCI slave device, namely, the RAM, each RAM unit has an absolute address which is obtained by adding an offset address to the first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the data is written into the RAM unit through the absolute address.
Example 1
The embodiment comprises the following steps:
step 1: configuring the CPCI slave device: the vendor ID, the equipment ID, the subsystem ID, the class code number and the like are parameters for configuring the CPCI slave equipment, the parameters are written into a configuration chip of the CPCI bridge chip, and the configuration is stored in a device which can be saved after power failure. And connecting the configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip.
Step 2: the CPCI master device initializes the CPCI slave device: the board card 1 and the board card 2 are two board cards in an embedded device and communicate through a CPCI bus of a bottom board. The MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is main equipment on a CPCI bus. The MPU uses the Vender ID and the device ID in step 1 as parameters for searching for the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the slave device, and completing initialization of the CPCI slave device.
And step 3: obtaining a RAM first address: the RAM and the CPCI slave device (i.e., the CPCI bridge) are both located on the board card 2, and the RAM becomes a local memory of the CPCI bus interface when the RAM and the CPCI slave device are connected. And (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
And 4, step 4: reading the RAM: each RAM cell has an absolute address obtained by adding the offset address to the first address obtained in step 3. Each absolute address corresponds to one RAM unit, and the data of the RAM units are read through the absolute addresses.
And 5: writing to a RAM: each RAM cell has an absolute address obtained by adding the offset address to the first address obtained in step 3. Each absolute address corresponds to one RAM unit, and data is written into the RAM units through the absolute addresses.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (10)

1.一种通过CPCI总线读写板外RAM数据的方法，其特征在于，所述方法通过板外数据读写模块来实施，所述板外数据读写模块包括：CPCI从设备配置模块、CPCI从设备初始化模块、RAM首地址获得模块、读RAM模块、写RAM模块；1. a method for reading and writing off-board RAM data by CPCI bus, is characterized in that, described method is implemented by off-board data reading and writing module, and described off-board data reading and writing module comprises: CPCI is from equipment configuration module, CPCI Slave device initialization module, RAM first address acquisition module, read RAM module, write RAM module; 板卡1上的MPU为CPCI主设备，板卡2上的CPCI桥为CPCI从设备；板卡1与板卡2通过CPCI总线相连；所述方法用于实现板卡1读写板卡2上的RAM数据；The MPU on the board 1 is a CPCI master device, and the CPCI bridge on the board 2 is a CPCI slave device; the board 1 and the board 2 are connected through the CPCI bus; the method is used to realize the board 1 reading and writing on the board 2 RAM data; 所述方法包括如下步骤：The method includes the following steps: 步骤1：所述CPCI从设备配置模块将板卡2上的CPCI桥配置为CPCI总线上的CPCI从设备；Step 1: the CPCI slave device configuration module configures the CPCI bridge on the board 2 as a CPCI slave device on the CPCI bus; 步骤2：所述CPCI从设备初始化模块按照Vender ID和设备ID初始化CPCI从设备；Step 2: the CPCI slave device initialization module initializes the CPCI slave device according to the Vender ID and the device ID; 步骤3：所述RAM首地址获得模块按照总线编号、设备编号和功能编号获得CPCI从设备的RAM空间首地址；Step 3: the RAM first address obtaining module obtains the RAM space first address of the CPCI slave device according to the bus number, device number and function number; 步骤4：所述读RAM模块获得CPCI从设备的指定RAM地址单元数据；Step 4: the read RAM module obtains the specified RAM address unit data of the CPCI slave device; 步骤5：所述写RAM模块将数据写入CPCI从设备的指定RAM地址单元。Step 5: The write RAM module writes data into the designated RAM address unit of the CPCI slave device. 2.如权利要求1所述的通过CPCI总线读写板外RAM数据的方法，其特征在于，所述方法中，将RAM连接到CPCI桥上，将CPCI桥配置为CPCI总线上的从设备，CPCI总线上的主设备通过CPCI桥进行读写RAM数据的操作。2. the method for reading and writing RAM data outside the board by CPCI bus as claimed in claim 1, is characterized in that, in described method, RAM is connected on CPCI bridge, CPCI bridge is configured as the slave device on CPCI bus, The master device on the CPCI bus performs the operations of reading and writing RAM data through the CPCI bridge. 3.如权利要求1所述的通过CPCI总线读写板外RAM数据的方法，其特征在于，所述步骤1中，将CPCI桥配置为CPCI从设备的过程中，Vender ID、设备ID、子系统ID和类码号为配置CPCI从设备的参数，将这些参数写入CPCI桥芯片的配置芯片，并将该配置存储在断电可保存的器件中；将配置芯片与PCI桥相连，通过该配置芯片完成对PCI桥的配置。3. the method for reading and writing RAM data outside the board by CPCI bus as claimed in claim 1, is characterized in that, in described step 1, CPCI bridge is configured as CPCI from the process of equipment, Vender ID, device ID, sub- The system ID and class code number are the parameters for configuring the CPCI slave device, write these parameters into the configuration chip of the CPCI bridge chip, and store the configuration in the device that can be saved after power failure; connect the configuration chip to the PCI bridge, and pass the configuration chip. The configuration chip completes the configuration of the PCI bridge. 4.如权利要求3所述的通过CPCI总线读写板外RAM数据的方法，其特征在于，所述步骤2中，初始化CPCI从设备的过程中，板卡1与板卡2是嵌入式设备中的两块板卡，通过底板的CPCI总线进行通讯；板卡1上的MPU运行在嵌入式操作系统VxWorks上，该设备为CPCI总线上的CPCI主设备；此MPU将步骤1中的Vender ID和设备ID作为搜索CPCI总线设备的参数，据此获得CPCI从设备的总线编号、设备编号和功能编号，完成对CPCI从设备的初始化。4. the method for reading and writing RAM data outside the board by CPCI bus as claimed in claim 3, it is characterized in that, in described step 2, in the process of initializing CPCI slave device, board 1 and board 2 are embedded devices The two boards in the board communicate through the CPCI bus of the backplane; the MPU on board 1 runs on the embedded operating system VxWorks, and this device is the CPCI master device on the CPCI bus; this MPU uses the Vender ID in step 1. And the device ID is used as the parameter to search for the CPCI bus device, according to this, the bus number, device number and function number of the CPCI slave device are obtained, and the initialization of the CPCI slave device is completed. 5.如权利要求4所述的通过CPCI总线读写板外RAM数据的方法，其特征在于，所述步骤3中，获得CPCI从设备的RAM空间首地址的过程中，RAM与CPCI从设备，即CPCI桥均位于板卡2上，将二者连接，则RAM成为CPCI总线接口的本地存储器；用步骤2获得的CPCI总线从设备的总线编号、设备编号和功能编号作为参数，获得RAM的首地址。5. the method for reading and writing RAM data outside the board by CPCI bus as claimed in claim 4, it is characterized in that, in described step 3, obtain CPCI from the process of the RAM space first address of equipment, RAM and CPCI from equipment, That is, the CPCI bridges are located on the board 2, and the two are connected, and the RAM becomes the local memory of the CPCI bus interface; the bus number, device number and function number of the CPCI bus slave device obtained in step 2 are used as parameters to obtain the RAM header. address. 6.如权利要求5所述的通过CPCI总线读写板外RAM数据的方法，其特征在于，所述步骤4中，获得CPCI从设备的指定RAM地址单元数据，即读RAM的过程中，每一个RAM单元都有一个绝对地址，该绝对地址由步骤3获得的首地址加上偏移地址而得，每一个绝对地址对应一个RAM单元，通过绝对地址读取RAM单元数据。6. the method for reading and writing RAM data outside the board by CPCI bus as claimed in claim 5, it is characterized in that, in described step 4, obtain CPCI from the specified RAM address unit data of equipment, namely in the process of reading RAM, every A RAM unit has an absolute address, which is obtained by adding the offset address to the first address obtained in step 3. Each absolute address corresponds to a RAM unit, and the data of the RAM unit is read through the absolute address. 7.如权利要求6所述的通过CPCI总线读写板外RAM数据的方法，其特征在于，所述步骤5中，将数据写入CPCI从设备的指定RAM地址单元，即写RAM的过程中，每一个RAM单元都有一个绝对地址，该绝对地址由步骤3获得的首地址加上偏移地址而得，每一个绝对地址对应一个RAM单元，通过绝对地址向RAM单元写数据。7. the method for reading and writing RAM data outside the board by CPCI bus as claimed in claim 6, is characterized in that, in described step 5, data is written into CPCI from the designated RAM address unit of equipment, namely in the process of writing RAM , each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the first address obtained in step 3, each absolute address corresponds to a RAM unit, and data is written to the RAM unit through the absolute address. 8.一种板外数据读写模块，其用于实施权利要求1至7任一项所述通过CPCI总线读写板外RAM数据的方法，其特征在于，所述板外数据读写模块包括：CPCI从设备配置模块、CPCI从设备初始化模块、RAM首地址获得模块、读RAM模块、写RAM模块；8. an off-board data read-write module, which is used to implement the method for reading and writing off-board RAM data by CPCI bus described in any one of claims 1 to 7, it is characterized in that, described off-board data read-write module comprises: : CPCI slave device configuration module, CPCI slave device initialization module, RAM first address acquisition module, RAM read module, RAM write module; 所述CPCI从设备配置模块用于将板卡2上的CPCI桥配置为CPCI总线上的CPCI从设备；The CPCI slave device configuration module is used to configure the CPCI bridge on the board 2 as a CPCI slave device on the CPCI bus; 所述CPCI从设备初始化模块用于按照Vender ID和设备ID初始化CPCI从设备；The CPCI slave device initialization module is used to initialize the CPCI slave device according to Vender ID and device ID; 所述RAM首地址获得模块用于按照总线编号、设备编号和功能编号获得CPCI从设备的RAM空间首地址；The RAM first address obtaining module is used to obtain the RAM space first address of the CPCI slave device according to the bus number, device number and function number; 所述读RAM模块用于获得CPCI从设备的指定RAM地址单元数据；The read RAM module is used to obtain the specified RAM address unit data of the CPCI slave device; 所述写RAM模块用于将数据写入CPCI从设备的指定RAM地址单元。The write RAM module is used for writing data into the designated RAM address unit of the CPCI slave device. 9.如权利要求8所述的通过CPCI总线读写板外RAM数据的方法，其特征在于，所述CPCI从设备配置模块将CPCI桥配置为CPCI从设备的过程中，Vender ID、设备ID、子系统ID和类码号为配置CPCI从设备的参数，将这些参数写入CPCI桥芯片的配置芯片，并将该配置存储在断电可保存的器件中；将配置芯片与PCI桥相连，通过该配置芯片完成对PCI桥的配置；9. the method for reading and writing off-board RAM data by CPCI bus as claimed in claim 8, it is characterized in that, described CPCI is configured as CPCI bridge from the process of equipment from equipment configuration module, Vender ID, equipment ID, The subsystem ID and class code number are the parameters for configuring the CPCI slave device, write these parameters into the configuration chip of the CPCI bridge chip, and store the configuration in the device that can be saved after power failure; connect the configuration chip to the PCI bridge, and pass The configuration chip completes the configuration of the PCI bridge; 所述CPCI从设备初始化模块初始化CPCI从设备的过程中，板卡1与板卡2是嵌入式设备中的两块板卡，通过底板的CPCI总线进行通讯；板卡1上的MPU运行在嵌入式操作系统VxWorks上，该设备为CPCI总线上的CPCI主设备；此MPU将步骤1中的Vender ID和设备ID作为搜索CPCI总线设备的参数，据此获得CPCI从设备的总线编号、设备编号和功能编号，完成对CPCI从设备的初始化。In the process of initializing the CPCI slave device by the CPCI slave device initialization module, board 1 and board 2 are two boards in the embedded device, and communicate through the CPCI bus of the backplane; the MPU on board 1 runs in the embedded device. On the operating system VxWorks, the device is the CPCI master device on the CPCI bus; this MPU uses the Vender ID and device ID in step 1 as the parameters to search for the CPCI bus device, and obtains the bus number, device number and number of the CPCI slave device accordingly. Function number to complete the initialization of the CPCI slave device. 所述RAM首地址获得模块获得CPCI从设备的RAM空间首地址的过程中，RAM与CPCI从设备，即CPCI桥均位于板卡2上，将二者连接，则RAM成为CPCI总线接口的本地存储器；用步骤2获得的CPCI总线从设备的总线编号、设备编号和功能编号作为参数，获得RAM的首地址。In the process that the RAM first address obtaining module obtains the first address of the RAM space of the CPCI slave device, the RAM and the CPCI slave device, that is, the CPCI bridge, are both located on the board 2, and the two are connected, and the RAM becomes the local memory of the CPCI bus interface. ; Use the bus number, device number and function number of the CPCI bus slave device obtained in step 2 as parameters to obtain the first address of the RAM. 10.如权利要求9所述的通过CPCI总线读写板外RAM数据的方法，其特征在于，所述读RAM模块获得CPCI从设备的指定RAM地址单元数据，即读RAM的过程中，每一个RAM单元都有一个绝对地址，该绝对地址由所述RAM首地址获得模块获得的首地址加上偏移地址而得，每一个绝对地址对应一个RAM单元，通过绝对地址读取RAM单元数据；10. the method for reading and writing off-board RAM data by CPCI bus as claimed in claim 9, it is characterized in that, described read RAM module obtains CPCI from the specified RAM address unit data of equipment, namely in the process of reading RAM, each The RAM unit has an absolute address, which is obtained by adding the first address obtained by the RAM first address obtaining module and the offset address, and each absolute address corresponds to a RAM unit, and the RAM unit data is read through the absolute address; 所述写RAM模块将数据写入CPCI从设备的指定RAM地址单元，即写RAM的过程中，每一个RAM单元都有一个绝对地址，该绝对地址由所述RAM首地址获得模块获得的首地址加上偏移地址而得，每一个绝对地址对应一个RAM单元，通过绝对地址向RAM单元写数据。The write RAM module writes data into the specified RAM address unit of the CPCI slave device, that is, in the process of writing the RAM, each RAM unit has an absolute address, and the absolute address is obtained by the RAM first address obtaining module. The first address obtained by the module The offset address is added, and each absolute address corresponds to a RAM unit, and data is written to the RAM unit through the absolute address.
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