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DE69029122D1 - Prüfmustergenerator - Google Patents

Prüfmustergenerator

Info

Publication number
DE69029122D1
DE69029122D1 DE69029122T DE69029122T DE69029122D1 DE 69029122 D1 DE69029122 D1 DE 69029122D1 DE 69029122 T DE69029122 T DE 69029122T DE 69029122 T DE69029122 T DE 69029122T DE 69029122 D1 DE69029122 D1 DE 69029122D1
Authority
DE
Germany
Prior art keywords
dram
test patterns
clock pulses
read out
fifo memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69029122T
Other languages
English (en)
Other versions
DE69029122T2 (de
Inventor
Atsushi Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE69029122D1 publication Critical patent/DE69029122D1/de
Application granted granted Critical
Publication of DE69029122T2 publication Critical patent/DE69029122T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31919—Storing and outputting test patterns

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Dram (AREA)
DE69029122T 1989-06-16 1990-06-13 Prüfmustergenerator Expired - Fee Related DE69029122T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP15409789 1989-06-16
PCT/JP1990/000767 WO1990015999A1 (en) 1989-06-16 1990-06-13 Test pattern generator

Publications (2)

Publication Number Publication Date
DE69029122D1 true DE69029122D1 (de) 1996-12-19
DE69029122T2 DE69029122T2 (de) 1997-04-03

Family

ID=15576849

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69029122T Expired - Fee Related DE69029122T2 (de) 1989-06-16 1990-06-13 Prüfmustergenerator

Country Status (5)

Country Link
US (1) US5265102A (de)
EP (1) EP0429673B1 (de)
JP (1) JP2936547B2 (de)
DE (1) DE69029122T2 (de)
WO (1) WO1990015999A1 (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5349587A (en) * 1992-03-26 1994-09-20 Northern Telecom Limited Multiple clock rate test apparatus for testing digital systems
JPH07225261A (ja) * 1994-02-09 1995-08-22 Advantest Corp 半導体試験装置用パターン発生器
US5815512A (en) * 1994-05-26 1998-09-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory testing device
JPH0862302A (ja) * 1994-08-19 1996-03-08 Advantest Corp サイクル遅延用パターン発生器
US6286120B1 (en) 1994-09-01 2001-09-04 Teradyne, Inc. Memory architecture for automatic test equipment using vector module table
US5805471A (en) * 1994-11-01 1998-09-08 Pycon, Inc. Driver board apparatus having SRAM and burn-in system and method using host computer
TW358907B (en) * 1994-11-22 1999-05-21 Monolithic System Tech Inc A computer system and a method of using a DRAM array as a next level cache memory
WO1996016371A1 (en) * 1994-11-22 1996-05-30 Monolithic System Technology, Inc. Method and structure for utilizing a dram array as second level cache memory
JPH08184648A (ja) * 1994-12-28 1996-07-16 Advantest Corp 半導体試験装置用テストパターンの高速転送装置
US6128700A (en) * 1995-05-17 2000-10-03 Monolithic System Technology, Inc. System utilizing a DRAM array as a next level cache memory and method for operating same
JPH1073643A (ja) * 1996-09-02 1998-03-17 Mitsubishi Electric Corp 半導体装置試験治具
US6249533B1 (en) 1996-11-29 2001-06-19 Advantest Corporation Pattern generator
JP3233068B2 (ja) * 1997-05-23 2001-11-26 安藤電気株式会社 パターン発生装置
US6272588B1 (en) * 1997-05-30 2001-08-07 Motorola Inc. Method and apparatus for verifying and characterizing data retention time in a DRAM using built-in test circuitry
US6161206A (en) * 1998-04-30 2000-12-12 Credence Systems Corporation Pattern generator for a semiconductor integrated circuit tester
US6651203B1 (en) * 1999-05-17 2003-11-18 Infineon Technologies Ag On chip programmable data pattern generator for semiconductor memories
US6321356B1 (en) * 1999-05-18 2001-11-20 Micron Technology, Inc. Programmable pattern generator
US6671845B1 (en) * 1999-10-19 2003-12-30 Schlumberger Technologies, Inc. Packet-based device test system
WO2002019339A1 (fr) * 2000-08-31 2002-03-07 Nec Corporation Dispositif de memoire a semiconducteurs, son procede de verification et circuit de verification
US6598112B1 (en) * 2000-09-11 2003-07-22 Agilent Technologies, Inc. Method and apparatus for executing a program using primary, secondary and tertiary memories
US7062697B2 (en) * 2000-12-07 2006-06-13 Youngtek Electronics Corporation Pre-stored digital word generator
EP2104051B1 (de) 2001-03-29 2019-11-20 Panasonic Intellectual Property Management Co., Ltd. Datenschutzsystem, das Daten durch Verschlüsselung schützt
US7106227B2 (en) * 2001-09-28 2006-09-12 Agilent Technologies, Inc. Method and apparatus for synchronizing a multiple-stage multiplexer
US7073100B2 (en) * 2002-11-11 2006-07-04 International Business Machines Corporation Method for testing embedded DRAM arrays
JP4237109B2 (ja) * 2004-06-18 2009-03-11 エルピーダメモリ株式会社 半導体記憶装置及びリフレッシュ周期制御方法
US7321521B2 (en) 2004-07-02 2008-01-22 Seagate Technology Llc Assessing energy requirements for a refreshed device
US7177222B2 (en) 2005-03-04 2007-02-13 Seagate Technology Llc Reducing power consumption in a data storage system
US20070050668A1 (en) * 2005-09-01 2007-03-01 Micron Technology, Inc. Test mode to force generation of all possible correction codes in an ECC memory
JP5220639B2 (ja) * 2009-01-29 2013-06-26 日本エンジニアリング株式会社 テスト信号生成装置
US8448008B2 (en) * 2009-03-27 2013-05-21 Mentor Graphics Corporation High speed clock control
US8233919B2 (en) 2009-08-09 2012-07-31 Hntb Holdings Ltd. Intelligently providing user-specific transportation-related information
KR102849290B1 (ko) * 2020-08-21 2025-08-25 삼성전자주식회사 반도체 장치 및 메모리 시스템

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5439980B2 (de) * 1972-03-24 1979-11-30
US3982111A (en) * 1975-08-04 1976-09-21 Bell Telephone Laboratories, Incorporated Memory diagnostic arrangement
US4451918A (en) * 1981-10-09 1984-05-29 Teradyne, Inc. Test signal reloader
JPS59204782A (ja) * 1983-05-10 1984-11-20 Nec Corp 試験パタ−ン発生装置
JPS59207495A (ja) * 1983-05-11 1984-11-24 Hitachi Ltd パタ−ン発生回路
US4622668A (en) * 1984-05-09 1986-11-11 International Business Machines Corporation Process and apparatus for testing a microprocessor and dynamic ram
US4727312A (en) * 1985-12-23 1988-02-23 Genrad, Inc. Circuit tester
JPS63183696A (ja) * 1987-01-23 1988-07-29 Nec Corp メモリ装置
US4827476A (en) * 1987-04-16 1989-05-02 Tandem Computers Incorporated Scan test apparatus for digital systems having dynamic random access memory
JPS63265181A (ja) * 1987-04-22 1988-11-01 Nec Corp フアンクシヨンテスタ
US4782487A (en) * 1987-05-15 1988-11-01 Digital Equipment Corporation Memory test method and apparatus
US4980888A (en) * 1988-09-12 1990-12-25 Digital Equipment Corporation Memory testing system
JPH0255331U (de) * 1988-10-11 1990-04-20
JPH02195599A (ja) * 1989-01-24 1990-08-02 Ricoh Co Ltd 情報処理装置

Also Published As

Publication number Publication date
US5265102A (en) 1993-11-23
JP2936547B2 (ja) 1999-08-23
EP0429673A4 (en) 1992-07-01
EP0429673A1 (de) 1991-06-05
WO1990015999A1 (en) 1990-12-27
DE69029122T2 (de) 1997-04-03
JPH0394182A (ja) 1991-04-18
EP0429673B1 (de) 1996-11-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee