JP2001313474A - Wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which is free from cracking or breaking in resin or a wiring board body and ensures electric continuity of electronic components and inner wiring layers or the like surely and stably, in a wiring board wherein the electronic components are included in the wiring board main body via the resin. SOLUTION: This wiring board is provided with the wiring board body 2 having a surface 2a and a back 2b, insulating layers, 4, 5 laminated on the surface 2a and the backside 2b of the wiring board body 2 via wiring layers 6, 7, through holes 8 penetrating the wiring board body 2 and the insulating layers 4, 5, and clip capacitors (electronic components) 10 which are included in the through holes 8 and fixed via resin 9. Thermal expansion coefficients α1, α2, α3 of the wiring board body 2, the resin 9 and the chip capacitor 10 are related by a formula 1; α3<α1<=α2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board having electronic components built in a wiring board body and the like, and a wiring board having a semiconductor element such as an IC chip mounted above the surface of the wiring board.

[0002]

2. Description of the Related Art In order to cope with recent miniaturization of wiring boards and densification of wiring in the wiring boards, not only electronic parts such as IC chips are mounted on a first main surface of the wiring board, but also cores are mounted. 2. Description of the Related Art There has been proposed a wiring board in which electronic components are embedded inside a board. For example, in a wiring board 70 shown in FIG. 6A, a chip capacitor 73 is inserted into a through hole 72 formed in an insulating board 71, and electrodes 74, 74 at both ends thereof are provided.
Are connected via solder 78 to a land 77 formed between the insulating substrate 71 and the adjacent insulating layer 76. By filling the resin 79 in the through-hole 72, the capacitor 73 is fixedly mounted. An internal electrode 75 is provided inside the capacitor 73.

In a wiring board 80 shown in FIG. 6B, one opening of a through hole 82 formed in an insulating substrate 81 is closed with an adhesive temporary fixing film (not shown). In a state where a chip capacitor 83 having an internal electrode 85 is attached, a resin 89 is filled in the through hole 82 and solidified, and then the temporary fixing film is removed. As shown in FIG. 6B, such a wiring board 80
The electrodes 84, 84 located at both ends of 3 are connected to lands 87, 87 previously provided between the insulating substrate 81 and the insulating layer 86 adjacent thereto via solders 88, 88.

[0004]

However, in the wiring boards 70 and 80 described above, the insulating boards 71 and 81 and the through holes 7 are provided.
Between the resin 79, 89 filled in the resin 2, 82, and between the resin 79, 89 and a capacitor (electronic component) embedded in the resin 79, 89
73 and 83, at least one of the insulating substrates 7 near the boundary due to a difference in the coefficient of thermal expansion during heating in the manufacturing process.
1,81 and resins 79,89 may be cracked.
For this reason, since the solders 78 and 88 are cracked or peeled off, there is a problem that conduction between the electronic components 73 and 83 and the wiring layers inside the wiring boards 70 and 80 becomes unstable or breaks. The present invention solves the above-described problems in the conventional technology. In a wiring board in which electronic components are embedded in a wiring board body via a resin, the resin or the wiring board body is not broken or broken, It is an object of the present invention to provide a wiring board capable of reliably and stably providing conduction between a component and an internal wiring layer or the like.

[0005]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention has been made by paying attention to the relationship between the thermal expansion coefficients of a wiring board main body, a resin, and built-in electronic components. It is. That is, the first wiring board of the present invention
(Claim 1) is a wiring board main body having a front surface and a back surface, an insulating layer laminated on the front surface and the back surface of the wiring substrate body via a wiring layer, and the wiring board body and the front and back surfaces thereof. A through-hole penetrating through the laminated insulating layer,
Or a concave portion opened on the surface side of the insulating layer, and an electronic component incorporated in the through hole or the concave portion and fixed via a resin, and the wiring board body, the resin,
And the thermal expansion coefficients α1, α2, α3 of the electronic components (that is, the thermal expansion coefficient α1, the thermal expansion coefficient α2 of the resin, and the thermal expansion coefficient α3 of the electronic component of the wiring board body) are in the relationship of Expression 3. It is characterized by.

[0006]

[Equation 3] α3 <α1 ≦ α2

[0007] According to this, the thermal expansion coefficient of the wiring board body is higher than that of the electronic component, and is equal to or smaller than that of the resin in which the electronic component is embedded. For this reason, when solidifying the melted resin or heating at a separate position, even if the electronic component expands, the wiring board body and the resin further expand more greatly.
The size of the through hole or the concave portion in the wiring board main body or the resin itself surrounding the electronic component becomes large. Therefore,
Since the situation in which the resin or the wiring board body is broken or damaged can be prevented, the conduction between the electronic component and the internal wiring layer can be stably and reliably obtained. In this specification, the coefficient of thermal expansion refers to the vertical and horizontal (X-Y) directions of the object.
(The direction perpendicular to the thickness direction of the wiring board).

A second wiring board according to the present invention (claim 2)
Are a wiring board main body having a front surface and a back surface, an insulating layer laminated on the front surface and the back surface of the wiring substrate body via a wiring layer, and an insulating layer laminated on the wiring substrate body and the front and rear surfaces thereof. A through-hole, or a recess opening on the surface side of the insulating layer, and an electronic component incorporated in the through-hole or the recess and fixed via a resin,
A semiconductor element mounted above the surface of the wiring board body and electrically connected to the electronic component; and thermal expansion coefficients α1, α2, α3, α4 of the wiring board body, resin, electronic component, and semiconductor element. (That is, the coefficient of thermal expansion α1 of the wiring board body, the coefficient of thermal expansion α2 of the resin, the coefficient of thermal expansion α of the electronic component
3, the thermal expansion coefficient α4 of the semiconductor element) is in the relationship of Expression 4.

[0009]

[Equation 4] α4 ≦ α3 <α1 ≦ α2

[0010] According to this, in addition to the relationship of the above equation 3,
Since the coefficient of thermal expansion of the semiconductor element is equal to or less than the coefficient of thermal expansion of the built-in electronic components, for example, when the semiconductor element is mounted on the first main surface of the wiring board by soldering, Even if the element thermally expands, it becomes equal to or less than the electronic component, and does not affect the wiring board body or the resin in which the electronic component is embedded. Therefore, the semiconductor element mounted on the first main surface or the like and the electronic component can be reliably and stably conducted directly or via an internal wiring layer, and the wiring board can be efficiently manufactured. Become.

It is to be noted that a wiring board body having a front surface and a back surface, an insulating layer laminated on the front surface and the back surface of the wiring board body via a wiring layer, A through-hole penetrating through the laminated insulating layer, or a concave portion opened on the surface side of the insulating layer, and an electronic component incorporated in the through-hole or concave portion and fixed via a resin, It is also possible to include a wiring board in which the thermal expansion coefficient α2 of the resin and the thermal expansion coefficient α5 of the insulating layer have a relationship represented by Expression 5.

[0012]

[Equation 5] α2 ≦ α5

In the case of Equation 5, the thermal expansion coefficient α5 of the insulating layer
Has a relationship equal to or higher than the coefficient of thermal expansion α2 of the resin. Therefore, even if the resin expands when the resin is solidified or heated at a separate position, the insulating layer expands more than the resin, so that the expansion of the resin itself can be absorbed. Accordingly, it is possible to prevent the resin or the wiring board body from being broken or damaged, so that it is possible to stably and reliably establish conduction between the electronic component and the internal wiring layer.

In other words, the wiring board of the present invention comprises a wiring board body having a front surface and a back surface, an insulating layer laminated on the front surface and the back surface of the wiring board body via a wiring layer, And a through hole penetrating through the insulating layer laminated on the front and back surfaces thereof, or a concave portion opening on the front surface side of the insulating layer, and an electron incorporated in the through hole or concave portion and fixed via resin. And a thermal expansion coefficient α1 of the wiring substrate body, resin, electronic component, semiconductor element, and insulating layer. , Α2, α3, α4, α5 (that is, the coefficient of thermal expansion α1 of the wiring board body, the coefficient of thermal expansion α2 of the resin, the coefficient of thermal expansion α3 of the electronic component, the coefficient of thermal expansion α4 of the semiconductor element, the coefficient of thermal expansion α5 of the insulating layer) Is the relationship of Equation 6 , Can also be.

[0015]

[Equation 6] α4 ≦ α3 <α1α2 ≦ α5

Further, any of the above is a wiring board,
The present invention also includes a wiring board in which the coefficient of thermal expansion α2 of the resin is smaller than 40 ppm / ° C. According to this, it is possible to prevent the resin or the wiring board main body from being cracked or damaged, and to more reliably prevent the expansion of the semiconductor element from affecting the wiring board main body. The coefficient of thermal expansion α2 is 35 ppm / ° C. or less (preferably 30 ppm /
° C or lower, more preferably 25 ppm / ° C or lower, further preferably 20 ppm / ° C or lower, provided that the lower limit is 10 ppm / ° C.
C. or more).

Incidentally, any of the above-mentioned wiring board bodies includes a multi-layer board such as an insulating board having internal wiring and a board in which a plurality of insulating plates and wiring are laminated. Further, these wiring board bodies may be wiring board bodies containing glass cloth or glass filler. In addition, the through holes are formed by laser processing or drilling of the wiring board body and the insulating layer. On the other hand, the recess is formed by forming the wiring board body, the insulating layer, and the wiring layer by router processing using an end mill, or by laminating an insulating layer that has been previously processed by router or laser processing with another insulating layer or wiring layer. it can. Further, the electronic components include passive components such as capacitors, inductors, resistors, and filters, active components such as low-noise amplifiers (LNA), transistors, semiconductor elements, and FETs, SAW filters, LC filters, antenna switch modules, and couplers. , Diplexers and the like, and those obtained by making them into chips are included, but not limited to these. Further, among them, different kinds of electronic components may be incorporated in the same through-hole or recess. In addition, electronic components
A mode in which an electrode is provided only on one of the front and rear sides of the wiring board body is also included.

[0018]

Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a cross section of a main part of a wiring board 1 according to one embodiment of the present invention. Wiring board 1
As shown in FIG. 1, a wiring board main body 2 and its surface 2
a, insulating layers 4 and 5 stacked under the rear surface 2b, wiring layers 6 and 7 located therebetween, and wiring layers 16 and 22 formed on the front surface 4a and under the rear surface 5a of the insulating layers 4 and 5, respectively. ,
17 and 23 and resin insulating layers 18, 24, 19 and 25. The wiring substrate body (in the present embodiment, a so-called core substrate is used) 2 is an insulating substrate made of an epoxy resin containing glass cloth, which is approximately square in plan view and has a thickness of about 0.6 mm. In addition, on the front surface 2a or the back surface 2
b, the thickness of the insulating layers 4 and 5 is, for example, 35 μm.
And an epoxy resin containing an inorganic filler such as silica filler, between which copper wiring layers 6 and 7 having a thickness of 18 μm are located.

Further, by drilling or laser processing a predetermined position (central portion) in the wiring board main body 2, the insulating layers 4, 5 and the like, as shown in FIG. Are formed. Incidentally, the surface roughness of the side wall of the through hole 8 is defined as a center line average roughness Ra of 0.1.
It is desirable that the average roughness Rz be in the range of 5.0 to 30.0 μm in the range of 5 to 5.0 μm. Therefore, after drilling or the like, the side wall of the through hole 8 is subjected to a chemical roughening treatment with potassium permanganate or chromic acid as needed. Thereby, the adhesion between the wiring board body 2 and the insulating layers 4 and 5 and the resin 9 described later can be improved. Further, an organic compound (coupling agent: an organic compound composed of any of titanium, aluminum, and silane, or an organic compound of these compounds) may be further applied to the side wall of the through hole 8 and the surface of the electronic component 10 described below. (Mixture of compounds).

A plurality of chip capacitors (electronic components) 10 are built in the through holes 8 via an epoxy (embedded) resin 9 containing an inorganic filler such as silica filler. The volumetric thermal expansion coefficient of the resin 9 is 40 ppm /
° C or lower, preferably 35 ppm / ° C or lower, and the lower limit thereof is 10 ppm / ° C or higher. In this embodiment, a resin of 32 ppm / ° C. is used. This allows
Chip capacitor (electronic component) 1 built in wiring board 1
It is possible to reduce stress concentration caused by a difference in the coefficient of thermal expansion between the IC chip (semiconductor element) mounted on the surface of the wiring board 1 and the IC chip, thereby helping to prevent the occurrence of cracks.
The inorganic filler is not particularly limited, but crystalline silica, fused silica, alumina, silicon nitride, or the like is used. Further, the chip capacitor 10 has a plurality of electrodes 11 and 12 symmetrically protruding from the upper and lower ends on both side surfaces thereof and located on the front surface 9c or the back surface 9b of the resin 9. The chip capacitor 10 is a ceramic capacitor in which, for example, a dielectric layer containing barium titanate as a main component and a Ni layer serving as an internal electrode are alternately laminated,
It has a size of 3.2 mm x 1.6 mm x 0.7 mm.

As shown in FIG. 1, around the through hole 8,
A plurality of through holes 13 penetrating between the front and back surfaces 4a and 5a of the insulating layers 4 and 5 including the wiring board main body 2 are formed in a required space, and a through-hole conductor 14 made of copper plating and a silica Filling resin containing filler 15
Are formed respectively. Each through-hole conductor 14
Is connected to the wiring layer 6 or the wiring layer 7 in the middle.
However, in the round holes 6a and 7a of the wiring layers 6 and 7, the through-hole conductor 14 is not connected to the wiring layers 6 and 7.
Instead of the filling resin 15, a conductive resin containing a large amount of metal powder or a non-conductive resin containing metal powder may be used. As shown in FIG. 1, a wiring layer 16 made of copper plating is provided on the surface 4a of the insulating layer 4 and the surface 9c of the resin 9.
Then, a resin insulating layer 18 made of an epoxy resin containing silica filler is formed. The wiring layer 16 is connected to the electrode 11 of the chip capacitor 10 and the upper end of the through-hole conductor 14. In addition, as shown in FIG.
A plurality of filled via conductors 20 are formed at predetermined positions in the inside, and a wiring layer 22 is formed on upper ends of these via conductors 20 and the insulating layer 18.

On the wiring layer 22, a solder resist layer
(Resin insulating layer) 24 and a plurality of solder bumps (IC connection terminals (S
n-Ag, Pb-Sn, Sn-Sb, Sn-Zn, Sn
-Ag-Cu type)) 28 are formed. The wiring layers 16 and 22 and the resin insulating layers 18 and 24 form the build-up layer BU1. Also, the solder bump 28
Are individually connected to connection terminals (not shown) protruding from the bottom surface of an IC chip (semiconductor element) 29 mounted on the first main surface 26. Around the connection terminals (not shown) of the IC chip 29 and the solder bumps 28, an underfill material (not shown) between the IC chip 29 and the first main surface 26 is filled so as to bury them.

As shown in FIG. 1, a wiring layer 17 made of copper plating and a resin insulating layer 19 made of epoxy resin containing silica filler are also formed below the back surface 5a of the insulating layer 5 and the back surface 9b of the resin 9. You. The wiring layer 17 is connected to the electrode 12 of the chip capacitor 10 and the lower end of the through-hole conductor 14. Further, a plurality of filled via conductors 21 are formed at predetermined positions of the resin insulating layer 19, and a wiring layer 23 is formed below the lower end of the via conductor 21 and under the insulating layer 19. Under the wiring layer 23, a solder resist layer (resin insulating layer) 25 is formed, and the wiring 27 in the wiring layer 23 exposed in the opening 25b opening to the second main surface 25a side has Ni And Au plating is coated,
It becomes a connection terminal to a motherboard such as a printed board (not shown) on which the wiring board 1 itself is mounted. In addition, a pin (Kovar, Fe-42 wt%) is connected to the wiring 27 of the connection terminal.
Ni alloy, copper, etc.) may be soldered.

The wiring layers 17, 23 and the resin insulating layers 19, 25 form a build-up layer BU2. still,
Upper and lower wiring layers 1 sandwiching wiring board body 2 and insulating layers 4 and 5
6 and 17 are conductive through the through-hole conductor 14 and are also conductive through the electrodes 11 and 12 of each chip capacitor 10. The coefficients of thermal expansion α1, α2, α3 of the wiring board main body 2, the resin 9, and the chip capacitor 10 as an electronic component in the wiring board 1 as described above are set in advance so as to satisfy the relationship of Expression 7. (That is, the coefficient of thermal expansion of the wiring board body 2 is α1, the coefficient of thermal expansion of the resin 9 is α2,
Thermal expansion coefficient of electronic component 10: α3).

[0025]

Equation 3 α3 <α1 ≦ α2

In the present embodiment, α1: 15 ppm / ° C.,
α2: 32 ppm / ° C., α3: 10 ppm / ° C.
Thereby, heating during the curing process of the resin 9 and the first main surface 2
When the bumps 28 are heated when the IC chip 29 is mounted on the wiring board 6, the wiring board body 2 and the resin 9 expand further even if the capacitors 10 expand, and the wiring board body 2
Resin 9 surrounding through hole 8 and each capacitor 10 inside
It grows larger. Therefore, the resin 9 and the wiring board main body 2 can be prevented from being broken or damaged, so that the conduction between each capacitor 10 and the internal wiring layers 22 and 23 can be reliably obtained in a stable state. Further, when the coefficient of thermal expansion α4 of the IC chip (semiconductor element) 29 is further added to Expression 7, the relationship of Expression 8 is obtained.

[0027]

[Equation 8] α4 ≦ α3 <α1 ≦ α2

In the present embodiment, α4: 4 ppm / ° C. Therefore, for example, the IC chip 29 is placed on the first main surface 26.
Even when the IC chip 29 thermally expands when the bumps 28 are heated when mounting the chip, the thermal expansion coefficient α4 of the chip 29 is equal to or less than the thermal expansion coefficient α3 of each chip capacitor (electronic component) 10. . For this reason, it does not affect the wiring board main body 2 or the resin 9 containing the capacitor 10. Therefore, IC
The chip 29 and each capacitor 10 can be reliably and stably conducted through the wiring layer 22 or the like. The insulating layers 18 and 1
For 9 and the like, a resin having a coefficient of thermal expansion α5 of 60 ppm / ° C. was used.

In the insulating layers 4 and 5, via conductors for connecting the wiring layers 6 and 16 or connecting the wiring layers 7 and 17 may be formed. In the present embodiment, the via conductor is not limited to the filled via conductor 20 or the like, but may be a conformal via conductor that is not completely filled with the conductor. According to the wiring board 1, as shown in FIG. 1, the through-hole conductor 14 penetrates the wiring board body 2, the insulating layers 4, 5, and the like. For this reason, the via conductors 20 and 21 can be formed immediately above (upper / lower in FIG. 1), and a filled via conductor is formed in the portion of the through-hole conductor 14 (the penetrating portion of the insulating layers 4 and 5). This eliminates the need for a stacked via (stacked via) structure. Accordingly, it is not necessary to form the filled via conductor in the insulating layers 4 and 5, and the cost of forming the via conductor can be reduced. Furthermore, the conduction path between the electrode 11 of the chip capacitor 10 and the IC chip 29 is relatively short, and it is also possible to stabilize electrical characteristics such as reducing the loop inductance of such a path.

Referring to FIG. 2 to FIG.
The main manufacturing steps will be described. As shown in FIG.
A wiring board main body (core board) 2 made of glass cloth-epoxy resin and having a thickness of 0.55 mm and having copper foils 3a and 3b having a thickness of 18 μm on the front and back surfaces 2a and 2b is prepared. In the present embodiment, a single-layer insulating substrate 2 is used for the wiring substrate body. However, the present invention is not limited to this. For example, an insulating substrate having internal wiring, an insulating substrate in which a plurality of insulating substrates and wiring are stacked, or the like may be used. A multilayer substrate may be used. Next, after forming an etching resist (not shown) having a predetermined pattern on the copper foils 3a and 3b, etching is performed (known subtractive method).
Is applied. As a result, as shown in FIG. 2B, wiring layers 6 and 7 having a predetermined pattern are formed on the front and back surfaces 2a and 2b of the wiring board main body 2. Note that the wiring layers 6 and 7 have round holes 6a,
7a. Next, the front and back surfaces 2 of the wiring board body 2
After roughening the wiring layers a and 2b and the wiring layers 6 and 7, an epoxy resin film having a thickness of 60 μm and containing silica filler is bonded thereon by thermocompression bonding. As a result, as shown in FIG. 2 (B), the front and back surfaces 2a,
The insulating layers 4 and 5 are formed on 2b.

Further, as shown in FIG. 2B, a predetermined position is irradiated with a laser Ls (CO ₂ laser in this embodiment) from the surface 4a side of the insulating layer 4. As a result, as shown in FIG. 2C, a plurality of through holes 13 having a diameter of 350 μm were formed.
Are formed to penetrate between the front and back surfaces 4a and 5a of the insulating layers 4 and 5 including the wiring board body 2 and the like. The through hole 13 penetrates through the central portions of the round holes 6a and 7a in the wiring layers 6 and 7. Next, electroless copper plating and electrolytic copper plating are applied to the inner wall of each through hole 13 and the front and back surfaces 4a and 5a of the insulating layers 4 and 5. The plating is applied to a plurality of product units (wiring board 1) in the multi-cavity panel including the wiring board body 2 and the like. As a result, as shown in FIG. 2D, a through-hole conductor 14 having a thickness of 18 μm is formed along the inner wall of each through-hole 13 and copper plating is applied to the front and back surfaces 4a and 5a of the insulating layers 4 and 5. The layers 4b and 5b are formed. At this time, the through-hole conductor 14 and the wiring layers 6 and 7 are connected except for the round holes 6a and 7a. Further, as shown in FIG. 2 (D), a hollow resin inside the through-hole conductor 14 is filled with a filling resin 15.

Further, as shown in FIG. 3A, the central portions of the wiring board main body 2 and the insulating layers 4 and 5 are drilled to form a through hole 8 having a square shape in plan view and a length of 8 mm × width 8 mm. Set up. At this time, a chamfer or a round surface may be formed at the corner between the side walls of the through hole 8 at the same time. By subjecting the side wall of the through hole 8 to a chemical roughening treatment as necessary, the surface roughness is 0.5 to 0.5 mm in center line average roughness Ra.
In a range of 5.0 μm and a ten-point average roughness Rz of 5.0 to 5.0.
You may make it fall in the range of 30.0 micrometers. Further, the side wall of the through hole 8 and a chip capacitor described below.
An organic compound (coupling agent) may be applied to the surface of the (electronic component) 10. Next, as shown in FIG. 3A, the wiring board main body 2 and the like are
5, the wiring board body 2 and the insulating layers 4, 5 are placed on the surface 4 a side of the through hole 8 with the front and back surfaces 4 a, 5 a upside down.
Product units in multi-cavity panels, including
The tape T is attached across the (wiring board 1). The adhesive surface of the tape T faces the through hole 8 side.

Next, as shown in FIG. 3B, a plurality of chip capacitors (electronic components) 10 are inserted into the through holes 8 using a chip mounter (not shown), and the electrodes 11 of each chip capacitor 10 are taped. Adhere to a predetermined position on the adhesive surface of T. As shown, the end faces of the electrodes 11 and 12 in each chip capacitor 10 are
5 are located near the front and back surfaces 4a and 5a. In this state, as shown in FIG. 3 (C), the epoxy resin as a main component was melted into the through hole 8 from the back surface 5 a side of the insulating layer 5.
(Embedding) After filling the resin 9, defoaming treatment and about 100 ° C
Is applied and a curing treatment is carried out for about 60 minutes. Next, the raised back surface 9a of the resin 9 is flattened by, for example, buffing.

As a result, as shown in FIG. 4A, the flat back surface 9b where the electrode 12 of each chip capacitor 10 is exposed is formed.
Is formed. As shown in the figure, when the tape T is peeled off, the electrodes 11 of each chip capacitor 10 are exposed on the surface 9c of the resin 9. If the surface 9c is also leveled in the same manner as described above, each electrode 11 can be reliably exposed. Furthermore,
As shown in FIG. 4B, the copper plating layers 4b and 5b and the resin 9
Copper plating layers 16a, 1b across the front and back surfaces 9c, 9b.
7a is formed. In FIG. 4B, the wiring board main body 2 is again rotated by 180 ° and the front and back surfaces 4a and 5a are reversed. Next, on the copper plating layers 16a and 17a,
After forming an etching resist (not shown) having a predetermined pattern, etching is performed.

As a result, as shown in FIG. 4C, wiring layers 16 and 17 having a predetermined pattern are formed on the front and back surfaces 4a and 5a of the insulating layers 4 and 5. The wiring layers 16 and 17 are connected to the electrodes 11 and 12 of the chip capacitor 10 and also connected to the upper and lower ends of the through-hole conductor 14. At the same time, the filling resin 15 inside the through-hole conductor 14 is plated with a lid, and the front and back surfaces 9c and 9b of the resin 9 are exposed. FIG.
3C, the wiring layers 16 and 17 correspond to the copper plating layers 4b and 5b.
b includes the remaining portion.

Thereafter, resin insulating layers 18 and 19 are formed by applying an epoxy resin film on / under the wiring layers 16 and 17 by thermocompression bonding.
The filled via conductors 20 and 21 are filled and formed at predetermined positions in 9 by a photolithography technique or the like. Further, the wiring layers 22 and 23 forming the build-up layers BU1 and BU2 and the resin insulating layers 24 and 25 are
It is formed by a known build-up process (a semi-additive method, a full-additive method, a subtractive method, formation of an insulating layer by laminating a film-like resin material, a photolithography technique, and the like). Thus, the wiring board 1 shown in FIG. 1 can be obtained.

FIG. 5 shows a cross section of a main part of a wiring board 30 of a different form. As shown in FIG. 5, the wiring board 30 includes a wiring board main body 32, insulating layers 34 and 35 laminated on the front surface 32a and the rear surface 32b thereof, and wiring layers 36 and 37 located therebetween. Wiring layers 46 and 5 formed on the front and back surfaces 34a and 35a of the layers 34 and 35, respectively.
2, 47, 53, and resin insulation layers 48, 54, 49,
55. The wiring board main body 32 has three sides on a plan view.
It is an insulating plate (core substrate) made of epoxy resin containing glass cloth and having a square of 0 mm and a thickness of about 0.45 mm. Insulating layers 3 stacked on and under the wiring board body 32
Reference numerals 4 and 35 each have a thickness of 35 μm and are made of an epoxy-based resin containing an inorganic filler such as silica filler. Between them, copper wiring layers 36 and 37 having a thickness of 18 μm are located.

Further, as shown in FIG.
2 and near the center of the insulating layers 34 and 35, the insulating layer 34
A concave portion 38 is formed on the surface 34a side.
The recess 38 is square in plan view and has a size of 8 mm on a side. After the insulating layer 34 and the wiring board main body 32 are drilled, the insulating layer 35 is crimped or an end mill is used from the surface 34a side of the insulating layer 34. It is formed by performing router processing with the total thickness of the insulating layer 34 and the wiring board main body 32. Incidentally, the side wall and the bottom surface of the concave portion 38 may have the same surface roughness as the through hole 8 or may be coated with the organic compound, and the corner thereof may be chamfered or rounded.

A plurality of chip capacitors 40 are built in the recess 38 via a (buried) resin 39. The chip capacitor 40 has a plurality of electrodes 41 and 42 symmetrically protruding from the upper and lower ends on both side surfaces thereof and located on the surface 34 a of the insulating layer 34 or the bottom surface 38 a of the recess 38. Also, as shown in FIG.
A plurality of wiring layers 62 connected to the upper end of the through-hole conductor 60 penetrating the insulating layer 35 are formed, and are individually connected to the respective electrodes 42 of the capacitor 40. The through-hole conductors 60 are individually connected at their lower ends to the wiring layers 47 formed on the back surface 35a of the insulating layer 35. Note that a filling resin 64 is formed inside each through-hole conductor 60.

Further, as shown in FIG. 5, around the concave portion 38, a plurality of insulating layers 34 and 35 including the wiring board main body 32 penetrate between the front and back surfaces 34a and 35a of the insulating layers 34 and 35 in the same manner as in the above embodiment. A through-hole 43 is drilled, and a through-hole conductor 44 made of copper plating and a filling resin 45 containing silica filler are formed therein. Each through-hole conductor 44 is connected to the wiring layer 36 or the wiring layer 37 in the middle. However, the round holes 36 of the wiring layers 36 and 37
a, 37a, the through-hole conductor 44 is connected to the wiring layer 3
6 and 37 are not connected. As shown in FIG. 5, above the surface 34a of the insulating layer 34, the wiring layers 46 and 52, the resin insulating layers 48 and 54, the filled via conductors 50, and the solder bumps (IC connection terminals) are formed in the same manner as in the above embodiment.
58 are formed, and the IC chip 29 is formed on the first main surface 56.
Can be implemented. The wiring layers 46 and 52 and the resin insulating layers 48 and 54 form a build-up layer BU3.

Further, as shown in FIG. 5, below the back surface 35a of the insulating layer 35, the wiring layers 47,
53, resin insulation layers 49 and 55, filled via conductor 51,
In addition, a wiring 59 for a connection terminal is formed, which extends from the wiring layer 53 and is exposed in an opening 57 that opens to the second main surface 55a side. Wiring layers 47 and 53 and resin insulating layer 4
9, 55 form the build-up layer BU4. The wiring board body 3 in the wiring board 30 as described above
2, the thermal expansion coefficients α1, α2, α3 of the resin 39 and the chip capacitor 40, which is an electronic component, are also set in advance so as to satisfy the relationship of Expression 9.

[0042]

## EQU9 ## α3 <α1 ≦ α2

In this embodiment, α1: 16 ppm / ° C.,
α2: 23 ppm / ° C., α3: 8 ppm / ° C. As a result, heating during the curing process of the resin 39 and the first main surface 56
When the bumps 58 are heated when the IC chip 29 is mounted thereon, even if each capacitor 40 expands, the wiring board main body 32 and the resin 39 expand more greatly, and the concave portion 38 in the wiring board main body 32 and each capacitor The resin 39 surrounding the resin 40 itself becomes large. Accordingly, it is possible to prevent the wiring board main body 32 and the resin 39 from being cracked or damaged, so that the conduction between each capacitor 40 and the internal wiring layers 52 and 53 can be stably and reliably obtained. Further, when the thermal expansion coefficient α4 of the IC chip (semiconductor element) 29 is further added to Expression 9, the relationship of Expression 10 is obtained.

[0044]

## EQU10 ## α4 ≦ α3 <α1 ≦ α2

In the present embodiment, α4: 4 ppm / ° C. Therefore, for example, the IC chip 29 is placed on the first main surface 56.
When the bumps 58 are heated when the IC chip 29 is mounted, the thermal expansion coefficient α4 of the chip 29 becomes equal to or less than the thermal expansion coefficient α3 of each capacitor (electronic component) 40 even if the IC chip 29 thermally expands. . For this reason, the wiring board body 32 and the capacitor 4
It does not affect the resin 39 containing 0. Accordingly, each capacitor 40 and the IC chip 29 can be reliably and stably conducted through the wiring layer 52 and the like. In the wiring board 30, a chip capacitor 40 having only the upper electrode 41 may be used. In such a form, the through-hole conductor 60 and the filling resin 64 penetrating between the bottom surface 38a of the concave portion 38 and the back surface 35a of the insulating layer 35 can be omitted. For the insulating layers 48 and 49, a resin having a coefficient of thermal expansion α5 of 60 ppm / ° C. was used.

The present invention is not limited to the embodiments described above. For example, in the electronic component,
Passive components such as inductors, resistors, and filters, active components such as low-noise amplifiers (LNA), memories, or transistors, or chips of these,
Further, of these, different types may be incorporated in the same through hole or recess. Further, only one electronic component may be built in the through hole or the concave portion. in this case,
The electrodes of the electronic component can be connected to the wiring layer and the lands connected thereto by soldering. Further, a plurality of through holes or recesses may be formed in the wiring board main body, the insulating layer, or the like, or the through holes and the recesses may be provided adjacent to each other. Also, the wiring board body
(Core substrate) The material of 2, 32 is a glass woven cloth having the same heat resistance, mechanical strength, flexibility, workability, etc., and glass woven cloth other than the glass-epoxy resin composite material. A glass fiber-resin-based material that is a composite material of a fiber and a resin such as an epoxy resin, a polyimide resin, or a BT resin may be used. Alternatively, a composite material of an organic fiber such as a polyimide fiber and a resin, PTFE having continuous pores
It is also possible to use a resin-resin composite material in which a resin such as an epoxy resin is impregnated into a fluorine resin having a three-dimensional network structure.

Further, the material of the insulating layers 4 and 5 and the resin insulating layers 18 and 19 may be a polyimide resin having the same heat resistance and pattern moldability in addition to the epoxy resin as a main component. A BT resin, a PPE resin, or a resin-resin composite material in which a resin such as an epoxy resin is impregnated with a fluorine-based resin having a three-dimensional network structure such as PTFE having continuous pores can also be used. The material of the wiring layers 16 and 17 may be metal plating such as Ni or Ni-Au other than the copper plating, or a conductive resin may be applied without using such metal plating. It is also possible to form by the method of. Further, as the connection terminals to the IC chip 29, in addition to the solder bumps 28 and the like, flip chip pads, wire bonding pads, or those formed with TAB connection pads may be used.

The capacitors 10 and 4 of the electronic parts
0, a high dielectric ceramic containing BaTiO ₃ as a main component was used, but PbTiO ₃ , PbZrO ₃ , Ti
O ₂ , SrTiO ₃ , CaTiO ₃ , MgTiO ₃ , K
NbO ₃ , NaTiO ₃ , KTaO ₃ , PbTaO ₃ ,
(Na _1/2 Bi _1/2 ) TiO ₃ , Pb (Mg _{1 /} 2W
_{1/2) O 3,} it may be used as the main component such as _{(K 1/2 Bi 1/2) TiO 3} . Further, the electronic component 1
The materials of the 0, 40 electrodes 11, 12, etc. are mainly composed of Cu, but P which has compatibility with the electronic components 10, 40.
t, Ag, Ag-Pt, Ag-Pd, Cu, Au, Ni
Etc. can be used. In addition, the capacitor 10 of the electronic component includes a dielectric layer mainly composed of a high dielectric ceramic, an electrode layer made of Ag-Pd, and a via conductor or a wiring layer made of resin, Cu plating, Ni plating, or the like. May be combined as a capacitor. The wiring board of the present invention has wiring layers 16, 17 on the front surfaces 4a, 34a and the back surfaces 5a, 35a of the insulating layers 4, 5, 34, 35.
A form having only the above is also included.

[0049]

The wiring board of the present invention described above.
According to the first aspect, the thermal expansion coefficient of the wiring board main body is higher than that of the electronic component, and is equal to or smaller than that of the resin in which the electronic component is embedded. For this reason, in order to solidify the melted resin or when heating at a separate position, even if the electronic component expands, the wiring board main body and the resin further expand, so that a through hole or a concave portion in the wiring board main body, Alternatively, the resin itself surrounding the electronic component becomes large. Therefore, it is possible to prevent the resin or the wiring board body from being broken or damaged,
Conduction between the electronic component and the internal wiring layer can be stably and reliably achieved.

According to the second aspect of the present invention, in addition to the above, since the coefficient of thermal expansion of the semiconductor element is equal to or less than the coefficient of thermal expansion of the electronic component, for example, on the first main surface. At the time of soldering when mounting semiconductor elements on etc.
Even if the semiconductor element expands thermally, its coefficient of thermal expansion is equal to or less than that of the electronic component, and thus does not affect the wiring board body or the resin in which the electronic component is embedded. Accordingly, the mounted semiconductor element and the electronic component can be reliably and stably conducted directly or via the internal wiring layer, and the wiring substrate can be manufactured efficiently. Further, according to the wiring board of the third aspect, it is possible to prevent the resin or the wiring board main body from being cracked or damaged, and to more reliably prevent the expansion of the semiconductor element from affecting the wiring board main body. Becomes

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a main part of a wiring board according to one embodiment of the present invention.

FIGS. 2A to 2D are schematic diagrams showing main steps in a method of manufacturing the wiring board of FIG. 1;

3 (A) to 3 (C) are schematic views showing main steps of the manufacturing method following FIG. 2 (D).

4 (A) to 4 (C) are schematic views showing main steps of the manufacturing method following FIG. 3 (C).

FIG. 5 is a sectional view showing a main part of a wiring board according to another embodiment of the present invention.

6A and 6B are schematic diagrams showing a conventional wiring board.

[Explanation of symbols]

1, 30 Wiring board 2, 32 Wiring board body 2a, 32a Front surface 2b, 32b Back surface 4, 5, 34, 35 ... Insulating layer 6,7,36,37 ... Wiring layer 8 ... Through hole 9,39 ... Resin 10,40 ... Chip capacitor (Electronic components) 26, 56… First main surface (above the surface of the wiring board main body) 29… IC chip (semiconductor element) 34a ……………… Insulating layer surface 38 recess

Continued on the front page (72) Inventor Yuki Ogawa 14-18 Takatsuji-cho, Mizuho-ku, Nagoya-shi, Aichi F-term in Japan Special Ceramics Co., Ltd. 5E346 AA25 AA26 CC04 CC09 CC32 FF03 FF45 GG15 HH07 HH11

Claims (3)

[Claims] A wiring board main body having a front surface and a back surface; an insulating layer laminated on the front surface and the back surface of the wiring substrate body via a wiring layer; A through hole penetrating through the insulating layer, or a recess opening on the surface side of the insulating layer; and an electronic component incorporated in the through hole or the recess and fixed via a resin, and Thermal expansion coefficients α1, α2, α3 of substrate body, resin, and electronic components
Has the relationship of Formula 1. Equation 1 α3 <α1 ≦ α2 2. A wiring board body having a front surface and a back surface, an insulating layer laminated on the front surface and the back surface of the wiring substrate body via a wiring layer, and a wiring substrate body and the insulating layer laminated on the front surface and the back surface thereof. A through hole that penetrates through the insulating layer, or a concave portion that opens on the surface side of the insulating layer; an electronic component that is embedded in the through hole or the concave portion and that is fixed via a resin; And a thermal expansion coefficient α1, α2, α3, α4 of the wiring board main body, the resin, the electronic component, and the semiconductor element. A wiring board, characterized in that: ## EQU2 ## α4 ≦ α3 <α1 ≦ α2 3. The resin has a coefficient of thermal expansion α2 of 40 ppm /
The wiring board according to claim 1, wherein the wiring board is lower than ℃.