JP2004146742A - Manufacturing method for wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily manufacture a wiring board wherein a wiring pattern can be formed into a fine one highly precisely, and the wiring pattern is electrically connected without fail between layers of the pattern. <P>SOLUTION: The manufacturing method comprises: a process for forming a through-hole 26 in the wiring board by applying a laser processing from a side of the board where a seed layer 24 on the board is provided by making use of the board including a bonding layer 22 provided on one surface of a core insulating layer 20 and the seed layer 24 provided on the other surface of the core insulating layer 20; a process for sticking a metal foil 28 onto the surface of the board on which the bonding layer 22 is formed to form an opening hole 26a for closing one opening part of the through-hole 26, and a process for forming a via in the opening hole 26a and forming the wiring pattern connected electrically through the via on both surfaces of the board. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a wiring board, and more particularly, to a wiring board that can reliably and electrically connect wiring patterns formed on both surfaces of a substrate and that can form a fine wiring pattern with high accuracy. And a method for producing the same.
[0002]
[Prior art]
On a wiring board on which electronic components such as semiconductor elements are mounted, wiring patterns are formed on both sides of an insulating layer such as a resin substrate serving as a main body of the board, and the wiring patterns on both sides of the insulating layer are electrically connected via vias. There is a two-layered wiring board. FIGS. 5 and 6 show a conventional method of manufacturing a wiring board in which wiring patterns are formed on both surfaces of the insulating layer 10, and show a step of forming vias in the wiring board. 5 uses a double-sided copper-clad substrate in which copper foil 12 is adhered to both surfaces of an insulating layer 10 (FIG. 5A), and a through hole 14 is formed in the substrate by laser processing (FIG. 5B). In this example, a via is formed by filling a through hole 14 with a plating metal 16 by electroless copper plating and electrolytic copper plating (FIG. 5C).
[0003]
6 uses a single-sided copper-clad substrate in which a copper foil 12 is adhered to one side of an insulating layer 10 (FIG. 6A). A via hole 18 from which the copper foil 12 is exposed is formed (FIG. 6 (b)), and electroless copper plating and electrolytic copper plating are applied, so that the via hole 18 is relatively thickly plated so as to be filled with the plating metal 16. (FIG. 6C) to form a via.
[0004]
[Problems to be solved by the invention]
By the way, recent wiring boards tend to have finer and higher-density wiring patterns as the density of semiconductor elements increases, and accordingly, vias have extremely large diameters of about 100 μm or less. It is getting smaller. For this reason, as shown in FIG. 5C, it is difficult to form the through-hole 14 in the substrate and fill the through-hole 14 by plating, and an unfilled portion 19 of the plated metal is formed inside the through-hole 14. As a result, the reliability of the electrical connection of the wiring patterns formed on both surfaces of the insulating layer 10 has become an issue.
[0005]
When a wiring board is formed using a single-sided copper-clad board as shown in FIG. 6, it is necessary to apply a relatively thick plating in order to fill the via hole 18 with the plating metal 16, and therefore, There is a problem that the thickness of the conductor layer forming the wiring pattern is increased by etching, and the formation of the wiring pattern in a fine pattern is restricted. In order to perform laser processing from one side of the substrate so that the copper foil 12 is exposed at the bottom of the via hole 18, it is necessary to use a copper foil 12 having a certain thickness. Also, when forming a wiring pattern by using this method, it is restricted to form the wiring pattern into a fine pattern.
[0006]
As described above, in the conventional method of forming a wiring board using a double-sided copper-clad board or a single-sided copper-clad board, the thickness of a conductor layer forming a wiring pattern is at least about 15 to 20 μm. Therefore, depending on the thickness of the conductor layer and the precision of forming the wiring pattern, the pattern width and the wiring interval of the wiring pattern must be about 30 μm or more, and it is difficult to form a finer wiring pattern than this.
In order to form a finer wiring pattern, it is possible to reduce the thickness of the conductive layer by polishing the conductive layer or the like and form a fine wiring pattern by etching. In addition, there is a problem that a process different from a normal manufacturing process such as a polishing process is required, and the manufacturing cost is increased.
[0007]
Therefore, the present invention has been made in order to solve these problems, and an object of the present invention is to ensure that electrical connection of wiring patterns between layers is ensured, and to achieve high density without complicating a manufacturing process. It is an object of the present invention to provide a method of manufacturing a wiring board that can manufacture a wiring board on which a wiring pattern is formed.
[0008]
[Means for Solving the Problems]
The present invention has the following configuration to achieve the above object.
That is, using a substrate having an adhesive layer provided on one surface of a core insulating layer and a seed layer provided on the other surface of the core insulating layer, laser processing is performed from the side of the substrate on which the seed layer is provided. Forming a through hole in the substrate by applying a metal foil to a surface of the substrate on which the adhesive layer is formed, and forming an opening hole in which one opening of the through hole is closed; Forming a via in the hole and forming a wiring pattern electrically connected through the via on both surfaces of the substrate. As a wiring pattern forming step, a semi-additive method, a subtractive method, or the like can be used. Further, when a via is formed by electrolytic plating, the opening may be filled with a plating metal to form a via, or the via may be formed without filling the opening.
[0009]
Further, as a step of forming the wiring pattern, a step of forming a plating seed layer on the inner surface of the opening hole, the surface of the seed layer and the surface of the metal foil, and coating both surfaces of the substrate with a photosensitive resin film, Exposing and developing the resin film to form a resist pattern exposing a portion where a wiring pattern is to be formed, and performing electrolytic plating using the plating seed layer as a plating power supply layer to expose portions of the substrate surface A step of forming a plating metal by swelling and, after removing the resist pattern, etching the plating metal, the seed layer, and the metal foil, and removing the seed layer and the metal foil except for a portion where the plating metal is applied. Etching to form a wiring pattern on both surfaces of the substrate by etching.
[0010]
Further, as a step of forming the wiring pattern, a step of performing electrolytic plating using the metal foil as a plating power supply layer, filling a plating metal in an opening hole, and covering both surfaces of the substrate with a photosensitive resin film, Exposing and developing the resin film to form a resist pattern covering a portion to be a wiring pattern, and using the resist pattern as a mask, etching the seed layer and metal foil to form a wiring pattern; An etching step of forming a wiring pattern on both surfaces of the substrate by removing the resist pattern.
[0011]
Further, after forming a wiring pattern on both sides of the wiring substrate, a wiring pattern is formed in multiple layers on the substrate by a build-up method or the like, whereby a multilayer wiring substrate having three or more layers can be obtained.
Further, it is preferable that the seed layer is formed of a copper layer, a copper foil is used as the metal foil, and electrolytic copper plating is performed as electrolytic plating.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
1 and 2 are explanatory views showing a manufacturing process for forming a wiring board by the method for manufacturing a wiring board according to the present invention.
In the method for manufacturing a wiring board according to the present invention, a wiring board is formed using a substrate in which an adhesive layer is provided on one surface of a core insulating layer and a seed layer is provided on the other surface of the core insulating layer. . The core insulating layer is made of an electrically insulating material (about 5 μm to 50 μm in thickness) such as a polyimide film, and the adhesive layer is an adhesive layer such as a thermoplastic resin having a thickness of about 2 μm to 20 μm. It is formed. The seed layer is formed as an extremely thin copper layer of about 0.1 to 2 μm by electroless copper plating, sputtering or ion plating.
[0013]
FIG. 1A shows a configuration of a substrate on which a wiring substrate is formed in the present embodiment. An adhesive layer 22 is formed on one surface of a core insulating layer 20 made of polyimide, and a seed layer 24 is provided on the other surface of the core insulating layer 20. The thickness of the core insulating layer 20 of the embodiment is about 30 μm, but the core insulating layer 20 may have an appropriate thickness according to a product.
FIG. 1B shows a state in which laser processing is performed on the substrate to form a through hole 26 in the substrate. In the laser processing, a through hole 26 is formed by irradiating a laser beam from the side of the substrate on which the seed layer 24 is formed. The hole diameter of the through hole 26 is approximately 20 μm to 30 μm. When the through hole 26 is formed by laser processing, the inner surface of the through hole 26 may be a tapered surface whose diameter is increased on the side where the seed layer 24 is formed.
[0014]
Since the seed layer 24 is formed thin, the through holes 26 can be easily formed in the substrate by laser processing. When the through hole 26 is formed by laser processing, the absence of the copper foil on the lower surface of the substrate has an advantage that the through hole 26 can be easily formed. As shown in FIG. 6, when the bottom surface of the via hole is closed with a copper foil, dirt accumulates in the via hole during laser processing, so it is necessary to perform a desmear process for removing dirt. In the present embodiment, since the through-hole 26 is formed by penetrating the substrate, no dirt adheres to the inner surface of the through-hole 26. Therefore, an operation of removing dirt adhering to the inner surface of the through-hole 26 by a desmear process or the like is performed. It becomes unnecessary.
[0015]
FIG. 1C shows a state in which a thin copper foil 28 as a metal foil is laminated on a surface of the core insulating layer 20 on which the adhesive layer 22 is provided, which is a characteristic process of the present embodiment. As shown in the figure, the copper foil 28 is laminated over the entire surface of the substrate on which the adhesive layer 22 is provided by thermocompression bonding using a roll. As a result, the through hole 26 becomes an opening hole 26 a having one opening (bottom surface) closed by the copper foil 28. The copper foil 28 to be adhered to the adhesive layer 22 has an appropriate thickness (about 1 μm to 20 μm) according to a method of forming a wiring pattern. In this embodiment, since the wiring pattern is formed by the semi-additive method, a thin copper foil 28 is used as much as possible.
When laminating the copper foil 28 on the adhesive layer 22, the surfaces of the adhesive layer 22 and the copper foil 28 are preliminarily subjected to plasma treatment or ultraviolet irradiation (172 to 254 nm) to activate these surfaces to improve the adhesive strength. Thus, lamination can be performed more reliably.
[0016]
FIG. 1D shows a state where a plating seed layer 30 is formed by applying electroless copper plating to a substrate in which a copper foil 28 is bonded to a core insulating layer 20. By electroless copper plating, a plating seed layer 30 is formed on the inner surface of the opening 26 a formed in the substrate, the surface of the seed layer 24, and the surface of the copper foil 28.
FIG. 1 (e) shows a resist pattern 32 in which both sides of the substrate are covered with a photosensitive resin film (photosensitive resist), exposed and developed to expose a portion serving as a wiring pattern formed on the substrate. Indicates the status.
[0017]
Next, FIG. 2A shows a state in which the substrate is subjected to electrolytic copper plating using the plating seed layer 30 as a plating power supply layer, and the copper plating 34 is raised at a portion where the plating seed layer 30 is exposed. The opening 26a is plated with copper plating 34 so as to fill the opening 26a.
FIG. 2B shows a state in which the resist pattern 32 has been removed after the electrolytic copper plating. As a result, the portion where the resist pattern 32 has been applied is exposed to the outside.
[0018]
FIG. 2 (c) shows a chemically etched copper (the state shown in FIG. 2 (b)) deposited on both surfaces of the substrate, and plating on the surface of the substrate other than the portion where the copper plating 34 is formed. This shows a state in which the seed layer 30, the seed layer 24, and the copper foil 28 are dissolved and removed, and wiring patterns 34a are formed on both surfaces of the substrate. Since the copper plating 34 is formed much thicker than the thickness of the plating seed layer 30, the seed layer 24, and the copper foil 28, the copper plating 34 is formed by etching using a copper etching solution without forming a resist pattern or the like. The plating seed layer 30, the seed layer 24, and the copper foil 28 other than the portion where the copper plating 34 is formed can be dissolved and removed.
Thus, a predetermined wiring pattern 34a is formed on both surfaces of the substrate, and the wiring substrate 40 in which the wiring patterns 34a on both surfaces of the substrate are electrically connected via the vias 34b is obtained.
[0019]
In the method of manufacturing the wiring board according to the present embodiment, after forming the through hole 26 in the substrate, one opening of the through hole 26 is closed using the adhesive layer 22 provided on one surface of the core insulating layer 20. Since the via is formed from that state, it is much easier and more reliable to form a highly reliable via than the conventional method of forming a via with both ends of the through hole 26 open. it can. Further, since the bottom surface of the opening 26a is formed by bonding the copper foil 28 through the adhesive layer 22, dirt does not adhere to the bottom of the opening 26a. When the vias 34b are formed by filling the via holes, the adhesiveness between the copper foil 28 and the vias 34b is improved, and there is also an advantage that electrical connection at the via portions can be ensured.
[0020]
Further, in the above embodiment, the steps from the step shown in FIG. 1D to the step shown in FIG. 2C correspond to the wiring pattern forming step. In this embodiment, the wiring pattern 34a is formed by a so-called semi-additive method. Things. Since the seed layer 24 is formed to be extremely thin and the copper foil 28 can be formed to be extremely thin, it is easy to form the conductor layer for forming the wiring pattern to a thickness of 15 μm or less, and the wiring pattern is formed very finely. can do. According to the method of the present embodiment, high-density wiring with a wiring width of about 10 μm and a wiring width of about 10 μm is possible.
[0021]
FIG. 3 is an explanatory view showing another embodiment of the method for manufacturing a wiring board according to the present invention. FIGS. 3A, 3B, and 3C show the same steps as those of FIGS. 1A, 1B, and 1C in the above-described wiring board manufacturing process. That is, FIG. 3A shows a substrate in which the adhesive layer 22 is formed on one surface of the core insulating layer 20 and the seed layer 24 is formed on the other surface. FIG. 3B shows a state in which laser processing has been performed on the substrate to form through holes 26. FIG. 3C shows a state in which a thin copper foil 28 is attached to one surface of the substrate using the adhesive layer 22 and one opening of the through hole 26 is closed to form an opening 26 a. Also in the present embodiment, when laminating the copper foil 28, the adhesive layer 22 and the copper foil 28 may be subjected to plasma treatment or ultraviolet irradiation in advance so that the copper foil 28 can be reliably laminated.
[0022]
In the method for manufacturing a wiring board according to the present embodiment, as shown in FIG. 3C, after copper foil 28 is bonded to one surface of the board, electrolytic copper plating is performed using the copper foil 28 as a plating power supply layer. The opening holes 26a are filled with copper plating 34. By adopting a configuration in which one opening of the through hole 26 is closed, it is possible to easily adjust the plating conditions of the electrolytic copper plating so that the opening 26 a is filled with the copper plating 34.
[0023]
FIGS. 3E and 3F show steps of forming a wiring pattern by a so-called subtract method.
FIG. 3E shows a state in which both surfaces of the substrate are covered with a photosensitive resin film (photosensitive resist), exposed and developed to form a resist pattern 32 covering only a part to be left as a wiring pattern. FIG. 3F shows a state in which the wiring pattern 36 is formed by etching the seed layer 24 and the copper foil 28 exposed on the surface of the substrate using the resist pattern 32 as a mask, and the resist pattern 32 is removed.
[0024]
In this way, a wiring pattern 36 is formed in a predetermined pattern on both surfaces of the substrate, and a two-layer wiring substrate 40 is obtained in which the wiring patterns 36 on both surfaces of the substrate are electrically connected by the copper plating 34 filling the opening holes 26a. Can be
In the method of manufacturing a wiring board according to the present embodiment, FIGS. 3D to 3F correspond to a wiring pattern forming step. In the present embodiment, the wiring pattern 36 is formed by a subtractive method. In the case of the subtractive method, a finer wiring pattern can be formed with higher precision as the thickness of the conductor layer etched when forming the wiring pattern is smaller. In the present embodiment, the thickness of the seed layer 24 can be about 3 μm and the thickness of the copper foil 28 can be about 10 μm. Therefore, the pattern width and the wiring interval of the wiring pattern can be about 10 μm, which is extremely high. It becomes possible to form a wiring pattern at a high density.
After the step of FIG. 3D in which the opening 26a is filled with the copper plating 34, a wiring pattern can be formed by the semi-additive method shown in FIGS.
[0025]
In the above-described embodiment, a two-layer wiring board in which the wiring patterns on both surfaces of the insulating layer are electrically connected via vias is formed. Are laminated to form a multilayer wiring board. FIG. 4 shows a state in which a multilayer wiring board is formed using the wiring board 40 as a core board. 42 is a build-up resin laminated on the surface of the core substrate, 44 is a wiring pattern formed on the surface of the build-up resin 42, and 44a is a via electrically connected to the wiring pattern 34a of the core substrate. The surface on which the wiring pattern 44 is formed is covered with a solder resist 46, and a portion of the wiring pattern 44 to be a land 44b is exposed.
[0026]
【The invention's effect】
According to the method for manufacturing a wiring board according to the present invention, as described above, after forming a through hole in the substrate, a metal foil is attached to one surface of the substrate, and one opening of the through hole is closed. Since vias are formed and wiring patterns are formed on both sides of the substrate, the wiring patterns formed on both sides of the substrate can be reliably electrically connected and formed as a highly reliable wiring substrate. it can. In addition, by using a thin seed layer and a thin metal foil, a fine wiring pattern can be formed with high precision. In addition, since the wiring board can be manufactured by a manufacturing process generally performed when manufacturing a wiring board, such as forming a through hole by laser processing in the board, the wiring board can be easily manufactured.
[Brief description of the drawings]
FIG. 1 is an explanatory view showing a manufacturing process of a wiring board.
FIG. 2 is an explanatory diagram showing a manufacturing process of the wiring board.
FIG. 3 is an explanatory view showing another manufacturing process of the wiring board;
FIG. 4 is a cross-sectional view illustrating a state in which a multilayer wiring board is formed using the wiring board of FIG. 2;
FIG. 5 is an explanatory view showing a conventional method for manufacturing a wiring board.
FIG. 6 is an explanatory view showing a conventional method for manufacturing a wiring board.
[Explanation of symbols]
10 Insulating layer 12 Copper foil 16 Plating metal 19 Unfilled part 20 Core insulating layer 22 Adhesive layer 24 Seed layer 26 Through hole 26a Opening hole 28 Copper foil 30 Plating seed layer 32 Resist pattern 34 Copper plating 34a Wiring pattern 34b Via 36 Wiring pattern 40 wiring board 42 build-up resin 44 wiring pattern 44a via 44b land 46 solder resist

Claims (5)

An adhesive layer is provided on one surface of the core insulating layer, and a substrate provided with a seed layer on the other surface of the core insulating layer is subjected to laser processing from the side of the substrate on which the seed layer is provided. Forming a through hole in the substrate;
A step of bonding a metal foil to the surface of the substrate on which the adhesive layer is formed, and forming an opening that closes one opening of the through hole,
Forming a via in the opening hole, and forming a wiring pattern electrically connected through the via on both sides of the substrate. As a wiring pattern forming process,
Forming a plating seed layer on the inner surface of the opening and the surface of the seed layer;
A step of coating both sides of the substrate with a photosensitive resin film, exposing and developing the resin film, and forming a resist pattern exposing a portion where a wiring pattern is to be formed,
Performing an electrolytic plating using the plating seed layer as a plating power supply layer, and depositing a plating metal on an exposed portion of the substrate surface;
After the resist pattern is removed, the seed layer and the metal foil are etched to remove the seed layer and the metal foil except for a portion where the plating metal is applied, thereby forming a wiring pattern on both surfaces of the substrate. 2. The method according to claim 1, further comprising the steps of: As a wiring pattern forming process,
Performing an electrolytic plating using the metal foil as a plating power supply layer, and filling the opening hole with a plating metal;
A step of coating both surfaces of the substrate with a photosensitive resin film, exposing and developing the resin film to form a resist pattern covering a portion to be a wiring pattern,
Using the resist pattern as a mask, etching the seed layer and the metal foil to form a wiring pattern, and then removing the resist pattern to form a wiring pattern on both surfaces of the substrate. The method for manufacturing a wiring board according to claim 1. 4. The method for manufacturing a wiring board according to claim 1, wherein after forming the wiring pattern on both sides of the wiring board, the wiring pattern is formed in multiple layers on the board by a build-up method or the like. 5. The method according to claim 1, wherein the seed layer is formed of a copper layer, a copper foil is used as the metal foil, and electrolytic copper plating is performed as electrolytic plating.

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