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JP2012199342A - Method for manufacturing resin-molded substrate, and resin-molded substrate - Google Patents

Method for manufacturing resin-molded substrate, and resin-molded substrate Download PDF

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JP2012199342A
JP2012199342A JP2011061836A JP2011061836A JP2012199342A JP 2012199342 A JP2012199342 A JP 2012199342A JP 2011061836 A JP2011061836 A JP 2011061836A JP 2011061836 A JP2011061836 A JP 2011061836A JP 2012199342 A JP2012199342 A JP 2012199342A
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resin
mold substrate
frame
bare chip
resin mold
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Hideki Kitada
秀樹 北田
Yoshihiro Nakada
義弘 中田
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Fujitsu Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

【課題】 本発明は、複数のベアチップを樹脂材料で封止した樹脂モールド基板の製造方法と樹脂モールド基板に関するものである。
【解決手段】 本発明の樹脂モールド基板の製造方法は、ベアチップを樹脂材料で封止した樹脂モールド基板の製造方法であって、１つ以上のベアチップの周りを囲む枠を第１の樹脂材料を用いて形成する枠形成工程と、ベアチップが配置された枠の内側に、第２の樹脂材料を充填してベアチップを封止する封止工程と、を有するよう構成する。
【選択図】 図４The present invention relates to a method of manufacturing a resin mold substrate in which a plurality of bare chips are sealed with a resin material, and a resin mold substrate.
A method of manufacturing a resin mold substrate according to the present invention is a method of manufacturing a resin mold substrate in which a bare chip is sealed with a resin material, and a frame surrounding one or more bare chips is made of a first resin material. A frame forming step formed by using the sealing layer and a sealing step of sealing the bare chip by filling the second resin material inside the frame in which the bare chip is arranged.
[Selection] Figure 4

Description

本発明は、複数のベアチップを樹脂材料で封止した樹脂モールド基板の製造方法と樹脂モールド基板に関するものである。   The present invention relates to a resin mold substrate manufacturing method in which a plurality of bare chips are sealed with a resin material, and a resin mold substrate.

近年の携帯情報端末等にみられる電子機器のデジタル化の進展に伴い半導体チップにはさらなる多機能化、高性能化が要求されている。これらの要求を満たすために、半導体チップの作成技術において素子や配線の寸法をより微細化することを行なっているが、一方で実装技術において高集積化を図ることが行なわれている。その一つとして、複数のベアチップを一つのパッケージ内に収容したＭＣＭ（マルチチップモジュール）やＭＣＰ（マルチチップパッケージ）が知られている。   With the progress of digitalization of electronic devices found in portable information terminals and the like in recent years, semiconductor chips are required to have more functions and higher performance. In order to satisfy these demands, the dimensions of elements and wirings are further miniaturized in the semiconductor chip fabrication technique, while high integration is being achieved in the packaging technique. As one of them, there are known MCM (multichip module) and MCP (multichip package) in which a plurality of bare chips are accommodated in one package.

ＭＣＰの実装形態として、複数のベアチップをデバイス面（接続パッドを有する面）が同一平面となるように配置し、ベアチップのデバイス面でない面（ダイの背面と側面）を樹脂材料で封止した構造が知られている。ベアチップ間の相互配線は、樹脂モールド基板のデバイス面が露出する面に配線層を形成し接続している。このような構造を、本発明では樹脂モールド基板ということにする。   As a mounting form of MCP, a structure in which a plurality of bare chips are arranged so that device surfaces (surfaces having connection pads) are on the same plane, and the surfaces (back and side surfaces of the die) of the bare chips are sealed with a resin material It has been known. The interconnection between the bare chips is connected by forming a wiring layer on the surface where the device surface of the resin mold substrate is exposed. Such a structure is referred to as a resin mold substrate in the present invention.

上記の樹脂モールド基板に関連する技術として、封止材料である樹脂を硬化するときの収縮に起因する反りを矯正する技術が知られている。この方法は、樹脂層より熱膨張係数が小さく、ヤング率が高いカーボンファイバやガラスクロス等からなる矯正部材を樹脂層内に設けて積層体とし、樹脂層において発生する反りを矯正するものである。   As a technique related to the above resin mold substrate, a technique for correcting a warp caused by shrinkage when curing a resin as a sealing material is known. In this method, a correction member made of carbon fiber, glass cloth or the like having a smaller thermal expansion coefficient and a higher Young's modulus than the resin layer is provided in the resin layer to form a laminate, and the warp generated in the resin layer is corrected. .

また、ベアチップの側面に１００ＭＰａ程度の低ヤング率の樹脂を設けておき、ベアチップ間を１４，０００ＭＰａ程度の高ヤング率の樹脂で接着する方法が知られている。低ヤング率の樹脂が変形することで、高ヤング率の樹脂が硬化時に発生する応力を吸収するものである。   Further, a method is known in which a resin having a low Young's modulus of about 100 MPa is provided on the side surface of the bare chip, and the bare chips are bonded with a resin having a high Young's modulus of about 14,000 MPa. The deformation of the low Young's modulus resin absorbs the stress generated when the high Young's modulus resin is cured.

特開平０７−７１３４号公報Japanese Patent Application Laid-Open No. 07-7134 特開２００４−１０３９５５号公報JP 2004-103955 A 特開２０１０−１４１１７３号公報JP 2010-141173 A

上記したように、半導体チップの高集積化を図るために複数のベアチップを一つのパッケージに収容することが行なわれており、その実装技術の一つとしてベアチップのデバイス面を同一面になるように配置し、ベアチップのデバイス面を除いた面を樹脂材料で封止する構造（樹脂モールド基板）とすることが知られている。   As described above, in order to achieve high integration of semiconductor chips, a plurality of bare chips are accommodated in one package, and as one of the mounting techniques, the device surfaces of the bare chips are made the same plane. It is known to have a structure (resin mold substrate) that is disposed and sealed on the surface excluding the device surface of the bare chip with a resin material.

樹脂モールド基板の製造においては、ベアチップのデバイス面を下方に向けて仮接着剤を塗布した支持基板に配置し、例えば全体のベアチップを囲う枠を設けてその枠の中に封止剤である樹脂を流し込み充填する。充填した樹脂が硬化した後に、デバイス面に配線層を形成するため樹脂モールド基板を支持基板から剥すが、そのとき硬化収縮によって生じた応力により樹脂モールド基板に反りが発生する、と言う問題がある。また、樹脂モールド基板全体が収縮する、という問題もある。   In the production of a resin mold substrate, the bare chip is placed on a support substrate coated with a temporary adhesive with the device surface facing downward, for example, a resin is provided as a sealant in the frame by providing a frame surrounding the entire bare chip. Pour and fill. After the filled resin is cured, the resin mold substrate is peeled off from the support substrate in order to form a wiring layer on the device surface. At this time, there is a problem that the resin mold substrate is warped due to the stress generated by the curing shrinkage. . There is also a problem that the entire resin mold substrate contracts.

配線層の形成にはホトリソグラフィ技術を用いて行なうが、樹脂モールド基板に大きな反りがあると樹脂モールド基板上に投影される配線パターンがボケてファインパターンの形成が困難となる。また、樹脂モールド基板のハンドリングに真空吸着を用いているが、この反りのために吸着不良が発生し、樹脂モールド基板をハンドリング中に落下してしまうこともある。樹脂モールド基板の収縮も、６インチ〜１２インチある基板では大きな値となり、フォトマスクとの位置合わせが困難となる。   The wiring layer is formed by using a photolithography technique. However, if the resin mold substrate has a large warp, the wiring pattern projected on the resin mold substrate is blurred and it is difficult to form a fine pattern. Further, vacuum suction is used for handling the resin mold substrate. However, due to this warpage, a suction failure may occur and the resin mold substrate may fall during handling. The shrinkage of the resin mold substrate is also a large value for a substrate having a size of 6 inches to 12 inches, and alignment with the photomask becomes difficult.

上記した反りを抑制するために矯正部材と樹脂とを積層体構造とする方法は、半導体チップの薄膜化を阻害し、高集積化が困難になると言う問題がある。   In order to suppress the above-described warpage, the method of forming the laminated structure of the correction member and the resin has a problem that the thinning of the semiconductor chip is hindered and high integration becomes difficult.

また、上記したヤング率の異なる樹脂を用いる方法は、一般に大きくヤング率が異なる材料は熱膨張係数も大きく異なる。樹脂モールド基板のプロセスにおいては、室温から２００℃位までの温度変化が生じ、熱膨張係数による応力がベアチップにかかることになり、ベアチップの損傷が懸念される、という問題がある。   In addition, the above-described methods using resins having different Young's moduli generally differ greatly in thermal expansion coefficient from materials having large Young's moduli. In the process of the resin mold substrate, a temperature change from room temperature to about 200 ° C. occurs, stress due to the thermal expansion coefficient is applied to the bare chip, and there is a problem that the bare chip may be damaged.

本発明は、上記の問題を解決するためになされたもので、反りや収縮を抑制する樹脂モールド基板の製造方法と、反りや収縮を抑制した樹脂モールド基板とを提供することを目的とする。   The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a method for manufacturing a resin mold substrate that suppresses warpage and shrinkage, and a resin mold substrate that suppresses warpage and shrinkage.

発明の一観点によれば、本発明の樹脂モールド基板の製造方法は、ベアチップを樹脂材料で封止した樹脂モールド基板の製造方法であって、１つ以上のベアチップの周りを囲む枠を第１の樹脂材料を用いて形成する枠形成工程と、ベアチップが配置された枠の内側に、第２の樹脂材料を充填してベアチップを封止する封止工程と、を有する樹脂モールド基板の製造方法が提供される。   According to one aspect of the present invention, a method for manufacturing a resin mold substrate according to the present invention is a method for manufacturing a resin mold substrate in which a bare chip is sealed with a resin material, wherein a first frame surrounding one or more bare chips is provided. A method of manufacturing a resin mold substrate, comprising: a frame forming step formed using the resin material; and a sealing step of sealing the bare chip by filling a second resin material inside the frame where the bare chip is arranged Is provided.

発明の他の一観点によれば、本発明の樹脂モールド基板は、同一平面上に接続用パッドを形成したデバイス面を揃えて配置された１つ以上のベアチップと、ベアチップの周りを囲んだ樹脂枠と、ベアチップのデバイス面を除く面と樹脂枠との間に充填された封止樹脂と、を有する樹脂モールド基板が提供される。   According to another aspect of the invention, the resin mold substrate of the present invention includes one or more bare chips arranged on the same plane with the device surfaces on which connection pads are formed, and a resin surrounding the bare chip. There is provided a resin mold substrate having a frame and a sealing resin filled between a surface excluding the device surface of the bare chip and the resin frame.

本発明は、ベアチップの周りに樹脂枠を設け、その中に封止樹脂を流し込んで硬化させることで、封止樹脂の硬化による収縮を基板上に形成したそれぞれの樹脂枠内に止めることができる。これによって基板全体の反りと収縮とを抑制する樹脂モールド基板の製造方法と樹脂モールド基板とを提供できる。   In the present invention, a resin frame is provided around the bare chip, and the sealing resin is poured and cured therein, whereby the shrinkage due to the curing of the sealing resin can be stopped in each resin frame formed on the substrate. . Accordingly, it is possible to provide a resin mold substrate manufacturing method and a resin mold substrate that suppress warpage and shrinkage of the entire substrate.

一般的なマルチチップパッケージの構造例を示す図である。It is a figure which shows the structural example of a general multichip package. 一般的なマルチチップパッケージのプロセス例を示す図である。It is a figure which shows the example of a process of a general multichip package. 樹脂硬化による反りの発生例を示す図である。It is a figure which shows the example of generation | occurrence | production of the curvature by resin hardening. 本発明の樹脂モールド基板例を示す図である。It is a figure which shows the resin mold board | substrate example of this invention. 本発明の樹脂モールド基板のプロセス例（その１）を示す図である。It is a figure which shows the process example (the 1) of the resin mold board | substrate of this invention. 本発明の樹脂モールド基板のプロセス例（その２）を示す図である。It is a figure which shows the process example (the 2) of the resin mold board | substrate of this invention. 本発明の樹脂モールド基板を用いたマルチチップパッケージの構造例を示す図である。It is a figure which shows the structural example of the multichip package using the resin mold substrate of this invention.

本発明の実施例を説明する前に、マルチチップパッケージの構造とそのプロセスの一般例を説明する。   Before describing embodiments of the present invention, a general example of the structure of a multichip package and its process will be described.

図１は一般的なマルチチップパッケージの構造を示した図で、ここで示したマルチチップパッケージ１００は３個のベアチップ３０を１パッケージ化した例である。ベアチップ３０のデバイス面（接続パッドを有する面）を除いた面（即ち、背面と側面）は封止樹脂４０で封止され、一体化して樹脂モールド基板５０を形成している。ベアチップ３０間の相互接続は、デバイス面に形成した配線層６０で接続している。配線層６０の下面にはバンプ７０が形成され、他の部品との電気的接続はこのバンプ７０を介して行なわれる。   FIG. 1 is a diagram showing the structure of a general multi-chip package. A multi-chip package 100 shown here is an example in which three bare chips 30 are formed into one package. The surfaces (that is, the back surface and the side surfaces) excluding the device surface (surface having connection pads) of the bare chip 30 are sealed with a sealing resin 40 and integrated to form a resin mold substrate 50. The interconnections between the bare chips 30 are connected by a wiring layer 60 formed on the device surface. Bumps 70 are formed on the lower surface of the wiring layer 60, and electrical connection with other components is made through the bumps 70.

図２は、一般的なマルチチップパッケージのプロセス例を示した図である。まず、支持基板１０の表面に仮接着剤２０を塗布したものを用意する（図２（ａ）参照）。支持基板１０は、以降の工程でウェーハプロセスと同じ製造機器を用い行なうため、半導体チップを製作するときに用いるＳｉウェーハと同一形状である。例えば、直径８インチ、１ｍｍ厚のガラス基板が用いられる。仮接着剤２０は熱可塑性の樹脂が用いられる。   FIG. 2 is a diagram showing a process example of a general multichip package. First, what prepared the temporary adhesive 20 apply | coated to the surface of the support substrate 10 is prepared (refer Fig.2 (a)). The support substrate 10 has the same shape as the Si wafer used when manufacturing semiconductor chips because the same manufacturing equipment as the wafer process is used in the subsequent steps. For example, a glass substrate having a diameter of 8 inches and a thickness of 1 mm is used. As the temporary adhesive 20, a thermoplastic resin is used.

仮接着剤２０を塗布した支持基板１０の上の適宜の位置に、ベアチップ３０のデバイス面を下に向けた状態で配置する。ベアチップ３０の配置にはダイボンダが用いられ、配置されたベアチップ３０は仮接着剤２０により支持基板１０上に固定される。次いで、支持基板１０の周りを囲い（不図示）、上方から封止樹脂４０を流し込み硬化させる。封止樹脂４０の硬化により、ベアチップ３０は封止されることになる。ベアチップ３０を封止した樹脂板が樹脂モールド基板５０である（図２（ｂ）、（ｃ））。   The bare chip 30 is disposed at an appropriate position on the support substrate 10 to which the temporary adhesive 20 is applied, with the device surface of the bare chip 30 facing down. A die bonder is used for the arrangement of the bare chip 30, and the arranged bare chip 30 is fixed on the support substrate 10 by the temporary adhesive 20. Next, the support substrate 10 is surrounded (not shown), and the sealing resin 40 is poured and cured from above. The bare chip 30 is sealed by the curing of the sealing resin 40. The resin plate in which the bare chip 30 is sealed is the resin mold substrate 50 (FIGS. 2B and 2C).

樹脂硬化後、全体を仮接着剤２０の溶融温度まで加熱し、支持基板１０から樹脂モールド基板５０を分離する（図２（ｄ））。   After the resin is cured, the whole is heated to the melting temperature of the temporary adhesive 20, and the resin mold substrate 50 is separated from the support substrate 10 (FIG. 2D).

樹脂モールド基板５０の上下面を返してベアチップ３０のデバイス面が露出する面を上に向け、配線層６０を形成する。配線層６０は、デバイス面上に絶縁膜と導電膜とを成膜しフォトリソグラフィを用いて形成する。続いて、配線層６０の所定位置にバンプ７０を形成する。例えば、半田メッキ法によりバンプ７０を形成する。続いて、ダイシングソー８０により樹脂モールド基板５０を切断して個片化し、マルチチップパッケージ１００が完成する（図２（ｅ）〜（ｈ））。   The wiring layer 60 is formed with the upper and lower surfaces of the resin mold substrate 50 turned back and the surface where the device surface of the bare chip 30 is exposed facing upward. The wiring layer 60 is formed by forming an insulating film and a conductive film on the device surface and using photolithography. Subsequently, bumps 70 are formed at predetermined positions on the wiring layer 60. For example, the bump 70 is formed by a solder plating method. Subsequently, the resin mold substrate 50 is cut into pieces by a dicing saw 80, and the multi-chip package 100 is completed (FIGS. 2E to 2H).

図２（ｄ）における支持基板１０と樹脂モールド基板５０との分離の際に、封止樹脂４０の硬化時に生じた収縮応力で樹脂モールド基板５０に反りが発生する。例えば、８インチの樹脂モールド基板５０では、２００μｍ前後の反りを生じる場合がある。２００μｍの反りは、以降のウェーハプロセスて障害となる。   When the support substrate 10 and the resin mold substrate 50 are separated from each other in FIG. 2D, the resin mold substrate 50 is warped due to shrinkage stress generated when the sealing resin 40 is cured. For example, an 8-inch resin mold substrate 50 may warp around 200 μm. The warp of 200 μm becomes an obstacle in the subsequent wafer process.

図３はその反りを説明する図で、図３（ａ）は樹脂モールド基板５０が支持基板１０に仮接着剤２０で支持されている状態を示し、図３（ｂ）は図３（ａ）の状態から支持基板１０から樹脂モールド基板５０を分離したときに樹脂モールド基板５０に反りを発生した状態を示している（図３（ｂ）の矢印は分離の方向を表す）。樹脂モールド基板５０のベアチップ３０が露出する面と反対の面は、ベアチップ３０がない分だけ封止樹脂４０の量が多いため収縮の程度は大きく、図３（ｂ）に示すように樹脂モールド基板５０を断面で表すと両端が持ち上がるように反ることになる。樹脂モールド基板５０は円板であり、樹脂モールド基板５０上のベアチップ３０の配置状態にもよるが、実際は複雑に変形するが概ね中央部分が窪む形状になる。   FIG. 3 is a diagram for explaining the warpage. FIG. 3A shows a state in which the resin mold substrate 50 is supported by the temporary adhesive 20 on the support substrate 10, and FIG. 3B shows the state shown in FIG. In this state, the resin mold substrate 50 is warped when the resin mold substrate 50 is separated from the support substrate 10 (the arrow in FIG. 3B indicates the direction of separation). The surface of the resin mold substrate 50 opposite to the surface on which the bare chip 30 is exposed has a large amount of shrinkage because the amount of the sealing resin 40 is large as much as there is no bare chip 30, and the resin mold substrate 50 is shown in FIG. If 50 is represented by a cross section, it will warp so that both ends may be lifted. Although the resin mold substrate 50 is a disk and depends on the arrangement state of the bare chip 30 on the resin mold substrate 50, the resin mold substrate 50 is actually deformed in a complicated manner, but generally has a shape in which the central portion is depressed.

次に、本発明の樹脂モールド基板の構造とプロセス例の実施例について説明する。図４は、本発明の樹脂モールド基板２００の構造を説明する図である。図４（ａ）は樹脂モールド基板２００を封止樹脂２３０によって封止されたベアチップ２２０のデバイス面が露出する側から見た外観図である。左に樹脂モールド基板２００の全体図を、右に樹脂モールド基板２００の部分拡大図を示している。部分拡大図に示すように、井形に形成したそれぞれの樹脂枠２１０の中に、ここでは２個のベアチップ２２０を配置し、その周りを封止樹脂２３０で充填している。   Next, the structure of the resin mold substrate of the present invention and examples of process examples will be described. FIG. 4 is a diagram illustrating the structure of the resin mold substrate 200 of the present invention. FIG. 4A is an external view of the resin mold substrate 200 viewed from the side where the device surface of the bare chip 220 sealed with the sealing resin 230 is exposed. An overall view of the resin mold substrate 200 is shown on the left, and a partially enlarged view of the resin mold substrate 200 is shown on the right. As shown in the partially enlarged view, two bare chips 220 are disposed in each resin frame 210 formed in a well shape, and the periphery thereof is filled with a sealing resin 230.

図４（ｂ）は部分拡大図に示したＡ−Ａ’の断面を示した図で、２個のベアチップ２２０のそれぞれは各樹脂枠２１０内に配置され、ベアチップ２２０のデバイス面（図４（ｂ）ではベアチップ２２０の上辺の面）を除く面が封止樹脂２３０により封止されている。樹脂枠２１０は樹脂モールド基板２００の両面を貫通し、デバイス面と同一面となる辺が反対の面の辺より長い台形形状に形成されている。図４に示す樹脂モールド基板２００は、これ以降にデバイス面に配線層が形成され、ダイシングソーによる個片化が行なわれる。   FIG. 4B is a view showing a cross section of AA ′ shown in the partially enlarged view. Each of the two bare chips 220 is disposed in each resin frame 210, and the device surface of the bare chip 220 (FIG. In b), the surface excluding the upper side surface of the bare chip 220 is sealed with the sealing resin 230. The resin frame 210 penetrates both surfaces of the resin mold substrate 200 and is formed in a trapezoidal shape in which the side that is the same surface as the device surface is longer than the side of the opposite surface. In the resin mold substrate 200 shown in FIG. 4, a wiring layer is formed on the device surface thereafter, and singulation is performed by a dicing saw.

次に、本発明の樹脂モールド基板のプロセス例を図５と図６を用いて説明する。図５において、まず仮接着剤２０を塗布した支持基板１０を用意する。支持基板１０と仮接着剤２０は図２で説明したものと同一のものである。即ち、支持基板１０は８インチ、１ｍｍ厚のガラス基板、仮接着剤２０は熱可塑樹脂である（図５（ａ））。   Next, a process example of the resin mold substrate of the present invention will be described with reference to FIGS. In FIG. 5, first, a support substrate 10 to which a temporary adhesive 20 is applied is prepared. The support substrate 10 and the temporary adhesive 20 are the same as those described in FIG. That is, the support substrate 10 is 8 inches, a 1 mm thick glass substrate, and the temporary adhesive 20 is a thermoplastic resin (FIG. 5A).

この仮接着剤２０を塗布した支持基板１０の上に、井形形状の樹脂枠２１０を形成する。支持基板１０は枡目状に複数の樹脂枠２１０が隣接して形成されることになる。１つの井形の外形寸法は１０×８ｍｍである。樹脂枠２１０の断面形状は前述したように台形である。台形形状とすることにより、封止樹脂を充填するときに空気を包み込んでボイドを作ることを抑制できる。台形の側面の角度は６０〜９５°程度が適切である。なお、樹脂枠２１０の上面の枠幅は１ｍｍ、高さは８００μｍである。樹脂枠２１０の材料は、溶剤により所定の粘度を有したエポキシ系樹脂で、スクリーン印刷により形成する。樹脂枠２１０の硬化温度は１９０℃である（図５（ｂ））。   A well-shaped resin frame 210 is formed on the support substrate 10 to which the temporary adhesive 20 is applied. The support substrate 10 is formed with a plurality of resin frames 210 adjacent to each other in a grid shape. The outer dimension of one well is 10 × 8 mm. The cross-sectional shape of the resin frame 210 is a trapezoid as described above. By using the trapezoidal shape, it is possible to suppress the envelopment of air when filling the sealing resin and making voids. The angle of the side surface of the trapezoid is appropriately about 60 to 95 °. The upper surface of the resin frame 210 has a frame width of 1 mm and a height of 800 μm. The material of the resin frame 210 is an epoxy resin having a predetermined viscosity with a solvent, and is formed by screen printing. The curing temperature of the resin frame 210 is 190 ° C. (FIG. 5B).

樹脂枠２１０を形成した後、ベアチップ２２０の配置を行なう。ここでは、２個のベアチップ（チップサイズ３×５×０．４ｍｍ）をそれぞれの樹脂枠２１０の中に所定位置にダイボンダを用いて行なう。配置されたベアチップ２２０は予め塗布されている仮接着剤２０より支持基板１０上に接着される（図５（ｃ））。   After the resin frame 210 is formed, the bare chip 220 is arranged. Here, two bare chips (chip size 3 × 5 × 0.4 mm) are performed in a predetermined position in each resin frame 210 using a die bonder. The arranged bare chip 220 is bonded onto the support substrate 10 by the temporary adhesive 20 applied in advance (FIG. 5C).

次に、樹脂枠２１０の上から封止樹脂２３０を樹脂枠２１０の高さを少し超える程度に流し込む。使用する封止樹脂２３０は、樹脂枠２１０の形成に用いたエポキシ系樹脂と同一の樹脂である。本実施例では、封止樹脂２３０の流し込みを空気中で行っているが、ボイドの発生を防止するために真空中で行ってもよい（図５（ｄ））。   Next, the sealing resin 230 is poured from the top of the resin frame 210 so as to slightly exceed the height of the resin frame 210. The sealing resin 230 to be used is the same resin as the epoxy resin used for forming the resin frame 210. In this embodiment, the sealing resin 230 is poured in the air, but may be performed in a vacuum in order to prevent the generation of voids (FIG. 5D).

封止樹脂２３０の流し込みが終わった後に、樹脂枠２１０の高さから上の封止樹脂２３０の除去を行なう。具体的には、スキージ２４０を樹脂枠２１０の高さに合わせ、水平移動させて樹脂枠２１０の高さ以上にある封止樹脂２３０を除去する（スキージ２４０の水平移動により、樹脂枠２１０の高さを超えた封止樹脂２３０は樹脂枠２１０の外に押し出される）。この樹脂の除去は、封止樹脂２３０が樹脂枠２１０を超えて連ならないようにするためである。本プロセスでは、支持基板１０上の樹脂枠２１０の全体に対して封止樹脂２３０を流し込み、スキージ２４０で樹脂枠２１０の高さ以上の樹脂の除去を行なったが、樹脂枠２１０の一つ一つにディスペンサを用いて樹脂枠２１０から溢れない量の封止樹脂２３０を注入するようにしてもよい。この場合はスキージ２４０による除去は不要となる（図５（ｅ））。   After the sealing resin 230 has been poured, the upper sealing resin 230 is removed from the height of the resin frame 210. Specifically, the squeegee 240 is adjusted to the height of the resin frame 210 and moved horizontally to remove the sealing resin 230 that is higher than the height of the resin frame 210 (the horizontal movement of the squeegee 240 causes the height of the resin frame 210 to increase). The sealing resin 230 exceeding the thickness is pushed out of the resin frame 210). This removal of the resin is to prevent the sealing resin 230 from continuing beyond the resin frame 210. In this process, the sealing resin 230 is poured into the entire resin frame 210 on the support substrate 10, and the resin exceeding the height of the resin frame 210 is removed by the squeegee 240. Alternatively, an amount of sealing resin 230 that does not overflow from the resin frame 210 may be injected using a dispenser. In this case, the removal by the squeegee 240 is not necessary (FIG. 5E).

スキージ２４０による樹脂の除去後、熱処理により封止樹脂２３０を硬化する。このときの硬化温度は１８０℃である。樹脂枠２１０を１９０℃で硬化しているため、樹脂枠２１０の軟化温度は封止樹脂２３０よりも高く（即ち、高剛性）、樹脂枠２１０が変形することはない。熱硬化した後の封止樹脂２３０の状態は、それぞれの樹脂枠２１０内で硬化するため図５（ｆ）に示すようなリセス（窪み）を発生する。本実施例で発生したリセスの大きさ（深さ）は２μｍであった（図５（ｆ））。   After the resin is removed by the squeegee 240, the sealing resin 230 is cured by heat treatment. The curing temperature at this time is 180 ° C. Since the resin frame 210 is cured at 190 ° C., the softening temperature of the resin frame 210 is higher than that of the sealing resin 230 (that is, high rigidity), and the resin frame 210 is not deformed. Since the state of the sealing resin 230 after being thermally cured is cured in each resin frame 210, a recess (dent) as shown in FIG. The size (depth) of the recess generated in this example was 2 μm (FIG. 5F).

次に、バックグラインディングにより、樹脂枠２１０を含めた封止樹脂２３０の上面を平坦面にする。ここでのバックグラインディング量は約１００μｍ（７００μｍが残る）とした。これよりリセス部分は研削されることになる。ここまでの工程で、支持基板１０上に樹脂モールド基板２００ができたことになる（図６（ｇ））。   Next, the upper surface of the sealing resin 230 including the resin frame 210 is made flat by backgrinding. The back grinding amount here was about 100 μm (700 μm remained). Accordingly, the recessed portion is ground. Through the steps so far, the resin mold substrate 200 is formed on the support substrate 10 (FIG. 6G).

バックグラインディング後、樹脂モールド基板２００を支持基板１０から分離（デボンド）する。仮接着剤である熱可塑性の軟化温度以上に加熱し、スライドオフして分離する。ここでは、１６０〜１７０℃に加熱し、スライドオフした。樹脂枠２１０および封止樹脂２３０の硬化時に１８０℃、１９０℃の温度が仮接着剤２０にかかるが、このとき仮接着剤２０は軟化するがベアチップ２２０を剥離してしまうことはない。分離後の樹脂モールド基板２００の反りは、樹脂モールド基板２３０の寸法８インチφ（約２００ｍｍφ）に対して約１０μｍであった。この程度の反りであれば、以降のウェーハプロセスに充分耐えられる値である（図６（ｈ））。   After back grinding, the resin mold substrate 200 is separated (debonded) from the support substrate 10. Heat to above the thermoplastic softening temperature, which is a temporary adhesive, slide off and separate. Here, it heated to 160-170 degreeC and slid off. When the resin frame 210 and the sealing resin 230 are cured, temperatures of 180 ° C. and 190 ° C. are applied to the temporary adhesive 20. At this time, the temporary adhesive 20 is softened but the bare chip 220 is not peeled off. The warpage of the resin mold substrate 200 after the separation was about 10 μm with respect to the dimension 8 inches φ (about 200 mmφ) of the resin mold substrate 230. Such warpage is a value that can sufficiently withstand the subsequent wafer process (FIG. 6H).

次いで、樹脂モールド基板２００のベアチップ２２０のデバイス面が露出している面への配線層６０の形成、さらにバンプ７０の形成、ダイシングソー１５０による樹脂モールド基板２００の切断、個片化は前述と同様であるので説明は省略する（図６（ｉ）〜（ｌ））。   Next, the formation of the wiring layer 60 on the exposed surface of the bare chip 220 of the resin mold substrate 200, the formation of the bumps 70, the cutting of the resin mold substrate 200 by the dicing saw 150, and the singulation are the same as described above. Therefore, the description thereof is omitted (FIGS. 6 (i) to (l)).

上記により作成した樹脂モールド基板を用いたマルチチップパッケージ３００の例を図７に示す。図７は図１のマルチチップパッケージ１００に合わせて描いた図である。マルチチップパッケージ３００がマルチチップパッケージ１００と異なる点は、ベアチップ２２０が樹脂枠２１０内に配置され、その樹脂枠２１０に流し込まれた封止樹脂２３０によって封止されている点である。それ以外の、配線層６０およびバンプ７０はマルチチップパッケージ１００と同様である。   An example of a multichip package 300 using the resin mold substrate created as described above is shown in FIG. FIG. 7 is a view drawn in accordance with the multi-chip package 100 of FIG. The multichip package 300 is different from the multichip package 100 in that the bare chip 220 is disposed in the resin frame 210 and is sealed by the sealing resin 230 poured into the resin frame 210. The other wiring layers 60 and bumps 70 are the same as those of the multichip package 100.

上記実施例では、樹脂枠と封止樹脂にエポキシ系樹脂を用いたが、この樹脂に限らずフェノール樹脂、メラミン樹脂、ポリウレタン樹脂、熱硬化性ポリイミド樹脂のように熱硬化性を主成分とした樹脂を用いることもできる。   In the above embodiment, epoxy resin is used for the resin frame and the sealing resin. However, the resin is not limited to this resin, and thermosetting is the main component such as phenol resin, melamine resin, polyurethane resin, thermosetting polyimide resin. Resin can also be used.

また、樹脂枠と封止樹脂にシリカやアルミナ、カーボンブラックなどの無機フィラーを配合させてもよい。これらの無機フィラーを配合することでベアチップを包む封止樹脂の熱伝導率が上がり、ベアチップが発熱する温度上昇を抑制できる。   Moreover, you may mix | blend inorganic fillers, such as a silica, an alumina, and carbon black, with a resin frame and sealing resin. By blending these inorganic fillers, the thermal conductivity of the sealing resin that wraps the bare chip is increased, and an increase in temperature at which the bare chip generates heat can be suppressed.

本発明により、封止樹脂の硬化による収縮をそれぞれの樹脂枠内に止めるようにしたので、樹脂モールド基板に反りが生ずる問題を解消できる。また、樹脂モールド基板全体が収縮する、という問題も解消する。また、樹脂枠２１０と封止樹脂２３０とを同一の樹脂を用いたため、熱膨張係数に起因する変形を生じることはない。   According to the present invention, since the shrinkage due to the hardening of the sealing resin is stopped in each resin frame, the problem that the resin mold substrate is warped can be solved. Further, the problem that the entire resin mold substrate contracts is also solved. In addition, since the same resin is used for the resin frame 210 and the sealing resin 230, deformation due to the thermal expansion coefficient does not occur.

以上、本発明の樹脂モールド基板とその製造方法の実施例を説明したが、これらは上記した内容に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々なる態様で実施し得るものである。   As mentioned above, although the Example of the resin mold board | substrate of this invention and its manufacturing method was described, these are not limited to above content, What can be implemented in various aspects in the range which does not deviate from the summary of this invention. It is.

１０ 支持基板
２０ 仮接着剤
３０ ベアチップ
４０ 封止樹脂
５０ 樹脂モールド基板
６０ 配線層
７０ バンプ
８０ ダイシングソー
１００ マルチチップパッケージ
１５０ ダイシングソー
２００ 樹脂モールド基板
２１０ 樹脂枠
２２０ ベアチップ
２３０ 封止樹脂
２４０ スキージ
２５０ リセス
３００ マルチチップパッケージ DESCRIPTION OF SYMBOLS 10 Support substrate 20 Temporary adhesive 30 Bare chip 40 Sealing resin 50 Resin mold substrate 60 Wiring layer 70 Bump 80 Dicing saw 100 Multichip package 150 Dicing saw 200 Resin mold substrate 210 Resin frame 220 Bare chip 230 Sealing resin 240 Squeegee 250 Recess 300 Multi-chip package

Claims (7)

ベアチップを樹脂材料で封止した樹脂モールド基板の製造方法であって、
前記ベアチップの周りを囲む枠を第１の樹脂材料を用いて形成する枠形成工程と、
前記ベアチップが配置された前記枠の内側に、第２の樹脂材料を充填して該ベアチップを封止する封止工程と
を有することを特徴とする樹脂モールド基板の製造方法。 A method of manufacturing a resin mold substrate in which a bare chip is sealed with a resin material,
A frame forming step of forming a frame surrounding the bare chip using the first resin material;
And a sealing step of sealing the bare chip by filling a second resin material inside the frame on which the bare chip is arranged. 前記第１の樹脂材料と前記第２の樹脂材料は同一の熱硬化樹脂である
ことを特徴とする請求項１に記載の樹脂モールド基板の製造方法。 The method for manufacturing a resin mold substrate according to claim 1, wherein the first resin material and the second resin material are the same thermosetting resin. 前記第１の樹脂材料の軟化温度は、前記第２の硬化温度より高い、
ことを特徴とする請求項１または２のいずれか１項に記載の樹脂モールド基板の製造方法。 The softening temperature of the first resin material is higher than the second curing temperature,
The manufacturing method of the resin mold substrate of any one of Claim 1 or 2 characterized by the above-mentioned. 同一平面上に、接続用パッドを形成したデバイス面を揃えて配置されたベアチップと、
前記ベアチップの周りを囲んだ樹脂枠と、
前記ベアチップのデバイス面を除く面と前記樹脂枠との間に充填された封止樹脂と、
を有することを特徴とする樹脂モールド基板。 A bare chip arranged on the same plane with the device surfaces on which connection pads are formed, and
A resin frame surrounding the bare chip;
A sealing resin filled between a surface excluding the device surface of the bare chip and the resin frame;
The resin mold board | substrate characterized by having. 前記樹脂枠と前記封止樹脂とは、同一の樹脂材料である
ことを特徴とする請求項４に記載の樹脂モールド基板。 The resin mold substrate according to claim 4, wherein the resin frame and the sealing resin are the same resin material. 前記樹脂枠は、前記平面に対して垂直な断面形状が台形である
ことを特徴とする請求項４または５のいずれか１項に記載の樹脂モールド基板。 The resin mold substrate according to claim 4, wherein the resin frame has a trapezoidal cross-sectional shape perpendicular to the plane. 前記樹脂枠と前記封止樹脂とは、無機材料のフィラーを含有する
ことを特徴とする請求項４乃至６のいずれか１項に記載の樹脂モールド基板。 The resin mold substrate according to any one of claims 4 to 6, wherein the resin frame and the sealing resin contain an inorganic material filler.
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