KR0156515B1 - Semiconductor package - Google Patents
Semiconductor packageInfo
- Publication number
- KR0156515B1 KR0156515B1 KR1019940018499A KR19940018499A KR0156515B1 KR 0156515 B1 KR0156515 B1 KR 0156515B1 KR 1019940018499 A KR1019940018499 A KR 1019940018499A KR 19940018499 A KR19940018499 A KR 19940018499A KR 0156515 B1 KR0156515 B1 KR 0156515B1
- Authority
- KR
- South Korea
- Prior art keywords
- heat spreader
- semiconductor chip
- semiconductor package
- heat
- outside
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
본 발명은 반도체패키지(1)에 관한 것으로서, 히트스프레더(5)의 중앙 접합면(5a) 외부로 요홈부(7)를 형성하고, 요홈부(7)의 외주연에는 방사상으로 다수개의 결합돌기(5e)를 형성하여 리드프레임(4)의 탑재판(4a) 하부면에 접합면(5a)을 접합시킨 상태에서 컴파운드재로 몰드된몸체(8)가 히트스프레더(5)의 요홈부(7)에 몰입되고 결합돌기(5e)는 몸체(8) 몰드된 히트스프레더(5)의 하부면인 노출부와 개방부(6)를 몸체(8)에서 외부로 표출시키므로서 반도체칩(2)에서 발생한 열의 방출을 높이고, 컴파운드몰드재의 접합성을 향상시켜 제품의 품질 및 신뢰성을 높이도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package (1), in which grooves (7) are formed outside the center joining surface (5a) of the heat spreader (5), and a plurality of coupling protrusions are radially formed on the outer periphery of the grooves (7). The body 8 molded of the compound material in the state where the 5e is formed and the bonding surface 5a is bonded to the lower surface of the mounting plate 4a of the lead frame 4 is formed in the recess 7 of the heat spreader 5. Immersed in the semiconductor chip 2 by the coupling protrusion 5e exposing the exposed portion and the open portion 6, which are the lower surface of the body 8 molded heat spreader 5, from the body 8 to the outside. It is to increase the release of heat generated and to improve the bonding of the compound molding material to improve the quality and reliability of the product.
Description
제1도는 본 발명에 의한 반도체패키지를 도시한 평면도이다.1 is a plan view showing a semiconductor package according to the present invention.
제2도는 제1도의 A-A'선을 도시한 단면도이다.2 is a cross-sectional view taken along line AA ′ of FIG. 1.
제3도는 본 발명에 의한 반도체패키지를 포함한 전체 구성을 도시한 단면도이다.3 is a cross-sectional view showing the overall configuration including the semiconductor package according to the present invention.
제4도는 종래의 반도체패키지 구성을 도시한 단면도이다.4 is a cross-sectional view showing a conventional semiconductor package configuration.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 본 발명에 의한 반도체패키지 2 : 반도체칩1: semiconductor package according to the present invention 2: semiconductor chip
3 : 전도성와이어 4 : 리드프레임3: conductive wire 4: lead frame
4a : 탑재판 4b : 리드4a: mounting plate 4b: lead
5 : 히트스프레더 5a : 접합면5 heat spreader 5a joining surface
5b : 하향경사면 5c : 평탄면5b: downward slope 5c: flat surface
5d : 상향경사면 5e : 결합돌기5d: upward slope 5e: coupling protrusion
6 : 개방부 7 : 요홈부6: opening part 7: groove part
8 : 몸체8: body
본 발명은 반도체패키지에 관한 것으로서, 특히 히트스프레더를 갖는 반도체패키지에서 접합면을 중심으로 그 외주연에 하향경사면, 평탄면, 상향경사면 및 결합돌기를 일체로 형성하고 일부는 외부로 직접 노출시킴으로써 반도체칩에서 발생되는 열의 방출 효율을 증대시키고 또한 수지재로 형성되는 몸체와의 접착면적을 넓혀 접착력을 향상시킴으로써 계면박리나 몸체의 크랙현상 등을 제거할 수 있는 반도체패키지에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package, and in particular, in a semiconductor package having a heat spreader, the semiconductor is formed by integrally forming a downwardly inclined plane, a flat plane, an upwardly inclined plane, and a coupling protrusion on the outer circumference of the junction surface and partially exposing the semiconductor to the outside The present invention relates to a semiconductor package capable of eliminating interfacial peeling or cracking of a body by increasing the efficiency of dissipation of heat generated from a chip and increasing the adhesion area with a body formed of a resin material to improve adhesion.
일반적으로 반도체패키지는 소정의 전기적 기능을 수행하는 반도체칩을 리드프레임 등에 탑재하여 와이어본딩을 수행하고, 수지재 등으로 봉지하여 몸체를 형성함으로써 외부의 전기적, 기계적, 화학적 환경 등으로부터 상기 반도체칩 등을 보호하는 동시에 인쇄회로기판 등에 실장되어 상기 반도체칩이 소정의 전기적 기능을 수행할 수 있도록 하는 것을 말한다. 이러한 반도체패키지는 최근 상기 반도체칩의 고집적화, 고기능화, 고속화 등에 의해 점차 발열량이 많아짐으로써 이를 해결하기 위해 상기 반도체칩 또는 리드프레임의 저면에 히트스프레더를 장착한 반도체패키지가 제조되고 있다.In general, a semiconductor package includes a semiconductor chip that performs a predetermined electrical function in a lead frame or the like, performs wire bonding, encapsulates a resin material, and forms a body to form a body from an external electrical, mechanical, and chemical environment. Protection and at the same time mounted on a printed circuit board to allow the semiconductor chip to perform a predetermined electrical function. In order to solve this problem, a semiconductor package having a heat spreader mounted on a bottom surface of the semiconductor chip or a lead frame has been manufactured.
상기한 히트스프레더(5')가 장착된 종래의 반도체패키지(1')는 제4도에 도시한 일본특허 출원공개번호 소57-136353와 같이, 일정한 전기적 기능을 수행하는 반도체칩(2')과, 상기 반도체칩(2')의 저면에 접착된 리드프레임(4')의 탑재판(4a')과, 상기 반도체칩(2')으로부터 발생된 열을 외부로 방출하기 위해 상기 탑재판(4a')의 저면에는 접합면(5a')이 형성되고 상기 접합면(5a')의 외주연으로는 하향경사면(5b')이 형성된채 평탄면(5c')이 연결되어 있는 히트스프레더(5')와, 상기 반도체칩(2')과 리드프레임(4')의 리드(4b')를 연결하는 전도성와이어(3')와, 상기 반도체칩(2'), 전도성와이어(3'), 리드(4b') 및 히트스프레더(5')를 수지재로 봉지하여 형성된 몸체(8')로 이루어져 있다.The conventional semiconductor package 1 'equipped with the heat spreader 5' is a semiconductor chip 2 'that performs a certain electrical function as shown in Japanese Patent Application Publication No. 57-136353 shown in FIG. And the mounting plate 4a 'of the lead frame 4' adhered to the bottom surface of the semiconductor chip 2 ', and the mounting plate (4) for dissipating heat generated from the semiconductor chip 2' to the outside. A bottom surface of 4a ') is formed with a joint surface 5a' and a heat spreader 5 having a flat surface 5c 'connected to the outer periphery of the joint surface 5a' with a downwardly inclined surface 5b '. '), The conductive wire 3' connecting the semiconductor chip 2 'and the lead 4b' of the lead frame 4 ', the semiconductor chip 2', the conductive wire 3 ', The lid 4b 'and the heat spreader 5' are formed of a body 8 'formed by sealing a resin material.
이와같은 종래의 반도체패키지(1')는 반도체칩(2')의 작동에 따라 그 반도체칩(2')에서 발생하는 열을 히트스프레더(5')를 통해 외부로 방출하도록 되어 있지만, 상기 히트스프레더(5') 전체가 몸체(8')에 완전히 몰입되어 있으므로서 외부로 방출되는 방열 효율이 저조하여 반도체칩(2')의 전기적 수행 능력을 상대적으로 저하시킨다. 또한 몸체(8')와 히트스프레더(5')의 접착면이 충분히 크지 않음으로써 그 접착력이 저하되어 반도체칩(2')에서 발생한 열에 의해 상기 히트스프레더(5')와 몸체(8')사이에 계면박리 현상이 일어나고 또한 상기 계면사이로 수분이 흡수되어 결국 반도체칩(2')의 작동중에 몸체(8')가 크랙되는 문제점이 있다.The conventional semiconductor package 1 'is configured to discharge heat generated from the semiconductor chip 2' to the outside through the heat spreader 5 'according to the operation of the semiconductor chip 2'. Since the entire spreader 5 'is completely immersed in the body 8', the heat dissipation efficiency emitted to the outside is low, thereby relatively lowering the electrical performance of the semiconductor chip 2 '. In addition, since the adhesion surface of the body 8 'and the heat spreader 5' is not sufficiently large, the adhesion thereof is lowered, and the heat generated from the semiconductor chip 2 'causes the gap between the heat spreader 5' and the body 8 '. Interfacial separation occurs and moisture is absorbed between the interfaces, resulting in the body 8 'cracking during operation of the semiconductor chip 2'.
따라서 본 발명의 목적은 상기와 같은 종래의 문제점을 해결하기 위하여 안출한 것으로써, 히트스프레더를 갖는 반도체패키지에서 접합면을 중심으로 그 외주연에 하향경사면, 평탄면, 상향경사면 및 결합돌기를 일체로 형성하고 일부는 외부로 직접 노출시킴으로써 반도체칩에서 발생되는 열의 방출효율을 증대시키고 또한 수지재로 형성되는 몸체와의 접착면적을 넓혀 접착력을 향상시킴으로써 계면박리나 몸체의 크랙현상 등을 제거할 수 있는 반도체패키지를 제공하는데 있다.Accordingly, an object of the present invention is to devise to solve the above-mentioned conventional problems, in the semiconductor package having a heat spreader integrated downward downward surface, flat surface, upwardly inclined surface and coupling projections on the outer circumference of the joint surface. It is possible to remove the surface peeling or cracking of the body by increasing the efficiency of dissipation of heat generated from the semiconductor chip by exposing it directly to the outside and improving the adhesive force by increasing the adhesion area with the body formed of the resin material. To provide a semiconductor package.
상기한 목적을 달성하기 위해 본 발명은, 일정한 전기적 기능을 수행하는 반도체칩과; 상기 반도체칩의 저면에 접착된 리드프레임의 탑재판과; 상기 반도체칩으로부터 발생된 열을 외부로 방출하기 위해 상기 탑재판의 저면에는 접합면이 형성되고 상기 접합면의 외주연으로는 하향경사면이 형성된 채 평탄면이 연결되어 있는 히트스프레더와; 상기 반도체칩과 리드프레임의 리드를 연결하는 전도성와이어와; 상기 반도체칩, 전도성와이어, 리드 및 히트스프레더를 수지재로 봉지하여 형성된 몸체로 이루어진 반도체패키지에 있어서, 상기 히트스프레더는 몸체와의 접착력과 열방출 효율을 증대하기 위해 상기 평탄면에 연결되어 그 외주연 상향경사면이 더 형성되어 있고, 상기 상향경사면의 끝단에는 다수의 결합돌기가 더 형성된 것을 특징으로 한다.The present invention to achieve the above object, the semiconductor chip for performing a certain electrical function; A mounting plate of a lead frame bonded to a bottom surface of the semiconductor chip; A heat spreader having a bonding surface formed on a bottom surface of the mounting plate to discharge heat generated from the semiconductor chip to the outside, and having a downward sloped surface formed at an outer circumference of the bonding surface; Conductive wires connecting the semiconductor chip with the leads of the lead frame; A semiconductor package comprising a body formed by encapsulating the semiconductor chip, the conductive wire, the lead, and the heat spreader with a resin material, wherein the heat spreader is connected to the flat surface to increase adhesion to the body and heat dissipation efficiency. Peripheral upward inclined surface is further formed, characterized in that a plurality of engaging projections are further formed at the end of the upward inclined surface.
여기서 상기 히트스프레더는 그 접합면, 하향경사면 및 평탄면의 저면을 몸체의 외부로 노출시켜 본 발명의 목적을 달성할 수도 있다.In this case, the heat spreader may achieve the object of the present invention by exposing the bottom surface of the joint surface, the downward inclined surface and the flat surface to the outside of the body.
이하, 첨부된 도면에 의하여 본 발명을 상세하게 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
제1도 및 제2도는 본 발명에 적용되는 반도체패키지(1)의 히트스프레더(5)를 도시한 것으로써, 중앙 상부에 리드프레임(4)의 탑재판(4a) 저면과 접합되도록 접합면(5a)이 구비되어 있고, 이 외주연에는 하향경사면(5b)이 형성되어 있으며, 상기 하향경사면(5b)에 연결되어서는 평탄면(5c)이 형성되어 있다. 상기 평탄면(5c)의 외주연에는 다시 상향경사면(5d)이 형성되어 있으며 상기 상향경사면(5d)의 단부에는 방사상으로 다수의 결합돌기(5e)가 형성되어 있으며, 상기 접합면(5a)의 하부에는 그 외주연에 형성된 하향경사면(5b)으로 인해 소정의 공간을 갖는 개방부(6)가 형성되어 있고, 상기 하향경사면(5b)과 상향경사면(5d) 사이에는 자연스럽게 요홈부(7)가 형성되어 있다.1 and 2 show the heat spreader 5 of the semiconductor package 1 to be applied to the present invention, the bonding surface of which is to be joined to the bottom surface of the mounting plate 4a of the lead frame 4 on the center. 5a) is provided, a downwardly inclined surface 5b is formed on the outer circumference thereof, and a flat surface 5c is formed by being connected to the downwardly inclined surface 5b. On the outer circumference of the flat surface 5c, an upwardly inclined surface 5d is formed again, and a plurality of engaging projections 5e are radially formed at the end of the upwardly inclined surface 5d, and the bonding surface 5a is formed. An opening 6 having a predetermined space is formed at a lower portion due to the downward inclined surface 5b formed at the outer circumference thereof, and a recess 7 is naturally formed between the downwardly inclined surface 5b and the upwardly inclined surface 5d. Formed.
여기서 상기 히트스프레더(5)는 방열성이 양호한 구리판(Cu Plate)또는 알루미늄판(Al Plate)을 이용하여 화학적 에칭(Etching)방법이나 기계적 스탬핑(Stamping)방법을 이용하여 형성시킬 수 있으며, 금속이 아닌 것을 이용하여 형성할수도 있다.Here, the heat spreader 5 may be formed by using a chemical etching method or a mechanical stamping method by using a copper plate (Cu plate) or an aluminum plate (Al Plate) having good heat dissipation, and is not a metal. It can also be formed using.
제3도는 본 발명에 의한 히트스프레더(5)가 사용된 반도체패키지(1)의 구성을 도시한 단면도로서, 리드프레임(4)을 중심으로 중앙의 탑재판(4a) 상부에 반도체칩(2)이 안착되고, 상기 반도체칩(2)과 리드프레임(4)의 각 리드(4b)는 전도성와이어(3)로 본딩되어 있으며, 상기 탑재판(4a)의 하부면에는 히트스프레더(5)의 중앙 상부면인 접합면(5a)이 접합되어 있다.3 is a cross-sectional view showing the configuration of the semiconductor package 1 in which the heat spreader 5 according to the present invention is used. The semiconductor chip 2 is placed on an upper portion of the mounting plate 4a around the lead frame 4. The semiconductor chip 2 and each lead 4b of the lead frame 4 are bonded to each other by a conductive wire 3, and the center of the heat spreader 5 is disposed on the lower surface of the mounting plate 4a. The joining surface 5a which is an upper surface is joined.
상기 접합면(5a)을 중심으로 그 외주연에 형성된 하향경사면(5b) 및 이에 연장된 평탄면(5c)과 상향경사면(5d)에 의해 형성된 요홈부(7) 상측으로는 수지재가 봉지되어 몸체(8)가 형성되어 있고, 상기 상향경사면(5d)의 외주연에 방사상으로 다수개가 구비된 결합돌기(5e)도 수지재로 봉지되어 몸체(8)내에 위치되어 있다.The resin material is encapsulated in the upper surface of the recessed portion 7b formed by the downwardly inclined surface 5b formed at the outer circumference of the bonding surface 5a and the flat surface 5c and the upwardly inclined surface 5d extending therefrom. (8) is formed, and a plurality of engaging projections 5e provided radially on the outer periphery of the upwardly inclined surface 5d are also sealed with a resin material and are located in the body 8.
여기서 상기 몸체(8)는 히트스프레더(5)의 접합면(5a) 저면 및 평탄면(5c) 저면에는 형성되지 않음으로써 상기 접합면(5a) 저면의 개방부(6)가 그대로 공기중에 노출되며 상기 평탄면(5c)의 저면도 그대로 공기중에 노출되어 방열효과를 증대시킨다.Here, the body 8 is not formed at the bottom of the joining surface 5a and the bottom of the flat surface 5c of the heat spreader 5 so that the opening 6 of the bottom of the joining surface 5a is exposed to the air as it is. The bottom of the flat surface 5c is also exposed to the air as it is to increase the heat dissipation effect.
도면중 미설명 부호 4b는 차후에 인쇄회로기판 등에 실장되는 리드프레임(4)의 리드이다.In the figure, reference numeral 4b denotes a lead of the lead frame 4 which is subsequently mounted on a printed circuit board or the like.
이와같이 구성된 본 발명의 작용효과를 상세하게 설명하면 다음과 같다.Referring to the effect of the present invention configured in this way in detail as follows.
첨부 도면 제3도에서와 같이 히트스프레더(5)가 리드프레임(4)의 탑재판(4a) 하부면에 접합된 상태이므로 반도체칩(2)에서 발생되는 열이 리드프레임(4)의 탑재판(4a), 리드(4b) 그리고 히트스프레더(5)를 통해 외부로 방출된다. 여기서 상기 히트스프레더(5)의 접합면(5a), 하향경사면(5b) 그리고 평탄면(5c)의 저면이 외부의 공기에 직접 노출되어 있음으로써 그 방열 작용이 보다 활발히 이루어진다. 이렇게 외부로 방출되는 열은 히트스프레더(5)가 외부공기와 직접 접촉되는 접합면(5a) 저면의 개방부(6) 및 평탄면(5c)의 체적면적을 넓힘으로써 열방출 효율을 극대화시켜 반도체칩(2)의 열에 의한 전기적 성능 저하 및 파손 등을 방지하게 된다.Since the heat spreader 5 is bonded to the lower surface of the mounting plate 4a of the lead frame 4 as shown in FIG. 3, heat generated in the semiconductor chip 2 is transferred to the mounting plate of the lead frame 4. 4a, the lid 4b and the heat spreader 5 are discharged to the outside. Here, the heat dissipation action is more active because the joint surface 5a, the downward slope 5b and the bottom surface of the flat surface 5c of the heat spreader 5 are directly exposed to the outside air. The heat released to the outside maximizes the heat dissipation efficiency by widening the volume area of the open portion 6 and the flat surface 5c of the bottom surface of the joint surface 5a where the heat spreader 5 is in direct contact with the external air. Deterioration of electrical performance and breakage due to heat of the chip 2 are prevented.
상기한 개방부(6)는 접합면(5a)을 중심으로 외주연에 하향경사면(5b)을 갖추게 하여 상협하광으로 형성함으로써 외부 공기와의 접촉 면적을 더욱 넓히도록 하는 동시에 몸체(8)와의 접착면적도 넓힐 수 있게 된다. 여기서 상기 히트스프레더(5)의 상향경사면(5d) 단부에는 다수의 결합돌기(5e)가 형성되어 있음으로써 상기 몸체(8)와의 접착면적을 더욱 넓히게 되어 결국 몸체(8)와의 계면박리 및 크랙 현상 등을 방지할 수 있게 된다. 즉, 상기 히트스프레더(5)는 중앙의 접합면(5a)에서 외측으로 하향경사면(5b), 평탄면(5c) 및 상향경사면(5d)을 이루면서 형성된 요홈부(7)에 몸체(8)가 형성되도록 하여 히트스프레더(5)와 몸체(8)의 접착면적을 넓히는 동시에 상향경사면(5d)의 외주연에 다수개의 결합돌기(5e)를 방사상으로 돌출 형성시킴으로써 접착면적을 더욱 넓혀 결국 몸체(8)와 히트스프레더(5)의 접착력을 증대시키게 된다.The opening portion 6 has a downward inclined surface 5b on the outer periphery of the joint surface 5a and is formed as upper and lower light so that the contact area with the outside air can be further expanded and at the same time adhered to the body 8. It can also increase the area. Here, a plurality of engaging protrusions 5e are formed at the ends of the upwardly inclined surface 5d of the heat spreader 5 to further widen the adhesive area with the body 8, thereby resulting in interfacial peeling and cracking with the body 8. And the like can be prevented. That is, the heat spreader 5 has a body 8 in the recess 7 formed while forming a downwardly inclined surface 5b, a flat surface 5c and an upwardly inclined surface 5d outwardly from the center joint surface 5a. In addition, the adhesion area between the heat spreader 5 and the body 8 is widened, and a plurality of coupling protrusions 5e are radially protruded on the outer circumference of the upwardly inclined surface 5d, thereby further widening the adhesion area. ) And the heat spreader 5 is increased.
한편, 상기한 히트스프레더(5) 상부에 수지재로 형성된 몸체(8)는 히트스프레더(5)를 중심으로 접합면(5a) 저면의 개방부(6)와 평탄면(5c) 저면에는 몸체(8)를 형성시키지 않음에 따라 반도체칩(2)에서 발생한 열을 외부 공기중으로 용이하게 방출시킴은 물론 몸체(8)의 열적 팽창변화를 최소화하여 히트스프레더(5)와 몸체(8)와의 접촉면에 계면박리를 방지하여 몸체(8)의 크랙 현상을 방지하여 반도체패키지(1)의 품질향상을 도모한 것이다.On the other hand, the body 8 formed of a resin material on the heat spreader 5 above the heat spreader 5, the opening portion 6 and the bottom of the flat surface (5c) of the bottom surface of the joining surface (5a), the body ( 8) it is easy to dissipate heat generated in the semiconductor chip 2 into the outside air as well as to minimize the thermal expansion change of the body (8) to the contact surface between the heat spreader (5) and the body (8) By preventing the interfacial peeling to prevent the crack phenomenon of the body (8) to improve the quality of the semiconductor package (1).
또한, 히트스프레더(5)의 하부에는 수지재의 몸체(8)를 배제시켜 몸체(8)의 원료가 되는 수지재를 절약시킴에 따라 원가절감 및 반도체패키지(1)의 무게를 줄일 수 있게 된다.In addition, the lower part of the heat spreader 5 can eliminate the body 8 of the resin material, thereby saving the resin material that is the raw material of the body 8, thereby reducing the cost and the weight of the semiconductor package 1.
상술한 바와같이 본 발명은 반도체패키지(1)에 적용되는 히트스프레더(5)를 접합면(5a) 외부에 하향경사면(5b), 평탄면(5c), 상향경사면(5d) 그리고 다수의 결합돌기(5e)를 형성시킴으로써 그 면적을 최대한 확보하여 몸체(8)와의 접착면적을 극대화하여 접착력을 향상시킴으로써 계면박리현상이나 크랙현상을 제거하고, 상기 접합면(5a), 하향경사면(5b) 및 평탄면(5c)의 저면은 외부의 공기중에 직접 노출시킴으로써 그 열방출 효율을 극대화하여 제품의 품질 향상 및 신뢰성을 향상시킬 수 있는 효과가 있다.As described above, in the present invention, the heat spreader 5 applied to the semiconductor package 1 is provided with a downward inclined surface 5b, a flat surface 5c, an upwardly inclined surface 5d, and a plurality of coupling protrusions outside the bonding surface 5a. By forming the 5e to maximize the area to maximize the adhesion area with the body (8) to improve the adhesion to remove the interfacial peeling or crack phenomenon, the joint surface (5a), downward inclined surface (5b) and flat The bottom of the surface 5c is directly exposed to the outside air to maximize its heat dissipation efficiency, thereby improving the quality and reliability of the product.
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| KR1019940018499A KR0156515B1 (en) | 1994-07-28 | 1994-07-28 | Semiconductor package |
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St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 20130723 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE |
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| PC1903 | Unpaid annual fee |
St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 20130723 |
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| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |