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KR100290784B1 - 스택 패키지 및 그 제조방법 - Google Patents

스택 패키지 및 그 제조방법 Download PDF

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Publication number
KR100290784B1
KR100290784B1 KR1019980037931A KR19980037931A KR100290784B1 KR 100290784 B1 KR100290784 B1 KR 100290784B1 KR 1019980037931 A KR1019980037931 A KR 1019980037931A KR 19980037931 A KR19980037931 A KR 19980037931A KR 100290784 B1 KR100290784 B1 KR 100290784B1
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KR
South Korea
Prior art keywords
metal wire
encapsulant
ceramic capsule
semiconductor chip
exposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019980037931A
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English (en)
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KR20000019697A (ko
Inventor
박상욱
조순진
Original Assignee
박종섭
현대전자산업주식회사
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Filing date
Publication date
Application filed by 박종섭, 현대전자산업주식회사 filed Critical 박종섭
Priority to KR1019980037931A priority Critical patent/KR100290784B1/ko
Priority to US09/393,869 priority patent/US6222259B1/en
Priority to TW088115723A priority patent/TW429567B/zh
Priority to JP26066299A priority patent/JP3752508B2/ja
Publication of KR20000019697A publication Critical patent/KR20000019697A/ko
Application granted granted Critical
Publication of KR100290784B1 publication Critical patent/KR100290784B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

본 발명은 스택 패키지 및 그 제조 방법을 개시한다. 개시된 본 발명은, 양측에 돌출부(52)가 형성된 세라믹 캡슐(50)의 상하부면 각각에 상하부 반도체 칩(30,40)이 접착되고, 하부 반도체 칩(40)의 밑면에 방열판(80)이 부착된다. 각 반도체 칩(30,40)의 패드(31,41)는 상부면에 위치하고, 특히 하부 반도체 칩(40)의 패드(41)는 세라믹 캡슐(50)의 양측으로 노출된다. 각 반도체 칩(30,40)의 패드(31,41)가 금속 와이어(100)로 연결되고, 금속 와이어(100)의 중간은 세라믹 캡슐(50)의 돌출부(52)상에 얹혀진다. 전체가 봉지제(120)로 몰딩되는데, 봉지제(120)의 상부면은 세라믹 캡슐(50)의 돌출부(52) 상단과, 하부면은 방열판(80)과 동일 평면을 이루도록 몰딩되어서, 세라믹 캡슐(50)의 돌출부(52) 상단에 얹혀진 금속 와이어(100)가 노출된다. 노출된 금속 와이어(100)에 범프(140)가 형성되고, 범프(140)에 솔더 볼(150)이 부착된다.

Description

스택 패키지 및 그 제조 방법
본 발명은 반도체 패키지, 특히 적어도 2개 이상의 반도체 소자를 칩 적층(Stack)하여 하나의 패키지로 구성한 스택 패키지 및 그 제조방법에 관한 것이다.
메모리 칩의 용량 증대는 빠른 속도로 진행되고 있다. 현재는 128M DRAM이 양산 단계에 있으며, 256M DRAM의 양산도 가까운 시일안에 도래할 것으로 보인다.
메모리 칩의 용량 증대, 다시말하면 고집적화를 이룰 수 있는 방법으로는 한정된 반도체 소자의 공간내에 보다 많은 수의 셀을 제조해 넣는 기술이 일반적으로 알려지고 있으나, 이와 같은 방법은 정밀한 미세 선폭을 요구하는 등 고난도의 기술과 많은 개발시간을 필요로 한다. 따라서 최근, 보다 쉬운 방법으로 고집적화를 이룰 수 있는 스택킹(Stacking) 기술이 개발되어 이에 대한 연구가 활발히 진행되고 있다.
반도체 업계에서 말하는 스택킹이란 적어도 2개 이상의 반도체 소자를 수직하게 쌓아 올려 메모리 용량을 배가시키는 기술로써, 이러한 스택킹에 의하면, 예를 들어 2개의 64M DRAM급 소자를 적층하여 128M DRAM급으로 구성할 수 있고, 또 2개의 128M DRAM급 소자를 적층하여 256M DRAM급으로 구성할 수 있다.
상기와 같은 스택킹에 의한 패키지의 전형적인 예가 도 1 및 도 2에 도시되어 있는 바, 이를 간단히 살펴보면 다음과 같다.
먼저, 도 1에 도시된 바와 같이, 패드가 상부면에 배치된 반도체 칩(1)에 리드 프레임(2)의 인너 리드(21)가 접착제(3)로 부착되고, 이 인너 리드(21)는 패드에 금속 와이어(4)로 연결되어 있다. 전체가 봉지제(5)로 몰딩되면, 리드 프레임(2)의 아우터 리드(22)가 봉지제(5)의 양측으로 돌출되어 있다.
이러한 하나의 패키지상에 동일 구조의 패키지가 적층된다. 즉, 상부에 적층되는 패키지의 아우터 리드(22)가 하부 패키지의 리드 프레임(2) 중간에 접합되어서, 전기적 연결이 되어 있다.
그러나, 상기와 같은 일반적인 스택 패키지는, 패키지의 전체 두께가 너무 두껍다는 단점이 있다. 또한, 상부 패키지의 신호 전달 경로가, 상부 패키지의 아우터 리드를 통해서 하부 패키지의 리드 프레임을 거쳐야 하기 때문에, 전기적인 신호 경로가 너무 길다는 단점도 있다. 특히, 상하부 패키지의 리드를 납땜으로 접합하는데, 이 납땜 불량으로 접속 불량이 자주 야기되었다.
이를 해소하기 위해서, 종래에는 도 2에 도시된 스택 패키지가 제시되었다. 도시된 바와 같이, 상하부 반도체 칩(1a,1b)가 소정 간격을 두고 배치되고, 상부 반도체 칩(1a)의 밑면에 상부 리드 프레임(2a)의 인너 리드(21a)가 부착되어, 금속 와이어(3a)에 의해 패드에 연결되어 있다. 또한, 하부 반도체 칩(1b)의 상부면에 하부 리드 프레임(2b)의 인너 리드(21b)가 부착되어, 금속 와이어(4a)에 의해 패드에 연결되어 있다. 즉, 상부 반도체 칩(1a)의 패드는 하부면에, 하부 반도체 칩(1b)의 패드는 상부면에 배치되어, 각 반도체 칩(1a)은 대칭을 이루게 된다.
상부 리드 프레임(1a)의 아우터 리드(22a)는 하부 리드 프레임(2b)의 중간에 레이저로 접착되어 있고, 하부 리드 프레임(2b)의 아우터 리드(22b)가 봉지제(5a)의 외부로 돌출되어 있다.
그러나, 상기와 같이 도 2에 도시된 스택 패키지도 다음과 같은 문제점을 안고 있다.
우선, 신호 전달 경로는 줄어들었지만, 각 리드 프레임간의 거리가 너무 가까워서, 동작중에 신호 간섭이 발생될 소지가 많다.
또한, 각 리드 프레임이 대향되게 배치되어 있기 때문에, 리드 프레임간의 공차로 인한 불량 발생 소지가 높다. 그리고, 리드 프레임간을 레이저로 접합시키기 때문에, 고가의 레이저 장비가 필요하게 되고, 특히 각 리드 프레임이 반영구적으로 접합되는 관계로, 이후의 보수 작업이 거의 불가능하게 된다. 더욱이, 칩의 크기가 변경되면, 그에 따라 리드 프레임을 새로 제작해야만 한다.
부가적인 문제점으로는, 각 반도체 칩이 봉지제의 내부에 위치하고 있기 때문에, 구동중에 열 발산이 효과적으로 이루어지지 않는다. 즉, 방열판 기능을 하는 히트 싱크(heat sink)를 설치할 부분이 없으므로, 방열이 제대로 이루어지지 않게 된다.
따라서, 본 발명은 상기와 같은 문제점을 해소하기 위해 안출된 것으로서, 전체 두께는 증가시키지 않으면서 신호 전달 경로를 짧게 하고, 리드 프레임간의 신호 간섭을 방지할 수 있는 스택 패키지 및 그의 제조 방법을 제공하는데 목적이 있다.
다른 목적은 리드 프레임 사용을 배제하므로써, 리드 프레임간의 공차로 인한 불량 발생이 근본적으로 방지되고, 칩 크기 변경에 따라 리드 프레임을 새로 제작하지 않아도 되며, 하자 보수 작업도 용이하게 하는데 있다.
도 1 및 도 2는 종래의 스택 패키지를 나타낸 단면도
도 3 내지 도 10은 본 발명의 실시예 1에 따른 스택 패키지 제조 과정을 순차적으로 나타낸 단면도
도 11 내지 도 13은 본 발명의 실시예 2에 따른 스택 패키지를 나타낸 단면도
도 14는 본 발명의 실시예 3에 따른 스택 패키지를 나타낸 단면도
도 15는 본 발명의 실시예 4에 따른 스택 패키지를 나타낸 단면도
도 16은 본 발명의 실시예 5에 따른 스택 패키지를 나타낸 단면도
도 17은 본 발명의 실시예 6에 따른 스택 패키지를 나타낸 단면도
- 도면의 주요 부분에 대한 부호의 설명 -
30 - 상부 반도체 칩 31,41 - 패드
40 - 하부 반도체 칩 50 - 세라믹 캡슐
52 - 돌출부 80 - 방열판
100 - 금속 와이어 120 - 봉지제
140 - 범프 150 - 솔더 볼
상기와 같은 목적을 달성하기 위한 본 발명에 따른 스택 패키지는 다음과 같은 구성으로 이루어진다.
양측에 돌출부가 형성된 세라믹 캡슐의 상하부면 각각에 상하부 반도체 칩이 접착되고, 하부 반도체 칩의 밑면에 방열판이 부착된다. 각 반도체 칩의 패드는 상부면에 위치하고, 특히 하부 반도체 칩의 패드는 세라믹 캡슐의 양측으로 노출된다. 각 반도체 칩의 패드가 금속 와이어로 연결되고, 금속 와이어의 중간은 세라믹 캡슐의 돌출부상에 얹혀진다. 전체가 봉지제로 몰딩되는데, 봉지제의 상부면은 세라믹 캡슐의 돌출부 상단과, 하부면은 방열판과 동일 평면을 이루도록 몰딩되어서, 세라믹 캡슐의 돌출부 상단에 얹혀진 금속 와이어가 노출된다. 노출된 금속 와이어에 범프가 형성되고, 범프에 솔더 볼이 부착된다.
상기된 본 발명의 구성에 의하면, 세라믹 캡슐을 사이에 두고 상하부 반도체 칩이 배치되고, 각 패드가 리드 프레임이 아닌 금속 와이어로 연결되고, 봉지제에서 노출된 금속 와이어에 솔더 볼이 부착되므로써, 신호 간섭이 발생될 소지가 전혀 없어지게 되고, 금속 와이어는 떼어내기가 용이하므로 보수 작업도 한결 수월해지게 된다.
이하, 본 발명의 바람직한 실시예를 첨부도면에 의거하여 설명한다.
<실시예 1>
도 3 내지 도 10은 본 발명의 실시예 1에 따른 스택 패키지 제조 공정을 순차적으로 나타낸 단면도이다.
먼저, 도 4에 도시된 바와 같은 세라믹 캡슐(50)을 준비한다. 세라믹 캡슐(50)은 양측으로 돌출부(52)가 형성되고, 저면에는 다수의 구멍(51)이 형성된 형상이다.
도 3과 같이, 패드(31)가 상부면에 배치된 상부 반도체 칩(30)을 양 돌출부(52) 사이로 진입시켜 세라믹 캡슐(50)의 저면에 안착시킨다. 패드(41)가 세라믹 캡슐(50)의 양측으로 노출될 정도의 폭을 갖는 하부 반도체 칩(40)을 접착제(60)를 매개로 세라믹 캡슐(50)의 하부면에 접착한다. 이때, 접착제(60)은 하부 반도체 칩(40)에 의해 눌려지면서, 세라믹 캡슐(50)의 저면에 형성된 구멍(51)들을 통해 상부 반도체 칩(30)의 하부면으로 스며들어가게 되므로써, 상부 반도체 칩(30)도 세라믹 캡슐(50)의 저면상에 접착된다. 그런 다음, 방열판(80)을 접착제(70)를 사용해서 하부 반도체 칩(40)의 하부면에 부착한다.
그런 다음, 도 5에 도시된 바와 같이, 각 반도체 칩(30,40)의 패드(31,41)들을 금속 와이어(100)로 연결하여, 각 반도체 칩(30,40)을 전기적으로 연결시킨다. 이때, 금속 와이어(100)는 세라믹 캡슐(50)의 돌출부(52)를 타고 넘게 된다.
이어서, 도 6에 도시된 바와 같이, 전체를 상하부 몰드 다이(110,111) 사이의 캐비티내에 위치시키고, 캐비티내로 봉지제를 플로우시켜 몰딩한다. 이때, 방열판(80)의 양단이 상하부 몰드 다이(110,111)의 계면 사이에 끼워지고, 돌출부(52)는 상부 몰드 다이(110)의 캐비티 상부벽에 맞대어지게 된다. 즉, 금속 와이어(100)의 중간이 돌출부(52)상에 눌려지게 되고, 그 사이로는 봉지제가 거의 도포되지 않게 되므로써, 금속 와이어(100)의 중간이 상부로 노출된다.
그런 다음, 금속 와이어(100)의 중간부를 보다 확실하게 노출시키기 위해서, 도 7에 도시된 바와 같이, 봉지제(120)의 상부면에 노즐(130)로부터 연마제를 분사하여 봉지제(120)를 일정 두께로 제거하므로써, 금속 와이어(100)를 노출시킨다. 여기서, 연마제 대신에 연마 페이퍼를 사용해서 연마해도 무방하다.
또한, 도 8에 도시된 바와 같이, 방열판(80)의 하부면도 노출되도록 하기 위해서, 전체를 뒤집은 다음, 방열판(80)의 하부면에 연마제를 분사하여 연마한다.
이어서, 노출된 금속 와이어(100)의 중간부에 범프(40)를 형성하고, 범프(40)에 솔더 볼(150)을 부착하면, 본 실시예 1에 따른 도 10에 도시된 스택 패키지가 완성된다.
<실시예 2>
도 11 내지 도 13은 본 발명의 실시예 2에 따른 스택 패키지 제조 과정을 순차적으로 나타낸 단면도이다.
본 실시예 2는 솔더 볼(150)의 접착력을 강화시키기 위한 방안으로서, 도 11에 도시된 바와 같이, 세라믹 캡슐의 돌출부(52) 상단에 볼 랜드(53)를 형성하고, 금속 와이어(100)를 볼 랜드(53)내에 끼운다. 그리고, 범프(140)를 볼 랜드(53)내로 진입시켜서 금속 와이어(100)에 부착하고, 볼 랜드(53)의 내부를 솔더 페이스트(160)로 채운다.
그런 다음, 도 12에 도시된 점선을 기준으로 봉지제(120)와 돌출부(52) 및 솔더 페이스트(160)를 연마하여 제거하면, 범프(140)가 노출된다. 이렇게 노출된 범프(140)에 도 13와 같이 솔더 볼(150)을 부착하게 되면, 솔더 볼(150)의 부착력이 한층 강화된다.
한편, 솔더 볼(150)의 접착력을 한층 더 강화시키기 위해서, 도 12에 도시된 바와 같이, 볼 랜드(53)의 내벽에 도금막(170)을 형성하는 것도 바람직하다.
<실시예 3>
도 14는 본 실시예 3에 따른 스택 패키지를 나타낸 것으로서, 도시된 바와 같이, 다른 구조는 상기 실시예 1 및 2와 동일하고, 다만 방열판만이 없는 구조로서, 봉지제(121)가 하부 반도체 칩(40)의 상부면에만 도포된다. 즉, 하부 반도체 칩(40)의 몰드 다이의 캐비티 저면에 안착되어서, 그 상부에만 봉지제(121)가 도포된다.
<실시예 4>
도 15는 본 실시예 4에 따른 스택 패키지를 나타낸 것으로서, 실시예 3에 따른 스택 패키지와 구조는 동일하지만, 제조 공정은 상이하다.
도 15에는 도시되지는 않았지만, 하부 반도체 칩(40)의 하부면에는 더미판이 부착되고, 더미판이 몰드 다이의 캐비티 저면에 안착된 상태에서 봉지제(122)로 몰딩된다. 그런 다음, 하부 반도체 칩(40)의 하부면을 기준으로 하여 연마하면, 더미판이 제거되어 도 15와 같은 스택 패키지가 완성된다.
<실시예 5>
본 실시예 5는 하나의 스택 패키지에 다른 스택 패키지를 하나 더 스택킹하는 방안으로서, 도 16에 도시된 바와 같이, 도 14 또는 도 15에 도시된 패키지를 뒤집은 상태에서 하부 반도체 칩(40)의 상부면에 리드 프레임(90)을 접합하고, 금속 와이어(180)로 리드 프레임(90)과 하부 반도체 칩(40)의 패드(41)를 연결한다.
리드 프레임(90)은 상부로 노출된 상태이므로, 상기와 동일 구조의 스택 패키지의 솔더 볼(150)을 리드 프레임(90)에 연결하면, 2개의 스택 패키지가 적층된 구조가 된다. 이와 같이 되면, 스택 패키지를 계속해서 적층하는 것이 가능하다.
<실시예 6>
본 실시예 6은 몰딩 공정을 배제하는 방안으로서, 하나의 기판(220)상에 도 14 또는 도 15에 도시된 스택 패키지 여러 개가 배치되어서, 각 스택 패키지의 솔더 볼(150)이 기판(220)에 실장된다. 즉, 멀티 칩 패키지이다.
기판(220) 상부에 세라믹 캡슐(200)이 씌워져서, 접착제(210)로 기판(220)에 부착되므로써, 각 스택 패키지가 세라믹 캡슐(200)의 내부에 위치하게 된다. 기판(220)의 하부면에는 여러 개의 솔더 볼(230)이 부착되어서, 메인 기판에 실장을 할 수가 있게 되어 있다.
이상에서 설명한 바와 같이 본 발명에 의하면, 세라믹 캡슐을 사이에 두고 상하부 반도체 칩이 배치되어서 금속 와이어로 연결되므로써, 신호 전달 경로는 짧게 유지하면서 신호 간섭이 배제되는 효과가 있다.
또한, 하부 반도체 칩의 저면이 노출되게 되므로써, 열 발산 특성이 향상되고, 특히 노출된 반도체 칩에 방열판이 부착하는 것이 가능하게 된다.
이상에서는 본 발명에 의한 스택 패키지를 실시하기 위한 바람직한 실시예에 대하여 도시하고 또한 설명하였으나, 본 발명은 상기한 실시예에 한정되지 않고, 이하 청구범위에서 청구하는 본 발명의 요지를 벗어남이 없이 당해 발명이 속하는 분야에서 통상의 지식을 가진자라면 누구든지 다양한 변경 실시가 가능할 것이다.

Claims (8)

  1. 양측에 돌출부가 형성된 세라믹 캡슐;
    패드가 상부를 향하도록, 상기 세라믹 캡슐의 상부면에 접착된 상부 반도체 칩;
    패드가 상기 세라믹 캡슐의 양측에서 상부를 향하도록, 상기 세라믹 캡슐의 하부면에 접착된 하부 반도체 칩;
    양단이 각 반도체 칩에 연결되고, 중간은 상기 세라믹 캡슐의 돌출부 상단에 얹혀지는 금속 와이어;
    상기 세라믹 캡슐의 돌출부 상단에 얹혀진 금속 와이어가 노출되도록, 전체를 몰딩하는 봉지제;
    상기 봉지제에서 노출된 금속 와이어에 형성된 범프; 및
    상기 범프에 부착된 솔더 볼을 포함하는 것을 특징으로 하는 스택 패키지.
  2. 제 1 항에 있어서, 상기 세라믹 캡슐의 돌출부 상단에 오목하게 볼 랜드가 형성되고, 상기 볼 랜드에 금속 와이어가 끼워진 것을 특징으로 하는 스택 패키지.
  3. 제 2 항에 있어서, 상기 볼 랜드의 내벽에 도금막이 형성되고, 상기 도금막에 금속 와이어가 접촉된 것을 특징으로 하는 스택 패키지.
  4. 제 1 항에 있어서, 상기 봉지제에서 노출된 하부 반도체 칩의 밑면에 방열판이 부착된 것을 특징으로 하는 스택 패키지.
  5. 제 1 항에 있어서, 상기 봉지제에서 노출된 하부 반도체 칩의 밑면에 리드 프레임이 부착되고, 상기 리드 프레임은 금속 와이어로 하부 반도체 칩의 패드에 연결되어서, 상기 리드 프레임에 다른 스택 패키지의 솔더 볼이 부착되어 적층되는 것을 특징으로 하는 스택 패키지.
  6. 제 1 항에 있어서, 상기 세라믹 캡슐의 저면에 다수의 구멍이 형성되어, 상기 구멍을 통해 접착제가 흐를 수 있도록 하여, 하나의 접착제로 상기 상하부 반도체 칩을 세라믹 캡슐에 접착하게 한 것을 특징으로 하는 스택 패키지.
  7. 양측에 돌출부가 형성된 세라믹 캡슐의 상하부면 각각에 상하부 반도체 칩을 접착하는 단계;
    상부를 향해 배치된 상기 각 반도체 칩의 패드를 세라믹 캡슐의 돌출부를 타고 넘는 금속 와이어로 연결하여, 상기 금속 와이어의 중간부가 돌출부상에 얹혀지도록 하는 단계;
    상기 세라믹 캡슐의 돌출부상에 얹혀진 금속 와이어의 중간부가 노출되도록, 전체를 봉지제로 몰딩하는 단계;
    상기 노출된 금속 와이어에 범프를 형성하는 단계; 및
    상기 범프에 솔더 볼을 부착하는 단계를 포함하는 것을 특징으로 하는 스택 패키지 제조 방법.
  8. 제 7 항에 있어서, 상기 봉지제로 몰딩하는 단계 전에, 상기 세라믹 캡슐의 돌출부 상단에, 상기 금속 와이어가 끼워지는 볼 랜드를 오목하게 형성하고, 상기 볼 랜드내에 범프를 끼워서 금속 와이어에 접촉시키고, 볼 랜드내를 솔더 페이스트로 도포하며, 전체를 상기 봉지제로 몰딩한 후에, 상기 범프가 노출되도록 봉지제와 솔더 페이스트를 연마하는 단계를 추가로 포함하는 것을 특징으로 하는 스택 패키지 제조 방법.
KR1019980037931A 1998-09-15 1998-09-15 스택 패키지 및 그 제조방법 Expired - Fee Related KR100290784B1 (ko)

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US09/393,869 US6222259B1 (en) 1998-09-15 1999-09-10 Stack package and method of fabricating the same
TW088115723A TW429567B (en) 1998-09-15 1999-09-13 Stack package and method of fabricating the same
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