KR101991675B1 - Liquid crystal display device - Google Patents

Abstract

More particularly, the present invention relates to a liquid crystal display device, in which a gate driver is formed in a first non-display area in which a data driver is formed, and a second non- And a switching section capable of turning on and off each of the gate lines is formed in at least one of the third non-display region and the fourth non-display region between the display regions. do. To this end, a liquid crystal display device according to the present invention includes: a panel having four non-display areas formed on the outer periphery of a display area; A data driver formed in a first non-display area of the non-display area to drive data lines formed in a first direction in the display area; A gate driver formed in a second non-display area of the non-display area opposite to the first non-display area to drive gate lines formed in a second direction perpendicular to the first direction in the display area; A timing controller for driving the data driver and the gate driver; And a third non-display region or a fourth non-display region located between the first non-display region and the second non-display region, wherein the gate lines are sequentially turned on and off Wherein the display region includes connection lines extending from the gate driver and formed in parallel with the data lines, the gate lines being connected to the gate lines.

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display capable of realizing a narrow bezel and a driving method thereof.

Flat panel displays (FPDs) are used in various types of electronic products including mobile phones, tablet PCs, and notebook computers. The flat panel display includes a liquid crystal display (LCD), a plasma display panel (PDP), and an organic electroluminescence display (OLED). Recently, an electrophoretic display device EPD: ELECTROPHORETIC DISPLAY) is also widely used.

In particular, a liquid crystal display (LCD) is an apparatus for displaying an image using optical anisotropy of a liquid crystal, and is widely used because of its advantages such as thinness, small size, low power consumption and high image quality.

Research on liquid crystal display devices can be divided into a technical aspect and a design aspect. Particularly, in recent years, the need for research and development in a design aspect that can appeal to consumers has been particularly emphasized.

Accordingly, efforts to minimize (thin) the thickness of the liquid crystal display device have been steadily progressing.

In addition, research on a narrow bezel in which the rim portion of the liquid crystal display device is narrowly formed has been actively conducted. That is, instead of minimizing the left and right edge portions of the front face of the liquid crystal display device in which no image is output, a technique for providing a wider and larger image to the user by increasing the output portion of the image has been actively researched.

1 is an exemplary view showing a configuration of a conventional liquid crystal display device.

1, the conventional liquid crystal display device includes a panel 10 formed of a display area for outputting an image and a non-display area around the display area, a gate driver 20 for driving a gate line formed on the panel A data driver 30 for driving the data lines formed on the panel, and a timing controller 40 for driving the data driver and the gate driver.

The data driver 30 is generally mounted on an IC area of a TCP (Tape Carrier Package) or mounted on a TCP base film 60 by a COF (Chip On Film) Is connected to the panel (10). The data driver is mounted on the upper or lower end of the non-display area, as shown in Fig.

The gate driver 20 may be mounted on an IC area of a TCP (Tape Carrier Package), mounted on a base film of TCP by a COF (Chip On Film) method, and connected to a panel by a TAB (Tape Automated Bonding) , Or may be formed in a non-display area by a GIP (Gate In Panel) method, as shown in FIG. The gate driver 20 is generally disposed in a direction perpendicular to the data driver. That is, since the gate line and the data line are formed perpendicular to each other on the panel 10, the gate driver 20 and the data driver 30 are also arranged in the directions perpendicular to each other in the non-display area.

In particular, recently, as the width of the liquid crystal display device increases, the gate driver 20 for driving the gate lines is formed symmetrically in the left and right non-display regions of the liquid crystal display device, as shown in FIG.

Each of the left and right non-display areas of the GIP type liquid crystal display device is divided into a GND + Scribe area (a), a GIP signal area (b), a GIP circuit part area (c) (d).

The left and right non-display areas of the liquid crystal display device using the TCP, COF, and COG (Chip On Glass) methods other than the GIP method are also composed of the above four areas.

Even in the liquid crystal display device configured as described above, Narrow Bezel technology which minimizes left and right non-display areas has been continuously studied.

For Narrow Bezel, a technique for reducing the size of the GIP circuit region (c) is widely used. However, the method of reducing the size of the GIP circuit portion region (c) is becoming more and more limited.

As an alternative, a method for reducing the width of the Vcom region (d) in which the common line for applying the common voltage Vcom to the display region is formed is being studied. However, when the Vcom area d is reduced, factors such as horizontal crosstalk are deteriorating the quality of the liquid crystal display device. Therefore, the method of reducing the Vcom region (d) is also approaching the limit.

In addition, a method of reducing the ground and scribe area (a) or the GIP signal area (b) formed to apply a signal to the GIP is also limited.

A gate driver for applying a scan signal to a gate line includes a first non-display region in which a data driver is formed and a second non-display region in which a data driver is formed, Display region and a fourth non-display region between the first non-display region and the second non-display region, A liquid crystal display device comprising: a substrate;

According to an aspect of the present invention, there is provided a liquid crystal display device including: a panel having four non-display areas formed on an outer periphery of a display area; A data driver formed in a first non-display area of the non-display area to drive data lines formed in a first direction in the display area; A gate driver formed in a second non-display area of the non-display area opposite to the first non-display area to drive gate lines formed in a second direction perpendicular to the first direction in the display area; A timing controller for driving the data driver and the gate driver; And a third non-display region or a fourth non-display region located between the first non-display region and the second non-display region, wherein the gate lines are sequentially turned on and off Wherein the display region includes connection lines extending from the gate driver and formed in parallel with the data lines, the gate lines being connected to the gate lines.

A gate driver for applying a scan signal to a gate line is formed in a first non-display region in which a data driver is formed in a non-display region, and a second non-display region in a second non- And the fourth non-display region between the first non-display region and the second non-display region, a switching section capable of turning on and off each of the gate lines is formed. Therefore, The non-display area of the super narrow bezel can be minimized to realize a super narrow bezel.

In addition, since the size of the Vcom region can be minimized while minimizing the non-display region on the left and right sides of the liquid crystal display device, quality degradation factors such as horizontal crosstalk can be prevented in advance.

1 is an exemplary view showing a configuration of a conventional liquid crystal display device.
2 is a configuration diagram of a liquid crystal display device according to a first embodiment of the present invention.
3 is an exemplary view showing a panel configuration of a liquid crystal display device according to the present invention.
4 is a configuration diagram of a liquid crystal display device according to a second embodiment of the present invention;
5 is a configuration diagram of a liquid crystal display device according to a third embodiment of the present invention.
6 to 8 are various configuration views of a liquid crystal display device according to fourth to sixth embodiments of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a configuration diagram of a liquid crystal display device according to a first embodiment of the present invention. 3 is an exemplary view showing a panel configuration of a liquid crystal display device according to the present invention, and is an example of a configuration of a panel driven by a DRD method.

2, the liquid crystal display according to the first embodiment of the present invention includes a panel 100 (see FIG. 2) in which four non-display areas 921, 922, 923, and 924 are formed on the outer periphery of a display area 910 Display area 921 of the non-display area to drive the data lines DL1 to DLm formed in the first direction (vertical axis direction) in the display area, Display region (921) among the non-display regions to drive gate lines (GL1 to GLn) formed in a second direction (horizontal axis direction) perpendicular to the first direction in the display region, A timing controller 400 for driving the data driver 300 and the gate driver 200, and a second non-display region 922 formed in the second non-display region 922, And a third non-display area between the second non-display area and the second non- Is formed at least on any one area of, includes a first switching unit in the gate lines, each of which may be turned on and off sequentially.

In the display area 100, the connection lines 210 connected to the gate lines GL1 to GLn extend from the gate driver 200 and are aligned with the data lines.

The third non-display area 923 and the fourth non-display area 924 formed between the first non-display area 921 and the second non-display area 922 are formed in the display area 100, A common voltage region 500 (d) through which lines for applying a common voltage is formed.

Signal lines 251 for applying a signal output from the timing controller 400 to the gate driver 200 pass through the third non-display area 923 and the fourth non-display area 924, respectively A signal region b is formed.

A ground and a scribe area (a) are formed at the outermost portions of the third non-display area 923 and the fourth non-display area 924.

The second non-display region may further include a second switching unit capable of sequentially turning on and off each of the gate lines.

The panel 100 includes a thin film transistor TFT formed for each region defined by the intersection of the gate lines GL1 through GLn and the data lines DL1 through DLm and a pixel PXL including the pixel electrode. Respectively. A common electrode for receiving a common voltage from common voltage regions 500 (d) is formed in each pixel of the panel.

The panel 100 applied to the present invention uses double rate driving (hereinafter, simply referred to as DRD). The DRD method is one method for reducing the number of data drivers (data drive ICs) 300 of a liquid crystal display device. In this case, the number of gate lines is doubled, but the number of data lines is reduced to 1/2, The number of data drive ICs 300 is reduced to half, and the same resolution can be realized.

That is, as shown in FIG. 3, the liquid crystal display according to the present invention includes P (P is a natural number equal to or greater than 2) liquid crystal cells arranged on one horizontal line of the panel 100 to two gate lines and P / 2 (= m) data lines.

The DRD scheme drives the data driver (data drive IC) 300 in a vertical two-dot-inversion manner in order to minimize flicker and reduce power consumption. Thus, two adjacent data lines The pixels are each connected to two gate lines to charge the same polarity data voltage supplied through the data lines. The DRD scheme is a commonly used technology, and a detailed description thereof will be omitted.

Meanwhile, in the present invention, a connection line 210 is formed in a space left by using the DRD method. That is, in the DRD method, the data lines are reduced in half compared to the conventional method. Thus, in the present invention, the connection lines 210 are formed at positions where the data lines corresponding to the remaining half are formed.

Next, the gate driver 200 supplies the scan signals to the gate lines using the gate control signals GCS generated in the timing controller 400. In response to the scan signal, the thin film transistors (TFT) of the liquid crystal panel 100 are driven in units of horizontal lines.

The gate driver 200 is formed in a second non-display area 922 facing the first non-display area 921 in which the data driver 300 is formed, as shown in FIG. That is, in the conventional liquid crystal display device, the gate driver is formed in the third non-display area 923 or the fourth non-display area 924. However, in the present invention, the gate driver is opposed to the data driver 300 And is formed in the second non-display area 922.

In the first embodiment of the present invention, as described above, the connection lines 210 extending from the gate driver 200 formed in the second non-display area 922 are arranged in parallel with the data lines in the display area As shown in Fig. Each of the connection lines 210 is connected in a one-to-one relationship with the gate lines. That is, the connection lines 210 are formed on the display region 910 in a state of being perpendicular to the gate lines.

Accordingly, the scan signals sequentially output from the gate driver 200 are sequentially output through the connection line 210, and are sequentially output to the gate lines connected to the connection lines 210.

Next, the data driver 300 converts the digital data transmitted from the timing controller 400 into an analog data voltage. The data driver 300 supplies a data voltage of one horizontal line to the data lines in each horizontal period in which a scan signal is supplied to the gate line. That is, the data driver 300 converts the digital data into analog data voltages using the gamma voltages supplied from the gamma voltage generator (not shown), and outputs the analog data voltages to the data lines.

To this end, the data driver 300 includes a shift register unit (not shown), a latch unit, a digital-analog converter (DAC), and an output buffer.

The data driver 300 applied to the present invention is formed in the first non-display area 921 facing the second non-display area 922 in which the gate driver 200 is formed.

The data lines DL1 to DLm extending from the data driver 300 are perpendicular to the gate lines GL1 to GLn and parallel to the connection lines 210 extending from the gate driver 200 .

The data driver 300 may be formed on the first non-display area 921 by a COG (Chip On Glass) method, but may be mounted on an IC area of a TCP (Tape Carrier Package) (Chip On Film) method, and may be formed on the first non-display region 921 by a TAB (Tape Automated Bonding) method.

Next, the timing controller 400 receives a timing signal input from an external system, that is, a dot clock DCLK, a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, and a data enable A gate control signal GCS for controlling the operation timing of the gate driver 200 and a data control signal DCS for controlling the operation timing of the data driver 300 are generated using the signal DE, And supplies the image data to the data driver 300.

The gate control signal GCS generated in the timing controller 400 includes a gate start pulse GSP, a gate shift clock GSC, a gate output enable signal GOE, a gate start signal VST, a gate clock GCLK ).

The data control signals generated by the timing controller 400 include a source start pulse SSP, a source shift clock signal SSC, a source output enable signal SOE, a polarity control signal POL, and the like.

Next, the first switching unit switches between at least one of the third non-display area 923 and the fourth non-display area 924 between the first non-display area 921 and the second non- And sequentially turns on and off each of the gate lines.

To this end, the first switching unit is turned on by a scan signal transmitted from the connection line through a gate line connected to the connection line 210, and applies a scan signal transmitted from the timing controller to the gate line And a first switch 250 for switching on and off. Here, the first switch 250 may be formed of a transistor.

That is, the first switching unit switches the signal line 251 formed in the signal region b to the gate driver 200 in order to transmit the gate high voltage VGH corresponding to the scan signal from the timing controller 400, And first switchers (transistors) 250 connected to the respective gate lines.

Each of the first switches 250 is connected to the signal line 251 and the gate line as described above and the gate terminal of the first switch 250 is connected to the first switch 250 Which is connected to the gate line.

Accordingly, when a scan signal (gate high voltage VGH) is input to the gate line through the connection line 210 connected to the gate line connected to the first switch 250, The scan signal of the high level is also input to the gate of the scan line driver 250. [ Accordingly, the first switch 250, which is turned on by the high level signal, is also turned on.

Since the first switch 250 is connected to the signal line 251 to which the gate high voltage VGH corresponding to the scan signal is applied, the gate high voltage VGH transmitted through the signal line Is also applied to the gate line to which the first switching device is connected through the first switching device 250.

That is, when a scan signal is input to the gate line through the connection line 210, another scan signal is input to the gate line through the first switch 250.

As described above, the first embodiment of the present invention supplies two scan signals to one gate line through the switching device (transistor) 250 and the connection line 210 because the scan To increase the signal.

Recently developed liquid crystal display devices are manufactured in such a manner that the length of the horizontal direction is longer than the vertical length. Therefore, the scan signals applied to the gate line through the connection line 210 connected to the gate line in the left direction of the gate line in FIG. 4 are distorted due to noise generated while being transmitted in the right direction of the gate line, The scan signal itself may be weakened. In addition, the scan signals applied to the gate line through the connection line 210 connected to the gate line in the right direction of the gate line are distorted due to noise generated while being transmitted in the left direction of the gate line, May be weak.

Therefore, in order to compensate for the above-described weakening of the scan signal, the first embodiment of the present invention applies two scan signals to one gate line.

In addition, as described above, since the first switching unit including the first switch 250 can be formed not only in the third non-display area 923 but also in the fourth non-display area 924, The scan signal applied to the gate line of the scan driver may be substantially three.

In this case, the scan signals input through the connection line 210 and the first switch 250 are applied to the one gate line at the same timing.

Lastly, in order to increase the scan signal as described above, the first embodiment of the present invention includes a first non-display region 921, a second non-display region 921, and a second non- And may further include a switching unit.

The second switching unit 260 includes a second switching unit 260 for applying a scan signal, which is turned on by the scan signal transmitted from the connection line 210, to the gate line to which the connection line is connected, ). Here, the second switches 260 may also be composed of transistors.

To this end, in the first non-display area 921, a gate high voltage (VGH) corresponding to the scan signal is transmitted from the timing controller 400 to the gate driver 200, And a transmission line 261 connected to the formed signal line is formed.

Each of the second switches 260 is connected between the connection line 210 and the transmission line 261. The gate terminals of the transistors constituting the second switch 260 are connected to the connection line 210, respectively.

Accordingly, when a scan signal (gate high voltage VGH) is input to the gate line connected to the connection line through the connection line 210 connected to the second switch 260, The scan signal of the high level is also input to the gate of the scan driver 260. [ Therefore, the second switch 250, which is formed to be turned on by the high level signal, is also turned on.

Since the second switch 260 is connected to the transmission line 261 to which the gate high voltage VGH corresponding to the scan signal is applied, the gate high voltage VGH transmitted through the transmission line 261 (Scan signal) is also applied to the connection line 210 connected to the second switching unit 260 through the second switching unit 260, .

That is, when a scan signal is input to the gate line through the connection line 210, another scan signal is input to the gate line through the second switch 260.

The reason why the two scan signals are applied to one gate line through the second switch 260 and the connection line 210 is that the first switch 250 switches the two or three scan signals Is applied to one gate line.

In particular, when both the first switching unit formed in the third non-display area and the fourth non-display area and the second switching unit formed in the first non-display area are provided, one connection line 210 When the scan signal is input to one gate line, both of the first switch 250 formed in the first switching unit and the second switch 260 formed in the second switching unit are connected to the scan signal Lt; / RTI > Accordingly, a scan signal applied through the signal line 251 is transmitted to the gate line through the first switch 250, and a scan signal is applied to the gate line through the transmission line 261 through the second switch 260 An applied scan signal is transmitted to the gate line. As a result, a total of four scan signals may be input to one gate line through the connection line 210, the two first switches 250 and the second switch 260.

In this case, the scan signals input through the connection line 210 and the first and second switches 250 and 260 are applied to the one gate line at the same timing.

When the gate low voltage VGL is applied to the connection line 210 instead of the scan signal, the first switch 250 and the second switch 260 are turned off. In this case, no gate high voltage VGH is applied to the gate line. Therefore, the pixels of the gate lines are not driven.

That is, in the first embodiment of the present invention as described above, the gate driver 200 includes the first non-display region 921 in which the data driver 300 is formed, and the second non-display region 921, And connection lines 210, which are perpendicular to the gate lines and parallel to the data lines, extend from the gate driver 300. Also, one connection line 210 is connected to one gate line. Accordingly, the signals sequentially output from the gate driver 200 to the connection line 210 are sequentially output to the gate line connected to each connection line 210. The first switching device 250 and the second switching device 260 formed in the third non-display area 923, the fourth non-display area 924, An additional scan signal may be sequentially applied to the gate line.

On the other hand, in the first embodiment of the present invention, the switching unit constituted by the above-described switching units includes the third non-display region 923, the fourth non-display region 924, and the first non- But it may be provided only in one area or only in two areas.

4 is a configuration diagram of a liquid crystal display device according to a second embodiment of the present invention. The configuration and the function of the second embodiment of the present invention are the same as those of the first embodiment described with reference to Figs. 2 and 3, except for the configuration and function of the connection line 210. Fig. Therefore, only the features of the second embodiment compared with the first embodiment will be described in detail below.

The liquid crystal display according to the second embodiment of the present invention also includes a panel 100, a gate driver 200, a data driver 300 and a timing controller 400. The gate driver 200 includes a data driver Display region 921 in which the first non-display region 300 is formed.

In the third non-display area 923 and the fourth non-display area 924 between the first non-display area 921 and the second non-display area 922, A ground, a scribe area (a), a signal area (b), a switching part area (c), and a common voltage area (d). The switching section area (c) refers to a region where the first switching section as described above is formed.

Connection lines 210 that are perpendicular to the gate lines and parallel to the data lines extend from the gate driver 300 and one connection line 210 is connected to one gate line.

However, in the second embodiment of the present invention, two or more connection lines 210 may be connected to one gate line. 4 shows a liquid crystal display in which two connection lines 210 are connected to one gate line, as an example of the second embodiment of the present invention.

As shown in FIG. 4, the second embodiment of the present invention connects the two connection lines 210 to one gate line in order to increase the scan signal applied to the gate line. Recently developed liquid crystal display devices are manufactured in such a manner that the length of the horizontal direction is longer than the vertical length. Therefore, the scan signals applied to the gate line through the connection line 210 connected to the gate line in the left direction of the gate line in FIG. 4 are distorted due to noise generated while being transmitted in the right direction of the gate line, The scan signal itself can be weakened. In addition, the scan signals applied to the gate line through the connection line 210 connected to the gate line in the right direction of the gate line are distorted due to noise generated while being transmitted in the left direction of the gate line, Can be weakened.

Accordingly, in order to compensate for the phenomenon that the scan signal is weakened as described above, the second embodiment of the present invention has a structure in which two or more connection lines 210 are connected to one gate line, The scan signal is applied.

Here, the two or more connection lines connected to the one gate line may be one branching a scan signal output from the gate driver 200. [

In addition, two or more of the connection lines connected to the one gate line may apply a separate scan signal output from the gate driver 200 to the gate line.

That is, a scan signal is applied to two or more connection lines 210 connected to one gate line at the same timing.

As described above, according to the second embodiment of the present invention, more scan signals are applied to the gate lines through more connection lines 210, so that deviation of the scan signals does not occur at the right and left sides of the gate lines. Thereby, the image output from the left and right sides of the display area 910 does not cause image quality variation.

In the second embodiment of the present invention as described above, the gate driver 200 is formed in the second non-display area 921 facing the first non-display area 921 in which the data driver 300 is formed And connection lines 210, which are perpendicular to the gate lines and parallel to the data lines, extend from the gate driver 300. The two or more connection lines 210 are connected to one gate line. Accordingly, the signals simultaneously output from the gate driver 200 to the two connection lines 210 are simultaneously output to the gate line to which the two connection lines are commonly connected.

As described in the first embodiment of the present invention, in the second embodiment of the present invention, the first non-display area 923 and the fourth non- And the second non-display region 921 may include a second switching unit. Therefore, even when the width of the liquid crystal display device is increased, the second embodiment of the present invention may not cause a deviation of the scan signal applied to the right and left sides of the gate line.

That is, in the third embodiment of the present invention, the switching unit constituted by the above-described switching units includes the third non-display region 923, the fourth non-display region 924, and the first non- But it may be provided only in one area or only in two areas.

5 is a configuration diagram of a liquid crystal display device according to a third embodiment of the present invention. The configuration and function of the third embodiment of the present invention are the same as those of the first embodiment described with reference to Figs. 2 and 3, except for the configuration and the function of the connection line 210. Fig. Therefore, only the features of the third embodiment compared with the first embodiment will be described in detail below.

The liquid crystal display according to the third embodiment of the present invention also includes a panel 100, a gate driver 200, a data driver 300 and a timing controller 400. The gate driver 200 includes a data driver Display region 921 in which the first non-display region 300 is formed.

The third non-display area 923 and the fourth non-display area 924 between the first non-display area 921 and the second non-display area 922 are formed in the direction from the outward direction to the display area 910 , A ground and scribe area (a), a signal area (b), a switching part area (c), and a common voltage area (d). The switching section area (c) refers to a region where the first switching section as described above is formed.

Connection lines 210 that are perpendicular to the gate lines and parallel to the data lines extend from the gate driver 300 and one connection line 210 is connected to one gate line.

However, in the third embodiment of the present invention, the gate driver may be divided into a first gate driver to a k-th gate driver, and a connection line 210 extending from each gate driver May be connected one-to-one to each of the gate lines.

Here, the first gate driver through the kth gate driver may apply the same scan signal to the gate line by dividing the longitudinal direction of the gate line by 1 / k.

5 shows a liquid crystal display device in which the gate driver is divided into a first gate driver and a second gate driver as an example of the third embodiment of the present invention. The first gate driver 200 refers to the gate driver on the left side of the second non-display area 922 of the liquid crystal panel 100 shown in FIG. 5, and the second gate driver 200 refers to the second non- And a gate driver formed on the right side of the region 922. [

5, the reason why two connection lines 210 are connected to one gate line by using two gate drivers is the same as in the second embodiment, To increase the scan signal applied to the gate line.

In the second embodiment of the present invention, two connection lines 210 extending from the same gate driver are formed adjacent to each other on one gate line. However, in the third embodiment of the present invention, two connection lines 210 connected to one gate line are formed apart from each other.

That is, as shown in FIG. 5, when there are two gate drivers, the two connection lines may be spaced apart by a half of the longitudinal length of the gate line, and when three gate drivers are provided, May be connected to one gate line at a distance of 1/3 of the longitudinal direction of the gate line.

At this time, a scan signal is outputted at the same timing to two or more connection lines connected to one gate line. In other words, since the scan signals are simultaneously applied in the left and right directions of one gate line, the deviation of the scan signals at the left and right sides of the gate line can be reduced. As a result, It does not.

In the third embodiment of the present invention as described above, the gate driver 200 is formed in the second non-display area 921 facing the first non-display area 921 in which the data driver 300 is formed And connection lines 210, which are perpendicular to the gate lines and parallel to the data lines, extend from the gate driver 300. At this time, the connection lines connected to each of the two or more gate driving units may be connected to one gate line at a predetermined interval, and may output a scan signal at the same timing.

As described in the first embodiment of the present invention, in the third embodiment of the present invention, in the region of at least one of the third non-display region 923 and the fourth non-display region 924, And the second non-display region 921 may include a second switching unit. Therefore, in the third embodiment of the present invention, even when the left and right widths of the liquid crystal display device are increased, deviation of the scan signal applied to the right and left sides of the gate line may not occur.

That is, in the third embodiment of the present invention, the switching unit constituted by the above-described switching units includes the third non-display region 923, the fourth non-display region 924, and the first non- But it may be provided only in one area or only in two areas.

6 to 8 are various configuration diagrams of liquid crystal display devices according to fourth to sixth embodiments of the present invention. The configuration and function of the fourth embodiment of the present invention shown in Fig. 6 are similar to those of the first embodiment of the present invention shown in Fig. 2, and the configuration and function of the fifth embodiment of the present invention shown in Fig. Is similar to that of the second embodiment of the present invention shown in Fig. 4, and the configuration and functions of the sixth embodiment of the present invention shown in Fig. 8 are the same as those of the third embodiment of the present invention shown in Fig. 5 Function.

6, the gate driver 200 includes a first non-display area 921 in which the data driver 300 is formed, and a second non-display area 921 And connection lines 210, which are perpendicular to the gate lines and parallel to the data lines, extend from the gate driver 300. One connection line 210 is connected to one gate line. Accordingly, the signals sequentially output from the gate driver 200 to the connection line 210 are sequentially output to the gate line connected to each connection line 210.

6, the gate driver 200 according to the fourth embodiment of the present invention may be implemented in an IC area of a TCP (Tape Carrier Package), or may be implemented in a COF (Chip On Film) Is mounted on the base film 290 and connected to the second non-display area 922 by a TAB (Tape Automated Bonding) method.

That is, the fourth embodiment of the present invention differs from the first embodiment in that the gate driver 200 is formed in the second non-display area 922 in a GIP (gate in panel) 2 non-display area 922. [0216] Except for the differences as described above, the configuration and functions of the fourth embodiment are the same as those of the first embodiment.

In this case, as described in the first embodiment of the present invention, the fourth embodiment of the present invention is characterized in that the first non-display area 921, the third non-display area 923, and the fourth non- A switching unit may be provided in at least one of the two regions.

7, the gate driving part 200 includes a first non-display area 921 in which the data driver 300 is formed, and a second non-display area 921 And connection lines 210, which are perpendicular to the gate lines and parallel to the data lines, extend from the gate driver 300. The two or more connection lines 210 are connected to one gate line. Accordingly, the scan signals simultaneously output from the gate driver 200 to the two connection lines 210 are simultaneously output to the gate line to which the two connection lines are commonly connected.

The fifth embodiment of the present invention differs from the second embodiment in that the gate driver 200 is formed in the second non-display area 922 in a GIP And is connected to the second non-display area 922 through the film 290. [ Except for the difference as described above, the configuration and the function of the fifth embodiment are the same as those of the second embodiment.

In this case, as described in the first embodiment of the present invention, the fifth embodiment of the present invention is characterized in that the first non-display area 921, the third non-display area 923, and the fourth non- A switching unit may be provided in at least one of the two regions.

8, the gate driving unit 200 includes a first non-display region 921 in which the data driver 300 is formed, and a second non-display region And connection lines 210, which are perpendicular to the gate lines and parallel to the data lines, extend from the gate driver 300. At this time, the connection lines connected to each of the two or more gate driving units may be connected to one gate line at a predetermined interval, and may output a scan signal at the same timing.

The sixth embodiment of the present invention differs from the second embodiment in that the gate driver 200 is formed in the second non-display area 922 in a GIP And is connected to the second non-display area 922 through the film 290. [ Except for the differences as described above, the configuration and functions of the sixth embodiment are the same as those of the third embodiment.

In this case, as described in the first embodiment of the present invention, the sixth embodiment of the present invention is characterized in that the first non-display area 921, the third non-display area 923, and the fourth non- A switching unit may be provided in at least one of the two regions.

The present invention as described above can be applied to a case where the gate driver 200 in the left and right sides (the third non-display area 923 and the fourth non-display area 924) of the conventional liquid crystal display device is driven by the data driver 300 The width of the left and right non-display areas of the liquid crystal display device can be reduced by moving the first non-display area 921 and the second non-display area 922 facing each other. Accordingly, the present invention can implement a super narrow bezel.

On the other hand, in the present invention, there is a switching section area c in which a switching section is formed in the third non-display area 923 and the fourth non-display area 924. [ However, the width of the switching sub-area c is smaller than the area of the GIP circuit part formed in the third non-display area 923 and the fourth non-display area 924 of the conventional liquid crystal display device. Accordingly, the present invention can realize a super narrow bezel as compared with a conventional liquid crystal display device.

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: panel 200: gate driver
300: Data driver 400: Timing controller
500: common voltage region (d) 921: first non-display region
922: second non-display area 923: third non-display area
924: fourth non-display area b: signal area
a: ground and scribe area c: GIP circuit area

Claims (10)

A panel in which four non-display areas are formed on the outer periphery of the display area;
A data driver formed in a first non-display area of the non-display area to drive data lines formed in a first direction in the display area;
A gate driver formed in a second non-display area of the non-display area opposite to the first non-display area to drive gate lines formed in a second direction perpendicular to the first direction in the display area;
A timing controller for driving the data driver and the gate driver; And
And a third non-display region formed between the first non-display region and the second non-display region, the third non-display region or the fourth non-display region, And a first switching unit,
In the display region, connection lines extending from the gate driver and formed in parallel with the data lines are connected to the gate lines, respectively,
Wherein the data driver and the gate driver face each other with the display region therebetween,
Wherein at least two of the connection lines are connected to one gate line, and a distance between the at least two connection lines is greater than or equal to 1/3 of the length of the gate line. The method according to claim 1,
The P pixels arranged on one horizontal line of the display area are driven by a double rate driving method in which two pixels are driven by using the two gate lines and P / Wherein the liquid crystal display device is a liquid crystal display device. The method according to claim 1,
Wherein the first switching unit comprises:
And a first switching unit that is turned on by a scan signal transmitted from the connection line through a gate line connected to the connection line and applies a scan signal transmitted from the timing controller to the gate line, . The method according to claim 1,
And a second switching unit formed in the first non-display area and capable of sequentially turning on and off each of the gate lines. 5. The method of claim 4,
Wherein the second switching unit comprises:
And a second switching unit which is turned on by a scan signal transmitted from the connection line and applies a scan signal transmitted from the timing controller to a gate line to which the connection line is connected. delete The method according to claim 1,
Wherein at least two of the connection lines connected to the one gate line apply a separate scan signal output from the gate driver to the gate line. The method according to claim 1,
The gate driver includes a first gate driver to a k-th gate driver, and the connection lines extending from the respective gate drivers by the number of the gate lines are connected to the gate lines in a one-to-one manner Wherein the liquid crystal display device is a liquid crystal display device. 9. The method of claim 8,
The first gate driver to the k < th >
Dividing the longitudinal direction of the gate line by 1 / k, and applying the same scan signal to the connection lines connected to the one gate line. The method according to claim 1,
Wherein the gate driver comprises:
Wherein the non-display region is formed by a gate in panel (GIP) method or is connected to the non-display region by a TCP or COF method.

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