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WO1990005995A1 - Dispositif a semi-conducteurs - Google Patents

Dispositif a semi-conducteurs Download PDF

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Publication number
WO1990005995A1
WO1990005995A1 PCT/JP1989/001180 JP8901180W WO9005995A1 WO 1990005995 A1 WO1990005995 A1 WO 1990005995A1 JP 8901180 W JP8901180 W JP 8901180W WO 9005995 A1 WO9005995 A1 WO 9005995A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor device
conductor
resistance element
diffusion region
resistance
Prior art date
Application number
PCT/JP1989/001180
Other languages
English (en)
Japanese (ja)
Inventor
Yasunari Furuya
Kazuko Moriya
Original Assignee
Seiko Epson Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1290499A external-priority patent/JP2864576B2/ja
Application filed by Seiko Epson Corporation filed Critical Seiko Epson Corporation
Priority to GB9015141A priority Critical patent/GB2232530B/en
Publication of WO1990005995A1 publication Critical patent/WO1990005995A1/fr
Priority to KR1019900701560A priority patent/KR900702572A/ko

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/209—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only resistors
    • H—ELECTRICITY
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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Definitions

  • the present invention relates to a high-precision resistive element structure in a semiconductor device.
  • FIG. 1 a structural diagram in which a resistance element, particularly a high resistance element, is formed on a semiconductor substrate by using polycrystalline silicon is shown in FIG.
  • Polycrystalline silicon 2 is formed by sandwiching an insulating film 9 as an oxide film on a semiconductor substrate 3 and connected to aluminum electrode wires 4 and 6 via contacts 5 and 7.
  • the upper part of the polycrystalline silicon 2 had a strong insulating film 1 °, and the upper part thereof had only an oxide protection film without a signal line or any signal line made of aluminum wiring.
  • FIG. 2 shows a structural diagram in which a resistance element conventionally formed of a low-concentration diffusion layer or a diffusion layer formed by ion implantation is formed on a semiconductor substrate.
  • Diffusion resistor 12 formed on the surface of semiconductor substrate 13 is connected to aluminum electrode wires 14 and 16 via contacts 15 and 17.
  • Above the diffusion resistor there is an insulating film which is an oxide film.
  • the upper portion of the insulating film has another signal wiring made of polycrystalline silicon / aluminum, or has no signal wiring and has only an oxide protective film.
  • FIG. 1 shows a structural diagram in which a resistance element conventionally formed of a low-concentration diffusion layer or a diffusion layer formed by ion implantation.
  • a depletion layer is formed on the surface of the resistive element due to the electric charge accumulated at the interface between the diffusion surface of the resistive element and the oxide film and the electric field from the signal wiring passing over the resistive element. .
  • This depletion layer works to increase the resistance value of the resistance element. If the thickness force of the depletion layer becomes a level that cannot be ignored with respect to the diffusion depth of the resistance element, the value of the resistance element will fluctuate greatly. With a diffusion depth of 1 mm or less formed by ion implantation, a sheet resistance of 9 ⁇ or more In children, this phenomenon is remarkable, with resistance values ranging from a few percent to several. %.
  • the configuration of the semiconductor device of the present invention is such that a conductor having a lower resistance than the resistance element is formed at least above the diffusion resistance formed by low diffusion or ion implantation or the resistance element formed of polysilicon.
  • the feature is to keep the low resistance conductor at a constant potential with respect to the power supply
  • the cause of the variation in resistance value Therefore, since the electromagnetic field from the impurity ions and adjacent signal lines is cut off, the low diffusion resistance and the polycrystalline silicon resistance can be kept stable.
  • FIG. 1 is a structural view of a conventional polycrystalline silicon resistance element.
  • FIG. 2 is a structural diagram of a conventional diffusion resistance element.
  • FIG. 3 is a structural view of a resistive element made of polycrystalline silicon according to the present invention.
  • FIG. 4 is a structural view of the diffusion resistance element of the present invention.
  • FIG. 5 is a structural diagram of the polycrystalline silicon resistor of the present invention formed on LOCOS.
  • FIG. 6 is a structural diagram of a polycrystalline silicon resistor according to the present invention when a stopper is provided below L 0 C 0 S.
  • FIG. 7 (a) is a plan view of the polycrystalline silicon resistor of the present invention in which the periphery is surrounded by the same material as the resistance element, and FIG. 7 (b) is a cross-sectional view thereof.
  • Fig. 8 shows the polycrystalline silicon resistor of the present invention in which the upper and lower layers of the resistive element are covered with conductors.
  • Fig. 9 (a) shows the polycrystalline silicon resistor of the present invention in which the potential of the conductor covering the resistive element is set to VDD.
  • Fig. 9 (b) is a diagram showing an example of a circuit when the potential of a conductor is used as the output of a transistor.
  • FIG. 1 ⁇ is an application circuit diagram of the resistive element according to the present invention when the output voltage is divided by the resistor in the middle stage.
  • FIG. 11 is an application circuit diagram of the resistance element according to the present invention when the output voltage is divided by a plurality of resistance elements.
  • FIG. 12 is a cross-sectional view of a polycrystalline silicon resistor of the present invention using two-layer metal wiring.
  • FIG. 13 (a) is a cross-sectional view of a diffusion resistor according to the present invention in which the periphery is covered with the same material as the resistor, and
  • FIG. 13 (b) is a cross-sectional view thereof.
  • FIG. 14 is a cross-sectional view of the diffused resistance element of the present invention in which the upper and lower layers of the resistance are covered with shield conductors.
  • FIG. 15 (a) is a plan view of the diffusion resistance element of the present invention in which the periphery is surrounded by a stopper
  • FIG. 15 (b) is a cross-sectional view thereof.
  • FIG. 16 is an equivalent circuit diagram of a field base using the resistive element of the present invention covered with a shield conductor as a delay line of a high-frequency circuit.
  • FIG. 3 shows the basic configuration of the present invention.
  • FIG. 3 is a structural diagram of a resistance element made of polycrystalline silicon.
  • Reference numeral 2 denotes a resistance element using polycrystalline silicon, and both ends thereof are led out to electrodes 4 and 6 via contacts 5 and 7, respectively.
  • the material of the electrodes 4 and 6 is aluminum.
  • a low-resistance conductor 1 is formed so as to cover more than half of the polycrystalline silicon by sandwiching the acid ibE on the upper part of the polycrystalline silicon 2 and a constant potential (low power supply potential VSS 8 or high power supply potential VDD). , Or its intermediate potential).
  • the oxide film in the present invention intends an insulating film.
  • the resistance element having such a structure has the following advantages. First, it is possible to prevent noise from a signal line disposed above the low resistance conductor 1 and the outside world from jumping into the resistance element. In other words, the electric and magnetic noise transmitted from the stray capacitance, stray inductance, etc. existing around the resistance element is removed by the electrostatic shielding effect of low resistance conduction. Therefore, the resistance element is used as a stable and high-precision element without a change in current-to-current characteristic (that is, resistance value) due to noise even during operation of the semiconductor device.
  • the low-resistance conductor can block light radiated from outside to the resistance element. Since a high-resistance polycrystalline silicon resistor is a semiconductor, it changes its electron energy by light energy such as visible light, infrared light, and ultraviolet light, and consequently changes its characteristic force as a resistive element. So, with a physical protection material called a low resistance conductor By covering, the above-mentioned problems are eliminated and a stable resistance element is obtained.
  • the advantage of preventing the resistance element characteristics from fluctuating due to the influence of the outside world has been provided.However, on the contrary, the noise point generated by the resistance element itself, the electric field and the magnetic field do not reach the surroundings, and the point j is there. Particularly in a circuit that operates at high speed, the charge flowing through the resistor element also fluctuates rapidly, increasing thermal noise, and unnecessary radiation emitted from this resistor element cannot be ignored. It is.
  • the material of the resistor may be P-type polycrystalline silicon, N-type polycrystalline silicon, L which is not implanted, or high-resistance polycrystalline silicon which is reduced in the amount of ion implantation (referred to as a high-resistor), or
  • the present invention has the same effect not only for silicon but also for other semiconductors and semiconductor-metal compounds.
  • Aluminum, tungsten, and molybdenum are commonly used as materials for the low-resistance conductor, but polycrystalline silicon is also effective.
  • FIG. 5 is a diagram in which a polycrystalline silicon resistor of the present invention is formed on a selective oxide film (hereinafter referred to as L0C0S) formed on the surface of a semiconductor substrate.
  • L0 COS 53 is formed on a substrate 55, and a polycrystalline silicon resistor 50 is formed thereon via an oxide film 52.
  • the oxide film 56 is sandwiched between the aluminum conductor 51 and the resistor 5 () is covered, and the aluminum conductor 51 is connected to the power supply VSS 54.
  • FIG. 6 is a diagram of an application example in which a high-concentration diffusion region is provided immediately below LOCOS. A high diffusion region (stopper) is provided under LOCOS to increase the breakdown voltage of the transistor. Since FIG.
  • FIG. 6 shows the P channel region, a dark N + stopper 65 is provided, and a VDD potential is applied from the substrate 66.
  • a polycrystalline silicon resistor 60 is formed on the LOCOS 64, and the upper portion thereof is covered with an aluminum conductor 61, and its potential is set to VDD67. With this configuration, the resistor 60 is vertically dissociated by the aluminum conductor 61 kept at VDD and the N + stopper 65. Therefore, there is a double effect that the characteristics as a resistive element are stabilized and the withstand voltage of the transistor is increased.
  • the N-channel region below 0:03? — The same effect can be obtained by providing a P + stopper on the well and applying VSS to this P + strobe, aluminum and the aluminum conductor.
  • FIG. 7 (a) is a plan view of an example in which the sides of the resistor are shielded with the same material as the resistor
  • FIG. 7 (b) is a cross-sectional view taken along line AB.
  • polycrystalline silicon 77 is arranged around the polycrystalline silicon resistance element 70, an aluminum conductor 75 connected to VSS is formed to cover them all, and the anode conductor 75 and the polycrystalline silicon 77 are contacted as far as possible. , 78 are provided.
  • reference numerals 73 and 74 denote aluminum electrode wires in the same layer as the aluminum conductor 75 connected to the polycrystalline silicon 70 via the contacts 71 and 72.
  • FIG. 8 is a structural diagram in which a shield layer is formed below a resistive element.
  • An oxide film 86 is sandwiched on the semiconductor substrate 83 to form a conductor 82, and the potential is set to VSS 85.
  • This conductor 82 is usually used for the first polycrystalline silicon force.
  • the oxide film is sandwiched, and the resistance element 80 is formed by the second polycrystalline silicon.
  • the film is sandwiched and covers the top of the aluminum conductor 81 force-resistive element 80 which is energized to VSS 84.
  • the first polycrystalline silicon has a higher resistance than aluminum, it goes without saying that the greater the number of contacts for connecting the first polycrystalline silicon to the VSS power supply, the greater the effect becomes.
  • the potential of each part of the polycrystalline silicon conductor is made as uniform as possible by arranging at least two power supply contacts at both ends of the polycrystalline silicon opposed to each other with the resistance element interposed therebetween. By doing so, the effect on the resistance element is further improved.
  • FIG. 9 (a) is a structural diagram of the resistive element in which the potential of the low-resistance conductor is set to VDD 90 in the structure of FIG. From the point of view of the shielding effect, it does not change with VSS or VDD.
  • FIG. 9 (b) is a side view of the case where the potential applied to the low-resistance conductor is extracted from the output voltage of the transistor and is set to an intermediate potential between VDD and VSS.
  • MO S transistor 91, 92, 93, each transistor driving ability mosquito? ⁇ , ⁇ ⁇ 2, S N1, ⁇ ⁇ 2, signal 96 when each of the transistor threshold V TP1, V T P2, VTNI , and V TN 2 The potential of
  • FIG. 10 is an application circuit diagram of a resistance element with a middle tap. A circuit that divides a resistor into two and takes out from the intermediate point through an output operational amplifier 1 • 7. The present invention is applied to a resistor element that is accurately divided into two.
  • a polycrystalline silicon resistor 101 connected to VDD100 and VSS 105 via contacts 102 and 1 ⁇ 4 has a
  • Output V. 108 outputs VDD / 2 exactly.
  • FIG. 11 is an application circuit diagram of a field stand using two resistive elements for the same purpose as in FIG.
  • the signal 116 connecting the two is input to the ⁇ amplifier 117, and the potential of the signal 116 is output as it is 3 ⁇ 4EV 0 11
  • the structure of the resistors 115 and 116 must be exactly the same, and In order to prevent the effects of noise and electromagnetic fields, cover the resistors 115 and 116 with the upper aluminum conductors 113 and 112, and give the same potential 111. By doing so, a stable voltage is output to Vo.
  • VDDZ3 and VDDZ4 can be easily obtained by connecting three or four in series.
  • the structure according to the present invention using the polycrystalline polysilicon resistor can be applied to a semiconductor device having two layers or three layers, of course, the force ⁇ exemplified in the case of one layer of aluminum wiring.
  • FIG. 12 is a structural diagram of two or more aluminum layers.
  • a polycrystalline silicon resistor 120 sandwiching an oxide film 122 on the substrate 121, and operates as a resistance element through the electrodes 124 and 125.
  • the electrodes 124 and 125 are the first aluminum wiring layers.
  • a second aluminum wiring layer 127 is provided across the oxide films 123 and 126, covers the entire upper portion of the polycrystalline silicon resistor 120, and is supplied with a VSS potential.
  • the distance between the resistive element 120 and the shield material 127 is farther than in the case of aluminum single-layer wiring, so the shielding effect is somewhat reduced. Since it is not necessary to do so, the design becomes easier.
  • the stabilization of the resistance and the technology of the L and L are achieved by the shield effect beam of the present invention. Can be applied.
  • FIG. 4 is a basic structural diagram when the present invention is applied to a diffusion resistor.
  • an upper portion of at least half of the plane of the diffusion resistance is covered with an aluminum conductor 11 with an oxide film interposed therebetween, and a VSS potential 18 is applied.
  • the aluminum conductor 11 becomes a shielding material, and shields electromagnetic noise, light, ions, and dirt from the outside with electric force and physically, so that the diffusion resistance is stabilized and the accuracy is improved.
  • Diffusion resistance material is formed in the N-substrate ⁇ —Pell resistance, ⁇ —Pell formed in the substrate ⁇ —Low diffusion resistance such as resistance, or formed by ion implantation ⁇ + resistance, ⁇ + High as resistance?
  • the present invention can be applied to diffusion resistance and the like.
  • a metal-semiconductor compound, a superconducting substance, and the like can be applied in addition to aluminum and polycrystalline silicon.
  • FIG. 13 is a structural diagram when the periphery of the diffusion resistor is covered with the same diffusion material.
  • FIG. 13 (a) is a plan view
  • FIG. 13 (b) is a cross-sectional view taken along line AB.
  • Diffusion resistance 130 force ⁇ formed in the shallow part of semiconductor substrate 139
  • the same diffusion material 137 is formed around (in the horizontal direction)
  • aluminum conductor 135 covering the upper part of diffusion resistance 130 with an oxide film is The material 137 is contacted with the material 137 via the contacts 136 and 138, and the potential is applied to the power supply VSS.
  • the effect of shielding the electromagnetic field noise of the source / drain ⁇ or diffusion resistance of the surrounding transistors can be determined by the pad structure.
  • 133 and 134 are aluminum electrode wires of the same layer as 135 connected to the diffusion resistor 130 via the contacts 131 and 132.
  • FIG. 14 is a structural diagram in the case where a shield conductor is formed in a lower layer portion of a diffusion resistor.
  • P-base. Plate 143 has N + buried layer 142.
  • 144 and 145 are high impurity; N-type epitaxial layers, and potential is applied to VDD by contact 146.
  • Reference numeral 140 denotes a P + diffusion resistance, which sandwiches an oxide film 147 and has an upper portion covered with an aluminum conductor 141, and the potential of the aluminum conductor 141 is also V DD. Since the diffused resistance element with this structure is shielded from the top, bottom, left and right, the stability and accuracy as resistance are extremely high.
  • FIGS. 13 and 14 have a shielding effect in the lateral and downward directions of the resistance element, so that the transistor near the current path generated when the semiconductor integrated device is irradiated with light or a-line. This has a great effect of preventing the influence of the substrate current due to the switching.
  • FIG. 15 (a) is a plan view of the case where the periphery of the diffusion resistor is surrounded by a stopper
  • FIG. 15 (b) is a cross-sectional view taken along the line AB.
  • a P + stopper 157 is formed around an N-type diffused resistor 150 formed on the surface of the P-well 159 formed on the N-substrate, and a VSS potential is applied from the aluminum conductor 155 by the contacts 156 and 158.
  • This structure not only shields and prevents electromagnetic noise from surroundings, but also has a latch-up prevention effect.
  • a P-type diffusion resistor is formed on the N-substrate, and the surrounding area is surrounded by an N + stopper, and VDD is applied to the N + stopper and the aluminum conductor of the diffusion fan Lh, thereby again providing an electromagnetic field. It has the effect of noise shielding and latch-up prevention.
  • 153 and 154 are aluminum electrode wires in the same layer as the aluminum conductor, and are connected to the resistor 150 via the contacts 151 and 152.
  • the electrostatic shielding effect by covering the periphery of the diffused resistor with a conductor given a constant potential is similar to the case of a polycrystalline silicon resistor.
  • the potential may be the intermediary potential.
  • the surrounding area is covered with a conductor connected to a constant potential to reduce the resistance. This has the effect of increasing the stability of the device.
  • the present invention can be applied in the same manner as described above.
  • FIG. 16 is an equivalent circuit showing that the shield resistance of the present invention can be used as a delay line of a high-frequency circuit.
  • Capacitors 164 to 167 are always able to obtain a stable capacitance fox since they are surrounded by a conductor of constant potential around the resistor 160 to 163, and are also shielded Therefore, the stability of the resistance value is also good.
  • the signal is input from the resistance terminal on the V i side, and output from the resistance terminal on the V 0UT side.
  • the invention has a very wide range of applications.
  • the technique of covering the resistive element of the present invention with a shield conductor can be applied to covering the periphery of a capacitor, a transistor, and the like with a shield conductor, and can increase the capacitance and the stability of the transistor.
  • the present invention has an extremely wide range of applications because the stability and accuracy of a resistor are improved with a simple configuration in which the peripheral structure pattern of the resistor is slightly added using existing manufacturing processes.
  • Improving the stability and accuracy of a resistive element means that the absolute value of the resistive element, or the relative resistance ratio when multiple resistive elements are used, is less affected by the surrounding electromagnetic field noise. It is.
  • the surface (generally, an oxide film) potential of the resistance element is prevented from floating, it is less susceptible to ions and the like, and the aging of the resistance value can be prevented.
  • the electromagnetic field noise generated from the resistance element itself can be reduced.
  • high-precision high-resistance element power can be realized by low-concentration diffusion, the required area is reduced, and as a result, semiconductor integrated devices can be highly integrated.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Dispositif à semi-conducteurs dans lequel un conducteur est formé sur au moins un élément de résistance obtenu par diffusion d'impuretés dans un substrat semi-conducteur ou en silicium polycristallin. Ce conducteur présente une résistance inférieure à celle dudit élément de résistance et est maintenu à un potentiel déterminé. Cet agencement empêche la pénétration, depuis les lignes de signaux avoisinantes ou depuis des unités externes, d'ions d'impuretés ou de bruit, qui provoquent une variation de la résistance de l'élément de résistance, étant donné que l'on forme un conducteur présentant un potentiel déterminé. La résistance de l'élément de résistance peut ainsi être maintenue à un niveau stable.
PCT/JP1989/001180 1988-11-22 1989-11-21 Dispositif a semi-conducteurs WO1990005995A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB9015141A GB2232530B (en) 1988-11-22 1989-11-21 A high precision semiconductor resistor device
KR1019900701560A KR900702572A (ko) 1988-11-22 1990-07-20 반도체 장치

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP63/295083 1988-11-22
JP29508388 1988-11-22
JP1/81094 1989-03-31
JP8109489 1989-03-31
JP1290499A JP2864576B2 (ja) 1988-11-22 1989-11-08 半導体装置
JP1/290499 1989-11-08

Publications (1)

Publication Number Publication Date
WO1990005995A1 true WO1990005995A1 (fr) 1990-05-31

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Application Number Title Priority Date Filing Date
PCT/JP1989/001180 WO1990005995A1 (fr) 1988-11-22 1989-11-21 Dispositif a semi-conducteurs

Country Status (3)

Country Link
GB (3) GB2232530B (fr)
HK (2) HK105997A (fr)
WO (1) WO1990005995A1 (fr)

Cited By (1)

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KR100392254B1 (ko) * 2000-12-05 2003-07-23 한국전자통신연구원 박막 인덕터 제작방법

Families Citing this family (2)

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KR960015322B1 (ko) * 1993-07-23 1996-11-07 현대전자산업 주식회사 차폐용 플레이트를 갖는 반도체소자 제조방법
DE19633549C2 (de) * 1996-08-20 2002-07-11 Infineon Technologies Ag Integrierte Schaltung mit einer sich zumindest teilweise über einen Sägekanal hinweg erstreckenden Schutzschicht

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JPS55123157A (en) * 1979-03-16 1980-09-22 Oki Electric Ind Co Ltd High-stability ion-injected resistor
JPS5650553A (en) * 1979-09-29 1981-05-07 Fujitsu Ltd Semiconductor device
JPS5918670A (ja) * 1982-07-22 1984-01-31 Nec Corp 半導体装置
JPS6298815A (ja) * 1985-10-25 1987-05-08 Hitachi Ltd 半導体集積回路装置

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JPS5512315A (en) * 1978-07-06 1980-01-28 Sharp Corp Electronic range
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JPS6050553A (ja) * 1983-08-30 1985-03-20 Fujitsu Ltd 多色電子記録方法
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JPS5449082A (en) * 1977-09-26 1979-04-18 Mitsubishi Electric Corp Semiconductor device
JPS55123157A (en) * 1979-03-16 1980-09-22 Oki Electric Ind Co Ltd High-stability ion-injected resistor
JPS5650553A (en) * 1979-09-29 1981-05-07 Fujitsu Ltd Semiconductor device
JPS5918670A (ja) * 1982-07-22 1984-01-31 Nec Corp 半導体装置
JPS6298815A (ja) * 1985-10-25 1987-05-08 Hitachi Ltd 半導体集積回路装置

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100392254B1 (ko) * 2000-12-05 2003-07-23 한국전자통신연구원 박막 인덕터 제작방법

Also Published As

Publication number Publication date
GB2232530A (en) 1990-12-12
GB9301742D0 (en) 1993-03-17
GB9301741D0 (en) 1993-03-17
GB9015141D0 (en) 1990-09-05
GB2232530B (en) 1993-09-22
GB2262187A (en) 1993-06-09
GB2262188A (en) 1993-06-09
GB2262188B (en) 1993-09-15
HK120897A (en) 1997-09-12
HK105997A (en) 1997-08-22

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