[go: up one dir, main page]

WO1999003128A3 - Singulation system for chip-scale packages - Google Patents

Singulation system for chip-scale packages Download PDF

Info

Publication number
WO1999003128A3
WO1999003128A3 PCT/US1998/014078 US9814078W WO9903128A3 WO 1999003128 A3 WO1999003128 A3 WO 1999003128A3 US 9814078 W US9814078 W US 9814078W WO 9903128 A3 WO9903128 A3 WO 9903128A3
Authority
WO
WIPO (PCT)
Prior art keywords
cutting assembly
tape
longitudinally
chip
cuts
Prior art date
Application number
PCT/US1998/014078
Other languages
French (fr)
Other versions
WO1999003128A2 (en
Inventor
Phillip E Koerper
Merlin E Behnke
Albert J Chanasyk
Original Assignee
Systemation Engineered Product
Phillip E Koerper
Merlin E Behnke
Albert J Chanasyk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Systemation Engineered Product, Phillip E Koerper, Merlin E Behnke, Albert J Chanasyk filed Critical Systemation Engineered Product
Publication of WO1999003128A2 publication Critical patent/WO1999003128A2/en
Publication of WO1999003128A3 publication Critical patent/WO1999003128A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0097Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Supply And Installment Of Electrical Components (AREA)
  • Dicing (AREA)

Abstract

A singulation system and method for singulating a plurality of chip-scale packages (62) fabricated on a carrier tape (58) is disclosed. The packages (62) are arranged in an array having at least one row and a plurality of columns extending longitudinally. The system includes a first cutting assembly (32) for making first cuts transversely through the tape (58) of the package (62). A first positioning mechanism (36) positions longitudinally the first cutting assembly (32) with respect to the selected column. Drive rollers (18, 20, 22, 24, 26) advance the tape (58) longitudinally from the first cutting assembly (32) to a second cutting assembly (34). The second cutting assembly (34) makes second cuts longitudinally through the tape (58) which intersect the first cuts. A second positioning mechanism (38) positions the second cutting assembly (34) transversely with respect to the selected column.
PCT/US1998/014078 1997-07-09 1998-07-07 Singulation system for chip-scale packages WO1999003128A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US5198597P 1997-07-09 1997-07-09
US60/051,985 1997-07-09
US7394498P 1998-02-06 1998-02-06
US60/073,944 1998-02-06

Publications (2)

Publication Number Publication Date
WO1999003128A2 WO1999003128A2 (en) 1999-01-21
WO1999003128A3 true WO1999003128A3 (en) 1999-07-29

Family

ID=26730038

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1998/014078 WO1999003128A2 (en) 1997-07-09 1998-07-07 Singulation system for chip-scale packages

Country Status (1)

Country Link
WO (1) WO1999003128A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IE20000618A1 (en) 1999-08-03 2001-03-07 Xsil Technology Ltd A circuit singulation system and method
NL2000028C2 (en) * 2006-03-16 2007-09-18 Fico Bv Device for automated laser cutting of a flat carrier provided with encapsulated electronic components.
JP2017177261A (en) * 2016-03-29 2017-10-05 株式会社ディスコ Cutting apparatus
JP7398724B2 (en) * 2019-05-15 2023-12-15 パナソニックIpマネジメント株式会社 Component mounting device and component mounting method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4621552A (en) * 1985-01-04 1986-11-11 Cencorp Method and apparatus for separating printed-circuit boards from multi-board panels
US4683789A (en) * 1985-01-04 1987-08-04 Cencorp Method and apparatus for separating printed circuit boards from multi-board panels
US4791721A (en) * 1987-02-19 1988-12-20 Wand Tool Company Singulation system for printed circuit boards
US4972572A (en) * 1985-11-13 1990-11-27 Fujitsu Limited IC sheet cutting press and IC sheet processing apparatus using the same
US5483857A (en) * 1993-09-20 1996-01-16 Bi-Link Metal Specialties Workpiece finishing and presentation machine

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4621552A (en) * 1985-01-04 1986-11-11 Cencorp Method and apparatus for separating printed-circuit boards from multi-board panels
US4683789A (en) * 1985-01-04 1987-08-04 Cencorp Method and apparatus for separating printed circuit boards from multi-board panels
US4972572A (en) * 1985-11-13 1990-11-27 Fujitsu Limited IC sheet cutting press and IC sheet processing apparatus using the same
US4791721A (en) * 1987-02-19 1988-12-20 Wand Tool Company Singulation system for printed circuit boards
US5483857A (en) * 1993-09-20 1996-01-16 Bi-Link Metal Specialties Workpiece finishing and presentation machine

Also Published As

Publication number Publication date
WO1999003128A2 (en) 1999-01-21

Similar Documents

Publication Publication Date Title
EP0821416A3 (en) Light-emitting-diode array and fabrication method thereof
AU2558399A (en) Method for wagering on combined point spreads from multiple contests
KR900017166A (en) Method for manufacturing active matrix substrate
KR950701142A (en) Active matrix circuit board, thin-film transistor, and a manufacturing method for these
AU1138895A (en) Peelable barrier layer VSP package, and method for making same
TW353208B (en) Semiconductor package and method therefor
EP0412701A3 (en) Thin film transistor and preparation thereof
EP0658935A3 (en) Semiconductor device of the resin encapsulation type and manufacturing method.
WO2000061324A3 (en) Rocking apparatus and method for slicing a work piece utilizing a diamond impregnated wire
EP0716910A3 (en) Multi-wire saw device, slice method using the same and cassette for housing a wafer sliced with the same
FR2694133B1 (en) THIN FILM SOLAR CELL AND METHOD FOR PRODUCING SUCH A CELL, AS WELL AS A DRIVING METHOD, AN AUTOMATIC DRIVING DEVICE AND A METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE.
FR2701599B1 (en) Method for growing a composite semiconductor.
FI840923A7 (en) Crystallized carbohydrate matrix for biologically active substances, method for their preparation using senides.
GB2271215B (en) Semiconductor laser diode and production method thereof,and semiconductor laser diode array
FR2582154B1 (en) MULTI-BEAM TRANSMISSION DEVICE COMPRISING SEMICONDUCTOR ELEMENTS, PARTICULARLY LASER DIODES
CA2284037A1 (en) Gelatin encapsulation techniques
IT8422586A0 (en) DISC WHEEL FOR BICYCLES AND PROCEDURE FOR MANUFACTURING IT.
EP0762498A3 (en) Fuse window with controlled fuse oxide thickness
WO1999003128A3 (en) Singulation system for chip-scale packages
EP0768710A3 (en) Electrode or wiring for a semiconductor device, an active matrix substrate and process for production thereof
EP0397148A3 (en) Heterostructure device and production method thereof
FR2717306B1 (en) Method for isolating active areas of a semiconductor substrate by shallow, especially narrow, trenches and corresponding device.
WO1996030944A3 (en) Support module
EP0956856A3 (en) Calcium assimilation accelerator, calcium supplementing diet and method for accelerating calcium assimilation
EP0994579A3 (en) Common downlink frame for differing coding rates

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): CN JP KR SG US

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
AK Designated states

Kind code of ref document: A3

Designated state(s): CN JP KR SG US

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

NENP Non-entry into the national phase

Ref country code: KR

NENP Non-entry into the national phase

Ref country code: JP

Ref document number: 1999508855

Format of ref document f/p: F

122 Ep: pct application non-entry in european phase