WO1999030352A2 - Method for producing a matrix from thin-film transistors with storage capacities - Google Patents
Method for producing a matrix from thin-film transistors with storage capacities Download PDFInfo
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- WO1999030352A2 WO1999030352A2 PCT/EP1998/007361 EP9807361W WO9930352A2 WO 1999030352 A2 WO1999030352 A2 WO 1999030352A2 EP 9807361 W EP9807361 W EP 9807361W WO 9930352 A2 WO9930352 A2 WO 9930352A2
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- matrix
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000011159 matrix material Substances 0.000 title claims abstract description 14
- 238000003860 storage Methods 0.000 title claims abstract description 14
- 239000010409 thin film Substances 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 20
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 8
- 239000000463 material Substances 0.000 claims abstract description 5
- 239000004065 semiconductor Substances 0.000 claims description 16
- 229920000642 polymer Polymers 0.000 claims description 13
- 239000003990 capacitor Substances 0.000 claims description 8
- 238000002161 passivation Methods 0.000 claims description 7
- 229920001940 conductive polymer Polymers 0.000 claims description 6
- 239000012212 insulator Substances 0.000 claims description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 4
- 239000012780 transparent material Substances 0.000 claims description 4
- 239000011810 insulating material Substances 0.000 claims description 2
- 238000005530 etching Methods 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 230000018109 developmental process Effects 0.000 description 3
- 229920001609 Poly(3,4-ethylenedioxythiophene) Polymers 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 241001239379 Calophysus macropterus Species 0.000 description 1
- 229910016024 MoTa Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133357—Planarisation layers
Definitions
- the invention is based on a method for producing a matrix of thin-film transistors with storage capacities, in particular for liquid crystal screens according to the type of the independent claim.
- the inventive method with the characterizing features of the independent claim has the advantage over the known methods that fewer coating and etching steps and steps for photoresist removal are necessary.
- photostructurable materials are used for the passivation of the matrix and for the production of the pixel electrodes.
- one coating step namely a PECVD method for SiN x and one sputtering of ITO
- etching step namely dry etching of SiN x and wet etching from ITO
- a photosensitive, transparent and highly insulating polymer can be used for the passivation and an electrically conductive polymer for the production of the pixel electrodes.
- a mechanical rubbing treatment of the conductive polymer can also be used to orient the liquid crystal, so that the application of an additional orientation layer, for example a polymer, can be completely dispensed with.
- an additional orientation layer for example a polymer
- a-Si: H can be used as the semiconductor and SiN x as the gate insulator.
- Figure 1 shows a cross section through a pixel of a liquid crystal screen in various stages of manufacture.
- a first metallization layer 11 for example 200 nm MoTa
- a layer sequence consisting of a gate insulator 12, for example 350 nm SiN x , an intrinsic semiconductor 13, for example 150 nm ia-Si, and a highly doped semiconductor 14, for example 50 nm n + -a-Si, and a cover metallization , for example 200 nm Mo, applied.
- 1 b shows the structure after etching the cover metal layer 15 and the doped semiconductor layer 14 as a column line, drain / source contacts D, S and as a cover electrode of the storage capacitor C.
- the semiconductor layer 13 and the gate dielectric 12 are shown in a single plasma etching step for separating the individual thin-film transistors of the pixels and for exposing the connection areas of the gate lines and storage capacitor lines.
- a photosensitive, transparent and highly insulating polymer 16 was spun onto the structure, exposed, developed and annealed.
- a so-called Photo-BCB can be used as the polymer.
- the task of the polymer is to passivate and planarize the structure.
- the top electrode of the storage capacitor C which here also represents the drain contact of the thin-film transistor, and the connection regions of the column and row lines are decoated again by the polymer in the exposure and development step.
- a conductive, photosensitive, transparent polymer 17 is then spun on as a pixel electrode.
- a polymer called Bayer PEDT / PSS can be used for this purpose. Exposing the areas between the pixel electrodes with UV light through a photo mask causes the conductive polymer to be converted into an insulation layer. The insulating regions of the polymer are shown in dotted lines in FIG. 1e). If a photosensitive conductive polymer is used, the areas between the pixel electrodes can also be removed by means of a developer step. The individual pixel electrodes are thus effectively electrically separated from one another. After one step of the polymer PEDT / PSS at approx.
- the unexposed areas of the pixel electrodes have a sheet-related sheet resistance of 200 - 1000 ⁇ and a transparency of) 70% in the visible area, based on a dry film thickness of 900 nm.
- the transmission can be increased by reducing the dry layer thickness.
- the layer 17 can then be rubbed mechanically so that it can bring about an orientation of the liquid crystal. As a result, the application of an additional orientation layer can also be dispensed with.
- the structuring of the gate dielectric 12 can - as shown - be carried out together with the structuring of the undoped semiconductor 13 or also with the passivation 16 as masking in an additional plasma etching process.
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
Verfahren zur Herstellung einer Matrix aus Dünnschicht- transistoren mit SpeicherkapazitätenProcess for producing a matrix from thin-film transistors with storage capacities
Stand der TechnikState of the art
Die Erfindung geht aus von einem Verfahren zur Herstellung einer Matrix aus Dünnschichttransistoren mit Speicherkapazitäten, insbesondere für Flüssigkristallbildschirme nach der Gattung des unabhängigen Anspruchs.The invention is based on a method for producing a matrix of thin-film transistors with storage capacities, in particular for liquid crystal screens according to the type of the independent claim.
Aus der DE 43 10 640 Cl und aus der DE 43 39 721 AI sind jeweils Verfahren zur Herstellung einer Matrix aus Dünnschichttransistoren mit Speicherkapazitäten für Flüssigkristallbildschirme bekannt, bei denen der Fertigungsaufwand durch Reduzierung der Zahl der notwendigen photolithographischen Maskenschritte auf drei bzw. vier eingeschränkt wird. Als Halbleiter für die Dünnschichttransistoren wird bei den bekannten Verfahren a-Si:H eingesetzt. Eine Reduzierung des Fertigungsauf- wands für die Herstellung einer Dünnschichttransistor-Matrix durch Einsparung anderer Prozeßschritte, wie Ätzen, Beschichten und Reinigen, ist bei diesen Verfahren jedoch nicht vorgesehen. Vorteile der ErfindungFrom DE 43 10 640 Cl and from DE 43 39 721 AI methods for producing a matrix of thin-film transistors with storage capacities for liquid crystal screens are known, in which the manufacturing effort is reduced to three or four by reducing the number of necessary photolithographic masking steps. In the known processes, a-Si: H is used as the semiconductor for the thin-film transistors. However, a reduction in the manufacturing outlay for the production of a thin-film transistor matrix by saving other process steps, such as etching, coating and cleaning, is not envisaged with these methods. Advantages of the invention
Das erfindungsge äße Verfahren mit den kennzeichnenden Merkmalen des unabhängigen Anspruchs hat gegenüber den bekannten Verfahren den Vorteil, daß weniger Beschichtungs- und Ätzschritte sowie Schritte zur Photolackentfernung notwendig sind.The inventive method with the characterizing features of the independent claim has the advantage over the known methods that fewer coating and etching steps and steps for photoresist removal are necessary.
Dies wird dadurch erreicht, daß für die Passivierung der Matrix und zur Herstellung der Bildpunktelektroden jeweils photostrukturierbare Materialien verwendet werden. Gegenüber den bekannten Verfahren, bei denen als Passivierung SiNx und als Bildpunktelektroden in der Regel ITO eingesetzt werden, kann dadurch jeweils ein Beschichtungsschritt , nämlich ein PECVD-Verfahren für SiNx und ein Aufsputtern von ITO, jeweils ein Ätzschritt, nämlich Trockenätzen von SiNx und Naßätzen von ITO, und jeweils ein Schritt zum Abwaschen der Photolackmaskierung und die dazugehörigen Anlagen eingespart werden.This is achieved in that photostructurable materials are used for the passivation of the matrix and for the production of the pixel electrodes. Compared to the known methods, in which SiN x is used as passivation and ITO is usually used as pixel electrodes, this means that one coating step, namely a PECVD method for SiN x and one sputtering of ITO, can each have an etching step, namely dry etching of SiN x and wet etching from ITO, and one step each to wash off the photoresist mask and the associated systems can be saved.
Durch die in den abhängigen Ansprüchen aufgeführten Maßnahmen sind vorteilhafte Weiterbildungen und Verbesserungen des im unabhängigen Anspruch angegebenen Verfahrens möglich.The measures listed in the dependent claims allow advantageous developments and improvements of the method specified in the independent claim.
So ist es besonders vorteilhaft, als photostrukturierbare Materialien Polymere zu verwenden. Hierbei kann für die Passivierung ein photoempfindlicher, transparenter und hochisolierender Polymer und zur Herstellung der Bildpunktelektroden ein elektrisch leitfähiger Polymer verwendet werden.It is particularly advantageous to use polymers as the photostructurable materials. In this case, a photosensitive, transparent and highly insulating polymer can be used for the passivation and an electrically conductive polymer for the production of the pixel electrodes.
Durch eine mechanische Reibebehandlung des leitfähigen Polymers kann außerdem eine Orientierung des Flüssigkristalls vorgenommen werden, so daß das Aufbringen einer zusätzlichen Orientierungsschicht, beispielsweise eines Polymids, vollständig entfallen kann. Bei einem bevorzugten Herstellungsverfahren stellen sich die einzelnen Schritte wie folgt dar:A mechanical rubbing treatment of the conductive polymer can also be used to orient the liquid crystal, so that the application of an additional orientation layer, for example a polymer, can be completely dispensed with. In a preferred manufacturing process, the individual steps are as follows:
Aufbringen und Strukturieren einer ersten leitfähigen Schicht als Zeilen der Dünnschichttransistor-Matrix, als Gate-Kontakte der Transistoren und als Elektroden der Speicherkapazitäten,Applying and structuring a first conductive layer as rows of the thin-film transistor matrix, as gate contacts of the transistors and as electrodes of the storage capacitors,
- Aufbringen eines Gate-Isolators ;- application of a gate insulator;
Aufbringen eines Halbleiters,Application of a semiconductor,
Aufbringen eines P- oder N-dotierten Halbleiters als Drain- und Sorce-Kontakte der Transistoren,Application of a P- or N-doped semiconductor as drain and Sorce contacts of the transistors,
Aufbringen und Strukturieren einer weiteren elektrisch leitfähigen Schicht für die Spalten der Dünnschichttransistor-Matrix, für die Drain- und Source-Kontakte und die Gegenelektroden der Speicherkapazitäten,Application and structuring of another electrically conductive layer for the columns of the thin-film transistor matrix, for the drain and source contacts and the counter electrodes of the storage capacitors,
Strukturieren der dotierten Halbleiterschicht und der undotierten Halbleiterschicht,Structuring the doped semiconductor layer and the undoped semiconductor layer,
- Aufbringen, Belichten und Entwickeln eines photoempfindlichen, transparenten und isolierenden Materials,- application, exposure and development of a photosensitive, transparent and insulating material,
- Aufbringen und Belichten eines leitfähigen, photoempfindlichen, transparenten Materials.- Application and exposure of a conductive, photosensitive, transparent material.
Vorzugsweise können dabei als Halbleiter a-Si:H und als Gate- Isolator SiNx verwendet werden.Preferably, a-Si: H can be used as the semiconductor and SiN x as the gate insulator.
Durch die erhebliche Reduzierung der Zahl der Prozeßschritte lassen sich deutliche Kosteneinsparungen und gleichzeitig eine Erhöhung der Ausbeute erreichen. ZeichnungThe considerable reduction in the number of process steps enables significant cost savings and at the same time an increase in yield. drawing
Ein Ausführungsbeispiel der Erfindung ist in der Zeichnung dargestellt und in der nachfolgenden Beschreibung näher erläutert. Figur 1 zeigt einen Querschnitt durch einen Bildpunkt eines Flüssigkristallbildschirms in verschiedenen Herstel- lungsstadien.An embodiment of the invention is shown in the drawing and explained in more detail in the following description. Figure 1 shows a cross section through a pixel of a liquid crystal screen in various stages of manufacture.
Im in Fig. 1 a) dargestellten Herstellungsstadium sind auf ein Glassubstrat 10 eine erste Metallisierungsschicht 11, beispielsweise 200 nm MoTa, aufgesputtert und als Zeilenleitung und als Speicherkondensatorleitung strukturiert worden. Anschließend wurde eine Schichtfolge aus einem Gate-Isolator 12, beispielsweise 350 nm SiNx, einem intrinsischen Halbleiter 13, beispielsweise 150 nm i-a-Si, und einem hochdotierten Halbleiter 14, beispielsweise 50 nm n+-a-Si, und einer Deckmetalli- sierung, beispielsweise 200 nm Mo, aufgebracht.In the production stage shown in FIG. 1 a), a first metallization layer 11, for example 200 nm MoTa, has been sputtered onto a glass substrate 10 and structured as a row line and as a storage capacitor line. Subsequently, a layer sequence consisting of a gate insulator 12, for example 350 nm SiN x , an intrinsic semiconductor 13, for example 150 nm ia-Si, and a highly doped semiconductor 14, for example 50 nm n + -a-Si, and a cover metallization , for example 200 nm Mo, applied.
Fig. 1 b) zeigt die Struktur nach Ätzen der Deckmetallschicht 15 und der dotierten Halbleiterschicht 14 als Spaltenleitung, Drain/Source-Kontakte D, S und als Deckelektrode des Speicher- kondensators C.1 b) shows the structure after etching the cover metal layer 15 and the doped semiconductor layer 14 as a column line, drain / source contacts D, S and as a cover electrode of the storage capacitor C.
Im Verfahrensstadium nach Fig. 1 c) sind die Halbleiterschicht 13 und das Gate-Dielektrikum 12 in einem einzigen Plasma-Ätz- schritt zur Separation der einzelnen Dünnschichttransistoren der Bildpunkte und zur Freilegung der Anschlußbereiche der Gateleitungen und Speicherkondensatorleitungen dargestellt.In the process stage according to FIG. 1 c), the semiconductor layer 13 and the gate dielectric 12 are shown in a single plasma etching step for separating the individual thin-film transistors of the pixels and for exposing the connection areas of the gate lines and storage capacitor lines.
In Fig. 1 d) wurde auf die Struktur ein photoempfindlicher, transparenter und hochisolierender Polymer 16 aufgeschleudert , belichtet, entwickelt und getempert. Als Polymer kann beispielsweise ein sogenannter Photo-BCB eingesetzt werden. Die Aufgabe des Polymers besteht darin, die Struktur zu passivie- ren und zu planarisieren. Die Deckelektrode des Speicherkon- densators C, die hier gleichzeitig den Drain-Kontakt des Dünn- schichttransistors darstellt, und die Anschlußbereiche der Spalten- und der Zeilenleitungen werden bei dem Belichtungs- und Entwicklungsschritt vom Polymer wieder entschichtet .In Fig. 1 d), a photosensitive, transparent and highly insulating polymer 16 was spun onto the structure, exposed, developed and annealed. For example, a so-called Photo-BCB can be used as the polymer. The task of the polymer is to passivate and planarize the structure. The top electrode of the storage capacitor C, which here also represents the drain contact of the thin-film transistor, and the connection regions of the column and row lines are decoated again by the polymer in the exposure and development step.
Gemäß Fig. 1 e) wird anschließend ein leitfähiger, photoempfindlicher, transparenter Polymer 17 als Bildpunktelektrode aufgeschleudert. Hierzu ist beispielsweise ein Polymer der Bezeichnung PEDT/PSS der Firma Bayer AG einsetzbar. Eine Belichtung der Bereiche zwischen den Bildpunktelektroden mit UV-Licht durch eine Photo aske hindurch bewirkt eine Umwandlung des leitfähigen Polymers in eine Isolationsschicht . Die isolierenden Bereiche des Polymers sind in Fig. 1 e) gepunktet dargestellt. Falls ein photoempfindlicher leitfähiger Polymer verwendet wird, können die Bereiche zwischen den Bildpunktelektroden auch mittels eines Entwicklerschritts entfernt werden. Die einzelnen Bildpunktelektroden sind also wirkungsvoll elektrisch voneinander getrennt. Die unbelichteten Bereiche der Bildpunktelektroden besitzen nach einem Te perschritt des Polymers PEDT/PSS bei ca. 130 °C einen flächenbezogenen Schichtwiderstand von 200 - 1000 Ω und eine Transparenz von ) 70 % im sichtbaren Bereich, bezogen auf eine Trockenschicht- dicke von 900 nm. Durch eine Verringerung der Trockenschichtdicke ist eine Erhöhung der Transmission möglich. Die Schicht 17 kann anschließend mechanisch gerieben werden, so sie eine Orientierung des Flüssigkristalls bewirken kann. Hierdurch kann auch das Aufbringen einer zusätzlichen Orientierungs- schicht entfallen.1 e), a conductive, photosensitive, transparent polymer 17 is then spun on as a pixel electrode. For example, a polymer called Bayer PEDT / PSS can be used for this purpose. Exposing the areas between the pixel electrodes with UV light through a photo mask causes the conductive polymer to be converted into an insulation layer. The insulating regions of the polymer are shown in dotted lines in FIG. 1e). If a photosensitive conductive polymer is used, the areas between the pixel electrodes can also be removed by means of a developer step. The individual pixel electrodes are thus effectively electrically separated from one another. After one step of the polymer PEDT / PSS at approx. 130 ° C, the unexposed areas of the pixel electrodes have a sheet-related sheet resistance of 200 - 1000 Ω and a transparency of) 70% in the visible area, based on a dry film thickness of 900 nm. The transmission can be increased by reducing the dry layer thickness. The layer 17 can then be rubbed mechanically so that it can bring about an orientation of the liquid crystal. As a result, the application of an additional orientation layer can also be dispensed with.
Die Strukturierung des Gate-Dielektrikums 12 kann - wie dargestellt - zusammen mit der Strukturierung des undotierten Halbleiters 13 oder auch mit der Passivierung 16 als Maskierung in einem zusätzlichen Plasmaätzprozeß durchgeführt werden. The structuring of the gate dielectric 12 can - as shown - be carried out together with the structuring of the undoped semiconductor 13 or also with the passivation 16 as masking in an additional plasma etching process.
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP98966240A EP1038320A2 (en) | 1997-12-10 | 1998-11-17 | Method for producing a matrix from thin-film transistors with storage capacities |
JP2000524811A JP2001526412A (en) | 1997-12-10 | 1998-11-17 | Fabrication of a matrix composed of thin-film transistors with storage capacitors |
KR1020007006284A KR20010032940A (en) | 1997-12-10 | 1998-11-17 | Method for producing a matrix from thin-film transistors with storage capacities |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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DE19754784A DE19754784B4 (en) | 1997-12-10 | 1997-12-10 | Process for producing a matrix from thin-film transistors with storage capacities |
DE19754784.2 | 1997-12-10 |
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WO1999030352A2 true WO1999030352A2 (en) | 1999-06-17 |
WO1999030352A3 WO1999030352A3 (en) | 1999-12-09 |
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PCT/EP1998/007361 WO1999030352A2 (en) | 1997-12-10 | 1998-11-17 | Method for producing a matrix from thin-film transistors with storage capacities |
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EP (1) | EP1038320A2 (en) |
JP (1) | JP2001526412A (en) |
KR (1) | KR20010032940A (en) |
DE (1) | DE19754784B4 (en) |
TW (1) | TW432707B (en) |
WO (1) | WO1999030352A2 (en) |
Cited By (1)
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US6830814B1 (en) * | 1999-07-20 | 2004-12-14 | Robert Bosch Gmbh | Layer containing an electroconductive transparent material, method for producing same and uses thereof |
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KR100485625B1 (en) * | 2001-12-20 | 2005-04-27 | 엘지.필립스 엘시디 주식회사 | Liquid Crystal Display Device and Fabricating Method Thereof |
KR101023292B1 (en) * | 2003-10-28 | 2011-03-18 | 엘지디스플레이 주식회사 | Liquid Crystal Display Manufacturing Method |
CN103700673B (en) * | 2013-12-24 | 2017-07-04 | 京东方科技集团股份有限公司 | A kind of display device, array base palte and preparation method thereof |
US11676855B2 (en) * | 2020-02-26 | 2023-06-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Patterning interconnects and other structures by photo-sensitizing method |
DE102020130905A1 (en) * | 2020-02-26 | 2021-08-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structuring of interconnects and other structures using photosensitization processes |
Family Cites Families (6)
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JPS61292183A (en) * | 1985-05-25 | 1986-12-22 | 旭硝子株式会社 | Electrochromic display element |
DE4310640C1 (en) * | 1993-03-31 | 1994-05-11 | Lueder Ernst | Thin-film transistor matrix mfg. system - with subsequent indium-tin oxide layer used as mask for etching prior metallisation mark |
ATE287929T1 (en) * | 1994-05-06 | 2005-02-15 | Bayer Ag | CONDUCTIVE COATINGS MADE FROM MIXTURES CONTAINING POLYTHIOPHENES AND SOLVENTS |
KR970011972A (en) * | 1995-08-11 | 1997-03-29 | 쯔지 하루오 | Transmission type liquid crystal display device and manufacturing method thereof |
JPH0990421A (en) * | 1995-09-27 | 1997-04-04 | Sharp Corp | Liquid crystal display device and manufacturing method thereof |
DE69633523T2 (en) * | 1995-11-22 | 2006-02-16 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy Naval Research Laboratory | CONDUCTIVE PATTERNED POLYMER SURFACE, METHOD FOR THE PRODUCTION THEREOF AND METHOD OF CONTAINING THEREOF |
-
1997
- 1997-12-10 DE DE19754784A patent/DE19754784B4/en not_active Expired - Fee Related
-
1998
- 1998-11-17 KR KR1020007006284A patent/KR20010032940A/en not_active Ceased
- 1998-11-17 WO PCT/EP1998/007361 patent/WO1999030352A2/en not_active Application Discontinuation
- 1998-11-17 EP EP98966240A patent/EP1038320A2/en not_active Ceased
- 1998-11-17 JP JP2000524811A patent/JP2001526412A/en active Pending
- 1998-12-07 TW TW087120245A patent/TW432707B/en active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6830814B1 (en) * | 1999-07-20 | 2004-12-14 | Robert Bosch Gmbh | Layer containing an electroconductive transparent material, method for producing same and uses thereof |
Also Published As
Publication number | Publication date |
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JP2001526412A (en) | 2001-12-18 |
EP1038320A2 (en) | 2000-09-27 |
KR20010032940A (en) | 2001-04-25 |
DE19754784B4 (en) | 2004-02-12 |
DE19754784A1 (en) | 1999-06-24 |
TW432707B (en) | 2001-05-01 |
WO1999030352A3 (en) | 1999-12-09 |
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