[go: up one dir, main page]

WO2003039090A3 - Method and apparatus for error correction in a data transmission system - Google Patents

Method and apparatus for error correction in a data transmission system Download PDF

Info

Publication number
WO2003039090A3
WO2003039090A3 PCT/US2002/034961 US0234961W WO03039090A3 WO 2003039090 A3 WO2003039090 A3 WO 2003039090A3 US 0234961 W US0234961 W US 0234961W WO 03039090 A3 WO03039090 A3 WO 03039090A3
Authority
WO
WIPO (PCT)
Prior art keywords
value
data transmission
error correction
transmission system
decision system
Prior art date
Application number
PCT/US2002/034961
Other languages
French (fr)
Other versions
WO2003039090A2 (en
Inventor
Hiroshi Takatori
James Little
Scott Chiu
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to AU2002363157A priority Critical patent/AU2002363157A1/en
Publication of WO2003039090A2 publication Critical patent/WO2003039090A2/en
Publication of WO2003039090A3 publication Critical patent/WO2003039090A3/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0054Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0062Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334Processing of samples having at least three levels, e.g. soft decisions

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Dc Digital Transmission (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

A receiver includes a decision system. Which calculates a value of an input signal and holds the value as a tentative value. The decision system calculates an error value, amplifies the error value, and holds the amplified error value as a corrected value. If the amplified error value is within a marginal range and the input signal was in transition from a positive to negative state, or a negative to positive state, then the decision system overrides the tentative value with the corrected value.
PCT/US2002/034961 2001-10-31 2002-10-30 Method and apparatus for error correction in a data transmission system WO2003039090A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002363157A AU2002363157A1 (en) 2001-10-31 2002-10-30 Method and apparatus for error correction in a data transmission system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US171201A 2001-10-31 2001-10-31
US10/001,712 2001-10-31

Publications (2)

Publication Number Publication Date
WO2003039090A2 WO2003039090A2 (en) 2003-05-08
WO2003039090A3 true WO2003039090A3 (en) 2003-07-10

Family

ID=21697445

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/034961 WO2003039090A2 (en) 2001-10-31 2002-10-30 Method and apparatus for error correction in a data transmission system

Country Status (3)

Country Link
CN (1) CN100525270C (en)
AU (1) AU2002363157A1 (en)
WO (1) WO2003039090A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102769587A (en) * 2012-07-09 2012-11-07 广东威创视讯科技股份有限公司 Method and devices for enhancing PCI-E (Peripheral Component Interconnect - Express) data transmission stability
CN105897629A (en) * 2016-06-15 2016-08-24 晶晨半导体(上海)有限公司 Signal decision device and signal decision method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3760282A (en) * 1972-03-29 1973-09-18 Ibm Data recovery system
EP0296253A1 (en) * 1987-01-12 1988-12-28 Fujitsu Limited Discrimination timing control circuit
EP0594246A1 (en) * 1992-10-22 1994-04-27 Koninklijke Philips Electronics N.V. Data processing circuit
WO1995020843A1 (en) * 1994-01-31 1995-08-03 Motorola Inc. A demodulator for frequency shift keyed signals

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3760282A (en) * 1972-03-29 1973-09-18 Ibm Data recovery system
EP0296253A1 (en) * 1987-01-12 1988-12-28 Fujitsu Limited Discrimination timing control circuit
EP0594246A1 (en) * 1992-10-22 1994-04-27 Koninklijke Philips Electronics N.V. Data processing circuit
WO1995020843A1 (en) * 1994-01-31 1995-08-03 Motorola Inc. A demodulator for frequency shift keyed signals

Also Published As

Publication number Publication date
CN100525270C (en) 2009-08-05
AU2002363157A1 (en) 2003-05-12
CN1611045A (en) 2005-04-27
WO2003039090A2 (en) 2003-05-08

Similar Documents

Publication Publication Date Title
WO2006083403A3 (en) Closed loop power control with high dynamic range
AU6152600A (en) Equalization with dc-offset compensation
AU2003295696A1 (en) Method and apparatus to control transmission power and transmission rate of an air link
WO2008051569A3 (en) Entrainment avoidance with pole stabilization
WO2005002063A3 (en) Method and system for suppressing carrier leakage
EP1617307A3 (en) Servo control apparatus and method using absolute value input signals
TW200737868A (en) Method and device for controlling a signal receiver
WO2006009955A3 (en) Self-calibrated path loss position estimation process, device and system
WO2006107450A3 (en) Agc with integrated wideband interferer detection
EP1168657A3 (en) Transmission power control method
WO2005065155A3 (en) Apparatus and method for adaptive broadcast transmission
FI20000820A7 (en) Channel equalizer optimization
WO2006127805A3 (en) Method and system for receiver impairment estimation and correction
WO2008126217A1 (en) Distortion compensation controller and distortion compensation control method
WO2006112790A3 (en) Method and apparatus for canceling interference from high power, high data rate signals
EP1054541A3 (en) Multicarrier receiver with soft decisions based on estimates of interference
WO2008110987A3 (en) A data processing system for clipping correction
WO2006130534A3 (en) Method of actuator control
WO2009014740A3 (en) Reduced distortion radio frequency amplifiers
WO2003013030A3 (en) An optical signal receiver
WO2006124691A3 (en) Low power glare sensor
WO2006071932A3 (en) System for dynamic control of automatic gain control take-over-point and method of operation
WO2010064791A3 (en) Apparatus and method for controlling gain of polar transmitter
EP1320097A3 (en) Adaptive equalizer
EP1220445A3 (en) Transmission power control apparatus and method for suppressing the peak power of the transmission data

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SI SK SL TJ TM TN TR TT TZ UA UG UZ VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LU MC NL PT SE SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 20028265270

Country of ref document: CN

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP