WO2006112039A1 - 表面実装型光半導体装置およびその製造方法 - Google Patents
表面実装型光半導体装置およびその製造方法 Download PDFInfo
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- WO2006112039A1 WO2006112039A1 PCT/JP2005/009992 JP2005009992W WO2006112039A1 WO 2006112039 A1 WO2006112039 A1 WO 2006112039A1 JP 2005009992 W JP2005009992 W JP 2005009992W WO 2006112039 A1 WO2006112039 A1 WO 2006112039A1
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- hole
- conductive film
- optical semiconductor
- main surface
- wall
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
- H10H20/841—Reflective coatings, e.g. dielectric Bragg reflectors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/8506—Containers
Definitions
- the present invention relates to a surface mount optical semiconductor device in which a light receiving / emitting element is housed in a recess formed on a base to constitute a package.
- FIG. 5 shows a surface-mounted light-emitting diode 101 described in Patent Document 1.
- reference numeral 102 denotes a base made of a powerful ceramic such as alumina, aluminum nitride, or boron nitride.
- a wiring pattern 103 obtained by etching a copper foil is formed.
- a terminal portion 104 for attachment to a mounting circuit board is formed by plating of a conductive member, printing'firing, or the like.
- the wiring pattern 103 and the terminal portion 104 are conductively connected.
- a ramp 105 is joined so as to surround the wiring pattern 103, thereby forming a recess 106.
- bumps 107 are formed of gold or solder, and the bumps 107 and the electrode pads of the light emitting elements 108 are joined by ultrasonic welding.
- the light emitting element 108 is mounted.
- a transparent resin 109 is filled in the recess 106 and cured by heating to form a surface mount type light emitting diode.
- Patent Document 1 Japanese Patent Laid-Open No. 2003-37298
- the ceramic constituting the base 102 has a grain boundary in which alumina particles of a minimum of 0.7 ⁇ are gathered, so the thickness of the base 102 is reduced to 150 ⁇ m or less. If so, there is a problem in maintaining airtightness. In addition, the thinning causes warping of the ceramic substrate after sintering, resulting in poor workability, and difficulty in mounting on a mounting circuit board.
- the present invention solves the above-described conventional problems, and an object thereof is to provide a surface-mounted optical semiconductor device that is small and thin, has high airtightness, and has reduced manufacturing costs. Means for solving the problem
- a surface-mount optical semiconductor device includes a base formed of a glass substrate, a recess formed on the first main surface side of the base, and the recess A through hole penetrating from the bottom surface portion of the base to the second main surface of the base, an inner wall conductive film formed on the inner wall surface of the through hole, and the opening around the through hole in the bottom surface portion of the recess.
- a wiring pattern comprising a conductive film formed in a conductive state with the inner wall conductive film, an optical semiconductor element bonded to the wiring pattern via a conductive bonding material, and an opening of the through hole in the second main surface
- a recess is formed on the first main surface side of the glass substrate, and the bottom surface portion force of the recess penetrates the second main surface of the glass substrate.
- a through-hole is formed, a conductive film is formed on the inner wall of the through-hole and around the opening of the through-hole in the first main surface and the second main surface, and a metal portion is filled in the through-hole.
- the optical semiconductor element is bonded to the conductive film formed on the first main surface with a conductive bonding material bonded to the conductive film.
- the surface-mount type optical semiconductor device having the above-described configuration, it is possible to obtain a small and thin structure with high airtightness, and further, workability and mounting performance can be achieved without causing warpage even if the size and thickness are reduced. It is possible to obtain characteristics with good mountability on the road substrate.
- FIG. 1A is a plan view of a surface-mounted light-emitting diode according to Embodiment 1 of the present invention.
- FIG. 1B is a cross-sectional view taken along the line AA ′ of FIG. 1A.
- FIG. 2A is a plan view of a surface-mounted light-emitting diode device according to Embodiment 2 of the present invention.
- FIG. 2B is a back view of the same surface-mounted light-emitting diode device.
- FIG. 2C is a sectional view taken along line BB ′ of FIG. 2A.
- FIG. 3A is a cross-sectional view along the process flow showing the method for manufacturing the surface-mounted optical semiconductor device in the third embodiment of the present invention.
- FIG. 3B is a cross-sectional view showing the next step of FIG. 3A.
- FIG. 3C is a cross-sectional view showing the next step of FIG. 3A.
- FIG. 3D is a cross-sectional view showing the next step of FIG. 3A.
- FIG. 3E is a cross-sectional view showing the next step of FIG. 3A.
- FIG. 4 is a cross-sectional view of a surface-mounted light-emitting diode according to Embodiment 4 of the present invention.
- FIG. 5 is a cross-sectional view of a conventional surface-mounted light emitting diode.
- the wall surface of the recess forms a radiation wall that radiates toward the surface from the bottom surface, and the wiring pattern is formed on the radiation wall.
- a reflective film is formed in an insulated state.
- the through hole has a larger area in the opening in the second main surface than in the opening in the bottom surface of the recess.
- the area of the metal part exposed on the second main surface can be increased, and heat dissipation can be improved.
- the concave portion is filled with a transparent resin.
- a translucent lid that covers the concave portion may be fixed to the first main surface side.
- the step of filling the through hole with a metal portion is performed by filling the through-hole with a spherical wire formed at the tip of a single tool. It is carried out by welding by ultrasonic thermocompression bonding. As a result, it is possible to join the conductive film formed in the through hole and the spherical metal material formed by the wire bonder at high speed and with high accuracy by using the thermobonding method with ultrasonic waves using the wire bonder. .
- FIG. 1A is a plan view of a light-emitting diode 1 that is a surface-mounted optical semiconductor device according to Embodiment 1
- FIG. 1B is a cross-sectional view taken along the line AA ′ of FIG. 1A.
- the base 2 in the IB is the linear expansion coefficient of 30 X 10- 7 Z ° C ⁇ 80 X 10- 7 Z ° C borosilicate glass or non-alkali glass or the linear expansion coefficient of 80 X 10, — 7 / ° C to 120 X 10— It is formed by a glass substrate of 7 Z ° C soda glass.
- the thickness of the glass substrate can be set to 0.15 mm, for example.
- the first main surface 3 of the base 2 is formed with a recess 5 having a flat portion 4 on the bottom surface.
- Through holes 7 that penetrate through the base 2 and reach the second main surface 6 of the base 2 are formed in at least two places of the flat part 4.
- a wiring pattern 9 made of a conductive film on which the light emitting element 8 is mounted is formed.
- a terminal portion 10 made of a conductive film connected to an external circuit (not shown) is formed around the opening of the through hole 7 in the second main surface 6.
- the recess 5 can be formed, for example, by subjecting a flat glass substrate to blasting. Alternatively, a method of forming the recess 5 at the same time as the glass substrate may be used.
- the recess 5 has a shape that spreads radially from the bottom to the top.
- a reflective coating 12 that has power such as silver, rhodium, and aluminum is formed in an insulated state from the conductive coating that forms the wiring pattern 9 by using vapor deposition or sputtering.
- the through hole 7 is formed so that the inner wall diameter gradually decreases from the first main surface 3 toward the second main surface 6. In one example, the diameter of the through hole 7 is 120 ⁇ m on the first main surface 3 side, and 80 ⁇ m on the second main surface 6 to the ⁇ .
- a conductive film 7a is formed on the inner wall of the through hole 7, whereby the wiring pattern 9 and the terminal portion 10 are conductively connected. Further, the opening on the first main surface 3 side is closed, and a metal portion 13 bonded to the conductive film is formed.
- the conductive film is formed on the glass surface of the base 2 by sputtering using chromium or titanium to a thickness of 0.05 111 to 0.1 ⁇ m, further palladium, and gold on the top surface. It has a configuration that forms According to the structure of this conductive film, chromium or titanium is excellent in bondability with glass, no ⁇ radium has the function of noria metal, and gold is effective in corrosion resistance and bondability with metal.
- a bump 14 is formed on the wiring pattern 9 by using gold or solder, and an electrode pad (not shown) of the light-emitting element 8 and the bump 14 are ultrasonically welded. Further, the concave portion 5 of the base 2 is filled with a liquid translucent resin such as an epoxy resin or a silicon resin that protects the mounting portion of the light emitting element 8 and cured by heating to thereby transmit the light. A layer of the photo-resin 15 is formed to form a package of the surface-mounted light-emitting diode 1.
- the conductive film 7a formed in the through hole 7 is joined to the metal portion 13, so that the air tightness of the through hole 7 is high.
- the translucent resin 15 is used for the purpose of protecting the mounting portion of the light emitting element 8.
- the color tone of light is converted by mixing the translucent resin with a phosphor. It is also possible to do.
- FIG. 2A to 2C show a surface-mounted light-emitting diode device according to the second embodiment.
- the apparatus is configured as an array type by arranging a plurality of surface-mounted light-emitting diodes 1 each having a light-emitting element 8 mounted thereon.
- 2A is a plan view
- FIG. 2B is a back view
- FIG. 2C is a cross-sectional view along the line BB ′ in FIG. 2A.
- FIG. 1 the same components as those shown in FIG. 1 are denoted by the same reference numerals, and the description will be simplified.
- the first main surface 3 has a recess 5 having a flat portion 4 on the bottom surface, and the bottom flat portion 4 of each recess 5 penetrates the second main surface 6 of the base 2 in at least two places.
- Through hole 7 is formed.
- a wiring pattern 9 made of a conductive film for mounting the light emitting element 8 is formed around the opening of the through hole 7 in the first main surface 3.
- a terminal portion 17 made of a conductive film connected to an external circuit (not shown) is formed around the opening of the through hole 7 in the second main surface 6.
- the terminal portion 17 forms a conductive pattern in which the bases 2 are conductively connected on the second main surface 6 and has a function of connecting to an external circuit (not shown), as well as a plurality of surface mounted light emitting diodes 1. It also has a function of connecting to the array type.
- the through hole 7 has a conductive film formed on the inner wall thereof to electrically connect the wiring pattern 9 and the terminal portion 17, and further, a metal portion 13 that joins the opening of the first main surface 3 and the conductive film. Is formed.
- a bump 14 is formed on the wiring pattern 9 with gold or solder, and the electrode pad of the light emitting element 8 and the bump 14 are ultrasonically welded. Further, the surface mount type light emitting diode device is configured by filling the concave portion 5 of the base 2 with the translucent resin 15 and curing it by heating. According to this configuration, since the plurality of bases 2 are formed on the sheet-like glass substrate 16, a large number of light emitting diodes can be integrated and miniaturized.
- 3A to 3E are cross-sectional views along a process flow for explaining the method for manufacturing the surface-mounted optical semiconductor device in the third embodiment.
- 3A to 3E the same components as those shown in FIG. 1A and IB are denoted by the same reference numerals, and the description will be simplified.
- the glass substrate 16 for forming the base 2 is made of, for example, a borosilicate glass, an alkali-free glass, a soda glass, or the like having high insulation and airtightness. Prepare a substrate with an alkali-free glass strength of approximately 0.15 mm.
- the first main surface 3 of the glass substrate 16 is subjected to a sand blasting method, an etching method, or the like to form a recess 5 having a flat portion 4 on the bottom surface as shown in FIG. 3B. Further, through holes 7 penetrating the second main surface 6 of the base 2 are formed in at least two locations of the flat portion 4.
- the concave portion 5 has a shape that spreads radially by applying force to the bottom force surface.
- a reflective film 12 having a strength such as silver, rhodium, and aluminum is formed on the radiation wall 11 of the recess 5 that spreads radially using a vapor deposition method or a sputtering method.
- a wiring pattern 9 made of a conductive film for mounting the light emitting element 8 is formed around the opening of the through hole 7 in the first main surface 3.
- a terminal portion 10 made of a conductive film connected to an external circuit (not shown) is formed around the opening of the through hole 7 in the second main surface 6.
- the wiring pattern 9 and the terminal portion 10 are conductively connected in the through hole 7 by the conductive film 7a.
- 0.1 ⁇ m of chromium film is formed on alkali-free glass by sputtering method, and 0.05 ⁇ m of palladium is deposited on the conductive film. To form.
- a metal portion 13 that joins the periphery of the opening of the through hole 7 in the first main surface 3 and the conductive film 7a is formed.
- a method of forming the metal part 13 a method using a ball bonder can be used.
- the through hole 7 has a diameter of 100 m to 150 m, and has a shape in which the inner wall diameter gradually decreases from the first main surface 3 to the second main surface 6.
- the through hole 7 is appropriately dimensioned according to the dimension of the metal wire to be bonded and the bonding method.
- an up-and-down moving type tool (not shown) is arranged in accordance with the position of the through hole 7.
- a metal wire is passed through the center of this tool, and its tip is formed in a substantially hemispherical shape.
- the metal wire can be selected from gold, copper, and the like, and is appropriately selected according to the material of the conductive film formed on the base 2. .
- a metal wire mainly composed of gold is used as a case where a metal wire mainly composed of gold is used will be described.
- the thickness of the metal sheath is, for example, 25 ⁇ to 50 / ⁇ m in diameter. When gold wire is used, it has high corrosion resistance and is effective for joining all conductive film materials.
- the ball portion is formed by setting as described above and heating and melting the tip of the metal wire with a torch (not shown). This ball portion has a force of about 3 to 4 times the diameter of the metal wire, and a size of about 120 ⁇ m in the case of a 38 ⁇ m gold wire. The ball portion is formed by generating a spark discharge between the tip of the metal wire and another potential point.
- ultrasonic vibration is applied in the Y direction to the through hole 7 of the base 2 heated to 150 ° C to 350 ° C in accordance with the descending movement of the mill tool, and mechanical vibration is applied in the X direction. While applying vibration, press the ball part downward. After that, the tool is raised and the metal wire is cut at an appropriate length.
- the metal wire is cut, for example, when it is heated and melted with a torch (not shown), a ball portion is formed in the cut portion.
- the tip of the metal wire is filled in the ball portion force through hole 7 formed in a substantially hemispherical shape, and at the same time joined to the conductive film 7a formed on the inner wall of the through hole 7.
- the metal part 13 for electrical conduction is formed. Therefore, the airtightness of the through hole 7 is remarkably improved as compared with the conventional case, and the airtightness is stably maintained.
- bumps 14 such as gold or solder are formed on the wiring pattern 9 on the first main surface 3 of the base 2 and ultrasonically welded to the electrode pads of the light emitting element 8. .
- the terminal portion 10 formed on the second main surface 6 of the base 2 is electrically connected to the light emitting element 8 via the conductive film 7a, the wiring pattern 9 and the bump 14 formed on the inner wall of the through hole 7. Connected.
- the concave portion 5 in which the light-emitting element 8 is mounted is filled with a liquid translucent resin such as epoxy resin or silicon resin, and cured to form a layer of translucent resin 15. To complete the surface-mount light-emitting diode package.
- a liquid translucent resin such as epoxy resin or silicon resin
- a light-emitting diode that is a surface-mounted optical semiconductor device according to Embodiment 4 of the present invention, This will be described with reference to the sectional view of FIG.
- the basic structure of this light emitting diode is the same as that of the first embodiment shown in FIG.
- the difference from the structure of the first embodiment is the shape of the through hole 18 and the metal part 19 filled therein.
- the through hole 18 has a larger area in the opening in the second main surface 6 than in the opening in the bottom surface 4 of the recess 5. Thereby, the area of the metal part 19 exposed on the second main surface 6 can be increased, and the heat dissipation can be improved. Therefore, it is desirable to fill the metal part 19 with a metal material having excellent thermal conductivity.
- the filling of the metal material can be performed by using, for example, electroplating or applying a conductive paste.
- a flat translucent lid 20 that covers the recess 5 is fixed to the first main surface 3.
- a lens or a lens molded in advance with glass or translucent resin can be used, and a lens can be used.
- a package including a light-emitting element, a light-receiving element, and the like can be configured to be small and thin with good airtightness, and is useful for a surface-mounted light-emitting diode or an array type surface-mounted light-emitting diode device. .
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Abstract
Description
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Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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US11/910,334 US7705465B2 (en) | 2005-04-01 | 2005-05-31 | Surface-mount type optical semiconductor device and method for manufacturing the same |
JP2007521017A JPWO2006112039A1 (ja) | 2005-04-01 | 2005-05-31 | 表面実装型光半導体装置およびその製造方法 |
US12/718,503 US7867794B2 (en) | 2005-04-01 | 2010-03-05 | Surface-mount type optical semiconductor device and method for manufacturing the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2005106682 | 2005-04-01 | ||
JP2005-106682 | 2005-04-01 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
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US11/910,334 A-371-Of-International US7705465B2 (en) | 2005-04-01 | 2005-05-31 | Surface-mount type optical semiconductor device and method for manufacturing the same |
US12/718,503 Division US7867794B2 (en) | 2005-04-01 | 2010-03-05 | Surface-mount type optical semiconductor device and method for manufacturing the same |
Publications (1)
Publication Number | Publication Date |
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WO2006112039A1 true WO2006112039A1 (ja) | 2006-10-26 |
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PCT/JP2005/009992 Ceased WO2006112039A1 (ja) | 2005-04-01 | 2005-05-31 | 表面実装型光半導体装置およびその製造方法 |
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US (2) | US7705465B2 (ja) |
JP (1) | JPWO2006112039A1 (ja) |
CN (1) | CN100550445C (ja) |
WO (1) | WO2006112039A1 (ja) |
Cited By (7)
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JP2011040499A (ja) * | 2009-08-07 | 2011-02-24 | Seiko Instruments Inc | 電子デバイス及びその製造方法 |
JP2016091023A (ja) * | 2014-11-06 | 2016-05-23 | 新科實業有限公司SAE Magnetics(H.K.)Ltd. | ウェハレベルパッケージングされた光学サブアセンブリ及びそれを有する送受信モジュール |
JP2016152342A (ja) * | 2015-02-18 | 2016-08-22 | ローム株式会社 | 電子装置 |
KR101911984B1 (ko) * | 2011-07-22 | 2019-01-03 | 가디언 인더스트리즈 코퍼레이션. | 개선된 led 조명 시스템 및/또는 그 제조 방법 |
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JP2021500735A (ja) * | 2017-09-15 | 2021-01-07 | エルジー イノテック カンパニー リミテッド | 発光素子パッケージ及びこれを含む照明装置 |
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US7244965B2 (en) | 2002-09-04 | 2007-07-17 | Cree Inc, | Power surface mount light emitting die package |
US7775685B2 (en) * | 2003-05-27 | 2010-08-17 | Cree, Inc. | Power surface mount light emitting die package |
US7339198B2 (en) * | 2004-01-16 | 2008-03-04 | Yu-Nung Shen | Light-emitting diode chip package body and packaging method thereof |
US7980743B2 (en) * | 2005-06-14 | 2011-07-19 | Cree, Inc. | LED backlighting for displays |
US20060292747A1 (en) * | 2005-06-27 | 2006-12-28 | Loh Ban P | Top-surface-mount power light emitter with integral heat sink |
CN100586253C (zh) * | 2005-11-09 | 2010-01-27 | 皇家飞利浦电子股份有限公司 | 包装、包装载体及其制造方法、诊断设备及其制造方法 |
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Also Published As
Publication number | Publication date |
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US7867794B2 (en) | 2011-01-11 |
US20080191227A1 (en) | 2008-08-14 |
CN100550445C (zh) | 2009-10-14 |
US7705465B2 (en) | 2010-04-27 |
JPWO2006112039A1 (ja) | 2008-11-27 |
CN101156252A (zh) | 2008-04-02 |
US20100159621A1 (en) | 2010-06-24 |
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