WO2006118147A1 - Polar coordinate modulation circuit, polar coordinate modulation method, integrated circuit, and radio transmitting apparatus - Google Patents

Abstract

A polar coordinate modulation circuit, a polar coordinate modulation method, an integrated circuit, and a radio transmitting apparatus wherein the path delay difference between a phase signal and an amplitude signal can be compensated for with high precision in a polar coordinate modulation system, while the increase of the circuit scale being suppressed. A delay amount determining part (102) stores, as table data, the delay amount information, which is based on the step response characteristic of a power amplifying part (105), for the amplitude values of amplitude signals and for transmission level information (S1). In this way, the delay adjustment is performed with an amplitude signal and transmission level information (S1) used as reference signals, whereby the path delay difference between the amplitude signal and the phase signal can be compensated for with high precision, while the increase of the circuit scale being suppressed.

Description

 Specification

 Polar coordinate modulation circuit, polar coordinate modulation method, integrated circuit, and wireless transmission device

 [0001] The present invention relates to a polar modulation circuit, a polar modulation method, an integrated circuit, and a radio transmission apparatus that ensure synchronization when combining a phase modulation signal and an amplitude modulation signal in a polar modulation system that realizes a highly efficient transmitter About.

 Background art

 [0002] In recent cellular phone services, demand for data communication in addition to voice calls is increasing, so it is important to improve communication speed. For example, in the GSM (Global System for Mobile communications) system, which is prevalent mainly in Europe and Asia, voice calls are conventionally performed using GMSK modulation that shifts the phase of the carrier wave according to the transmission data. I came. Furthermore, by shifting the phase and amplitude of the carrier wave according to the transmission data, 3 π Z8rotating8—PSK modulation (hereinafter abbreviated as “8-PSK modulation”) is obtained by increasing the bit information per symbol three times that of GMSK modulation. EDGE (Enhanced Data rates for GSM Evolution), which also performs data communication, has been proposed.

 [0003] In a linear modulation method with amplitude fluctuation, such as 8—PSK modulation, there is a strict requirement for linearity in the power amplifier of the radio transmitter. In general, the power efficiency in the linear region of the power amplifier is lower than that in the saturation region. Therefore, when the conventional quadrature modulation method is applied to the linear modulation method, it is difficult to increase the power efficiency.

[0004] Therefore, the transmission signal is separated into a constant amplitude phase signal and an amplitude signal, and phase modulation is performed by a phase modulator based on the constant amplitude phase signal, so that the power amplifying unit performs a constant oscillation level at which saturation operation is performed. A method of synthesizing amplitude modulation by inputting a width phase modulation signal and driving a control voltage of a power amplifier at high speed is known. This is called the EER method (Envelope Elimination & Restoration), Meji ί polar, polar modulation method (Po ~~ τ ~~ !! system, polar modulation system). This is a method that achieves efficiency (for example, see Non-Patent Document 1). In the following, it differs from the quadrature modulation method. In order to clarify that it is a modulation method, it is called a polar coordinate modulation method.

 FIG. 11 is a diagram obtained by extracting and plotting the 200 to 400 s] portion in one time slot (577 [/ z s]) of GSM for the amplitude signal at the time of 8-PSK modulation. In FIG. 11, the horizontal axis is the elapsed time of the starting force of the time slot, and the vertical axis is the amplitude of the amplitude signal. In the polar modulation method, since the constant amplitude phase modulation signal is input to the power amplifier, the power amplifier can be used at the saturation operating point, which is advantageous in terms of power efficiency.

 [0006] However, in order to represent an amplitude signal in which the inflection point of the maximum value or minimum value of the amplitude exists within 2 [s] as shown in FIG. 11, the control voltage of the power amplifier is driven at high speed. There is a need. Therefore, an improvement technology (distortion compensation technology) is required for the output response of the power amplifier to changes in the input control voltage.

 [0007] Further, since the polar modulation method is a method in which a transmission signal is once separated into an amplitude signal and a phase signal and recombined, the amplitude signal and the phase signal are separated after the separation and before being recombined. If the synchronization is lost, the transmitted signal cannot be expressed accurately during recombination. Therefore, a synchronization adjustment technique for synchronizing the amplitude signal and the phase signal is necessary.

 [0008] As described so far, the prior art relating to the two techniques required in the polar modulation method will be described.

 [0009] First, as a conventional technique related to distortion compensation and synchronization adjustment in the polar modulation method, an output signal amplitude characteristic (AM-AM) with respect to a control voltage in a saturation operation type power amplification unit at a predetermined input high-frequency signal amplitude. There are some which store Amplitude Modulation to Amplitude Modulation ion conversion (AM) and pass phase characteristics (AM-PM: Amplitude Modulation to Phase Modulation conversion) in a memory. In this conventional technique, predistortion type distortion compensation is performed with reference to the memory, and after a transmission signal is separated into an amplitude signal and a phase signal, a delay adjustment unit is provided in the path of the amplitude signal or the phase signal. And synchronization between both signals is ensured (see, for example, Patent Document 1).

FIG. 12 is a block diagram showing a conventional transmission device described in Patent Document 1. As shown in FIG. 12, this transmission apparatus includes a power amplification unit (PA) 900, a polar coordinate conversion unit 901, a delay adjustment unit 902, a memory 903, an amplitude information correction unit 904, and an amplitude modulation unit 905. A phase changer having a width controller unit 906, a phase information correction unit 907, and a phase modulation unit 908. A modulation signal generator 909.

 The polar coordinate conversion unit 901 separates the IQ signal (I, Q) input from a baseband signal generation unit (not shown) into an amplitude signal r and a constant amplitude phase signal Θ. The delay adjustment unit 902 gives predetermined delays to the input amplitude signal r and phase signal Θ, respectively, and ensures synchronization between the output amplitude signal and phase signal Θ2. The memory 903 stores the AM-AM characteristic and the AM-PM characteristic for the control signal input to the power amplification unit 900 in a state where a predetermined input high frequency signal amplitude is given to the power amplification unit 900. In addition, an amplitude correction signal and a phase correction signal that are the reverse characteristics of the power amplification unit 900 are output according to the input amplitude signal r2.

 The amplitude information correction unit 904 corrects the input amplitude signal based on the amplitude correction signal output from the memory 903. Based on the output signal from the amplitude information correction unit 904, the amplitude modulation unit 905 drives the control voltage of the power amplification unit 900 at high speed. The phase information correction unit 907 performs correction on the input phase signal based on the phase correction signal output from the memory 903. The phase modulation unit 908 performs phase modulation based on the output signal from the phase information correction unit 907.

 In this way, the amplitude modulation signal and the phase modulation signal distorted in advance in consideration of the inverse characteristic of the output characteristic with respect to the input control signal to the power amplification unit 900 are actually generated in the power amplification unit 900. The desired output amplitude and phase are affected by the amplitude and phase distortion, and the output response (linearity) to the input control voltage can be improved. In addition, since the delay adjustment unit 9002 can ensure synchronization between the amplitude signal and the phase signal, the transmission signal can be accurately represented.

 However, the technique described in Patent Document 1 does not disclose a specific method for distortion compensation and a specific method for synchronization adjustment. Therefore, for example, it is not possible to cope with a case where the synchronization between the amplitude signal and the phase signal is lost due to some reason.

FIG. 13 is a graph plotting the pass phase characteristics when a control voltage that gradually changes (monotonically increasing!) Or monotonously decreases over time is applied to the power amplifier. In FIG. 13, the horizontal axis represents the normalized control voltage, and the vertical axis represents the passing phase rotation amount based on the normalized control voltage 1. The solid line in the figure represents the passing phase characteristic when the normal voltage is gradually changed from a low voltage (0) to a high voltage (1) in a monotonically increasing manner (upbound characteristic). Also in the figure The dotted line shows the passing phase characteristics when the normal control voltage is gradually changed from a high voltage (1) to a low voltage (0) in a monotonically decreasing manner (downward characteristics). Both the solid line and the dotted line show the case where a predetermined level of input high-frequency signal amplitude (same value) is supplied to saturate the power amplifier.

 In the polar modulation method, since the control voltage of the power amplifier is driven at high speed, there is a difference in charge time and discharge time with respect to the capacitance (including parasitic capacitance) in the control voltage input unit to the power amplifier. . For this reason, as shown in Fig. 13, the control voltage application condition changes from low voltage to high voltage and when the control voltage changes from high voltage to low voltage, even if the change width of the control voltage is the same value. The amount of phase change is different. That is, the phase characteristic changes at the signal change point, which means that the synchronization between the amplitude signal and the phase signal is lost.

 Next, a conventional technique related to synchronization adjustment at a signal change point in the polar coordinate modulation method will be described. As such a conventional technique, there is one that detects the output signal amplitude of the power amplifying unit and differentiates the detected signal to obtain a signal change point. In this conventional technique, after obtaining the signal change point, a delay with respect to a reference clock supplied to a digital-analog conversion circuit (hereinafter abbreviated as a DA converter) that converts an amplitude signal and a phase signal from a digital format to an analog format is calculated. adjust. Then, the synchronization timing at the signal change point is adjusted (for example, see Patent Document 2).

 FIG. 14 is a block diagram showing a conventional transmission device described in Patent Document 2. As shown in FIG. 14, the transmission apparatus includes a power amplification unit 900, an amplitude modulation unit 905, a phase modulation unit 908, DA converters 1101 and 1102, a reference clock 1103, a change point detection circuit 1104, and a delay unit 1105.

 The DA converter 1101 converts a digital IQ signal (1, Q) input from a baseband signal generator (not shown) into an analog IQ signal. The DA converter 1102 converts the digital amplitude signal (r) extracted from the digital IQ signal (1, Q) into an analog amplitude signal by a polar coordinate converter (not shown). The reference clock 1103 supplies the DA converters 1101 and 1102 with a reference clock for conversion operation.

[0020] The amplitude modulation section 905 drives the power supply voltage of the power amplification section 900 at high speed based on the analog amplitude signal. The phase modulator 908 performs phase modulation based on analog IQ signals. A signal is generated and output to the power amplifier 900. The change point detection circuit 1104 differentiates the output signal of the power amplifying unit 900 and then detects a signal change point from the positive / negative of the differential value. The delay unit 1105 adjusts the conversion timing of the DA converters 1101 and 1102 at the signal change point detected by the change point detection circuit 1104, that is, the synchronization between the amplitude signal and the phase signal extracted from the IQ signal. To do. With this configuration, it is possible to detect a signal change point and ensure synchronization of the amplitude signal and the phase signal at the signal change point.

[0021] Patent Document 1: Special Table 2004—501527 (Fig. 11)

 Patent Document 2: Japanese Translation of Special Publication 2002-530992 (Fig. 2)

 Special Reference 1: Kenington, Peter B, High—Linearity RF Ampliner Design, Artech House Pulishers (page 162, Figure 4.18)

 Disclosure of the invention

 Problems to be solved by the invention

In the polar coordinate modulation system, in order to accurately represent the transmission signal, a synchronization adjustment technique for ensuring synchronization between the amplitude signal and the phase signal is necessary. The following describes the problems that have not been solved by the prior art with respect to the techniques necessary to realize the polar coordinate modulation system as described above.

[0023] In the synchronization adjustment technique using the polar coordinate modulation method disclosed in Patent Document 1, a specific method for ensuring synchronization is not disclosed. Therefore, when the synchronization between the amplitude signal and the phase signal shifts due to some factor, I can't respond.

[0024] The synchronization adjustment technique at the signal change point in the polar modulation method shown in Patent Document 2 requires a system for branching and feeding back the output signal of the power amplifier 900.

As the circuit scale increases, the loss at the output portion of the power amplifier 900 increases, and the efficiency of the transmitter decreases. In addition, it cannot be used when there is a cause of loss of synchronization other than the signal change point.

[0025] The present invention has been made in view of the above-described conventional circumstances, and in the polar modulation method, synchronization at the time of combining a phase modulation signal and an amplitude modulation signal while suppressing an increase in circuit scale. It is an object of the present invention to provide a polar modulation circuit, a polar modulation method, an integrated circuit, and a wireless transmission device capable of ensuring the above. Means for solving the problem

 [0026] The polar modulation circuit of the present invention firstly includes a polar coordinate conversion unit that generates an amplitude signal from a baseband quadrature signal generated from transmission data, and an amplitude that generates an amplitude modulation signal based on the amplitude signal. A modulation unit, a phase modulation unit that generates a phase modulation signal in a radio frequency band based on a signal having at least a phase component of the baseband quadrature signal, and the phase modulation signal as an input high-frequency signal; By inputting the amplitude modulation signal as a control signal, the amplification unit that generates transmission data in a radio frequency band, and the transmission level information indicating the amplitude value of the amplitude signal or the radio transmission level of the transmission data. A delay amount determining unit for storing delay amount information for correcting a delay difference between paths of the amplitude signal and the phase signal; and based on the delay amount information, the amplitude signal or at least the phase It includes a delay adjusting unit for delaying for a signal having a frequency, a.

 With this configuration, it is possible to compensate for the delay difference between the paths of the phase signal and the amplitude signal with a simple configuration without requiring a system for branching and feeding back the output signal from the amplification unit.

 [0028] Secondly, the polar modulation circuit of the present invention is the first polar modulation circuit described above, which stores predetermined predistortion distortion compensation data for amplitude correction processing, and based on the amplitude signal, And a memory unit for outputting an amplitude correction signal or a phase correction signal for the amplitude signal or the signal having at least the phase component, respectively.

 [0029] With this configuration, in addition to the effect of the first polar modulation circuit, distortion compensation accuracy can be improved.

 [0030] Thirdly, the polar modulation circuit of the present invention is the first or second polar modulation circuit, wherein the delay amount information is an output of the amplification unit with respect to an input control signal to the amplification unit. This is a value determined based on the step response characteristics.

 [0031] With this configuration, in addition to the effect of the first or second polar modulation circuit, the delay adjustment amount can be easily determined.

[0032] Fourthly, the polar modulation circuit of the present invention is the first or second polar modulation circuit, wherein the delay amount determination unit uses the delay amount information as an amplitude value of the amplitude signal or the amplitude signal. A data table is stored for each transmission level information. With this configuration, in the polar modulation method, it is possible to ensure synchronization when combining the phase modulation signal and the amplitude modulation signal while suppressing an increase in circuit scale.

 [0034] Fifthly, the polar modulation circuit according to the present invention is the first or second polar modulation circuit, wherein the phase modulation unit is configured based on phase information output from the delay adjustment unit. And a quadrature coordinate conversion unit that generates a quadrature signal having an amplitude value and a quadrature modulation unit that generates a phase modulation signal in a radio frequency band based on the quadrature signal and outputs the phase modulation signal to the amplifying unit.

 [0035] With this configuration, it is possible to reduce the circuit scale for ensuring synchronization during the synthesis of the phase modulation signal and the amplitude modulation signal.

[0036] Sixth, the polar modulation circuit of the present invention is the first to third polar modulation circuits, wherein the delay adjusting unit is a predetermined operation clock of a digital signal processing unit constituting the polar modulation circuit. A first delay adjustment unit that performs delay adjustment in units, and a second delay adjustment unit that performs delay adjustments in less than the clock unit.

[0037] With this configuration, it is possible to improve the accuracy of the delay adjustment step without being restricted by a predetermined operation clock of the digital signal processing unit.

[0038] Seventh, the polar modulation circuit of the present invention is the sixth polar modulation circuit, wherein the second delay adjustment unit includes a plurality of signal amplitude values after delay adjustment in a predetermined operation clock unit. And linear interpolation based on the delay amount information.

[0039] With this configuration, it is possible to improve the accuracy of the delay adjustment step with a simple configuration.

[0040] Eighthly, the polar modulation circuit of the present invention includes a polar coordinate conversion unit that generates an amplitude signal from a baseband quadrature signal generated from transmission data, and an amplitude that generates an amplitude modulation signal based on the amplitude signal. A modulation unit, a phase modulation unit that generates a phase modulation signal in a radio frequency band based on a signal having at least a phase component of the baseband quadrature signal, and the phase modulation signal as an input high-frequency signal; By inputting the amplitude modulation signal as a control signal, an amplification unit that generates transmission data in a radio frequency band, and transmission level information indicating the amplitude value of the amplitude signal or the radio transmission level of the transmission data, Stores phase adjustment amount information for correcting a phase difference between the amplitude signal and the phase signal. A phase adjustment amount determination unit; and a phase adjustment unit that adjusts the phase of the amplitude signal or the signal having at least a phase component based on the phase adjustment amount information.

 [0041] With this configuration, it is possible to reduce the circuit scale for ensuring synchronization during the synthesis of the phase modulation signal and the amplitude modulation signal.

[0042] Nineth, the polar modulation circuit of the present invention is the eighth polar modulation circuit described above, which stores predetermined predistortion distortion compensation data for amplitude correction processing, and based on the amplitude signal, And a memory unit for outputting an amplitude correction signal or a phase correction signal for the amplitude signal or the signal having at least the phase component, respectively.

[0043] With this configuration, synchronization during the synthesis of the phase modulation signal and the amplitude modulation signal is ensured.

The distortion compensation accuracy can be improved.

[0044] Tenthly, the polar modulation circuit of the present invention is the ninth polar modulation circuit, wherein the phase adjustment unit includes a multiplication circuit that multiplies the phase adjustment amount information and the phase correction signal. Composed.

 [0045] With this configuration, it is possible to reduce the circuit scale for ensuring synchronization during the synthesis of the phase modulation signal and the amplitude modulation signal.

[0046] Eleventhly, the polar modulation circuit according to the present invention is the ninth polar modulation circuit, wherein the phase adjustment amount determination unit uses the phase adjustment amount information as the amplitude value of the amplitude signal or the transmission signal. A data table is stored for each level information.

 With this configuration, in the polar modulation method, it is possible to ensure synchronization when combining the phase modulation signal and the amplitude modulation signal while suppressing an increase in circuit scale.

[0048] In the polar modulation method of the present invention, twelfth, a polar coordinate conversion step of generating an amplitude signal from a baseband orthogonal signal generated from transmission data, and an amplitude of generating an amplitude modulation signal based on the amplitude signal A modulation step; a phase modulation step for generating a phase modulation signal in a radio frequency band based on a signal having at least a phase component of the baseband quadrature signal; and the phase modulation signal as an input high-frequency signal; By inputting an amplitude modulation signal as a control signal, an amplification step for generating transmission data in a radio frequency band, and transmission level information indicating the amplitude value of the amplitude signal or the radio transmission level of the transmission data, In order to correct a delay difference between paths of the amplitude signal and the phase signal A delay amount determining step for storing delay amount information for delay, and a delay adjustment step for giving a delay to the amplitude signal or the signal having at least the phase component based on the delay amount information.

 [0049] According to this method, it is possible to easily compensate for the delay difference between the path of the phase signal and the amplitude signal without branching and feeding back the output signal after the amplification step.

 [0050] An integrated circuit of the present invention is thirteenth mounted with any one of the first to eleventh polar modulation circuits.

[0051] With this configuration, in addition to the effect of any one of the first to eleventh polar modulation circuits, the circuit scale can be reduced.

[0052] Fourteenthly, the wireless transmission device of the present invention includes any one of the first to eleventh polar modulation circuits or the thirteenth integrated circuit.

[0053] With this configuration, a highly efficient wireless transmission device can be realized.

 The invention's effect

 [0054] According to the present invention, in the polar modulation system, the polar modulation circuit and the polar coordinate modulation method capable of compensating for the delay difference between the path of the phase signal and the amplitude signal while suppressing an increase in circuit scale. An integrated circuit and a wireless transmission device can be provided.

 Brief Description of Drawings

[0055] FIG. 1 is a diagram showing a configuration of a polar modulation circuit according to a first embodiment of the present invention.

 FIG. 2 is a diagram showing AM-AM characteristics and AM-PM characteristics of the power amplification unit according to the first embodiment of the present invention.

 FIG. 3 is a diagram showing another configuration of the polar modulation circuit according to the first embodiment of the present invention.

 FIG. 4 is a diagram showing a configuration of a power amplifying unit according to the first embodiment of the present invention.

 FIG. 5 is a diagram showing step response characteristics of the power amplifying unit according to the first embodiment of the present invention.

 FIG. 6 is a diagram showing a configuration of a polar modulation circuit according to a second embodiment of the present invention.

 FIG. 7 is a diagram showing a configuration of a polar modulation circuit according to a third embodiment of the present invention.

 FIG. 8 is a diagram showing a configuration of a delay adjustment unit according to a fourth embodiment of the present invention.

FIG. 9 is a diagram showing a configuration of a polar modulation circuit according to a fifth embodiment of the present invention. 圆 10] Diagram showing AM-PM characteristics of power amplifier according to the fifth embodiment of the present invention 圆 11] Diagram showing an example of amplitude signal during 8-PSK modulation by conventional technology 圆 12] Transmission by conventional technology Block diagram showing the configuration of the device

 [Fig. 13] Diagram showing changes in AM-PM characteristics of the power amplifier using conventional technology

 FIG. 14 is a block diagram showing a configuration of a transmission device according to a conventional technique

Explanation of symbols

 101, 302, 903 memory

 102 Delay amount judgment unit

 103, 103B, 104, 301, 902 Delay adjuster

 103C First delay adjuster

 103D Second delay adjuster

 105, 900 Power amplifier

 106, 901 Polar coordinate converter

 107, 904 Amplitude information correction unit

 108, 905 Amplitude modulation section

 109, 906 Amplitude controller

 110, 907 Phase information correction unit

 111, 908 Phase modulator

 112, 112B, 112C, 909 Phase modulation signal generator

 111C quadrature modulator

 113 Cartesian coordinate converter

 201 AM— AM characteristics

 202, 701, 702 AM—PM characteristics

 203 Amplitude signal

 204 Corrected amplitude signal

 205 Phase correction signal

 401 transistors

402 Base terminal 403 emitter terminal

 404 Collector terminal

 405 Base-collector capacity

 501 and 502 Step response characteristics of power amplifier

 503 delay

 601 Phase adjustment amount judgment unit

 602 Phase adjuster

 1101, 1102 DA converter

 1103 Reference clock

 1104 Change point detection circuit

 1105 Delay section

[0057] (First embodiment)

 The first embodiment of the present invention analyzes the operation of the power amplifying unit in the polar modulation circuit, estimates the cause of the delay, and identifies the cause of the delay, thereby performing the synchronization adjustment of the predistortion method. This section explains how to ensure synchronization by using a feedback system that branches the output signal of the power amplifier.

FIG. 1 is a diagram showing an example of a schematic configuration of a polar modulation circuit according to the first embodiment of the present invention. As shown in FIG. 1, this polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller unit 109 having an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, and a phase A phase modulation signal generation unit 112 having a modulation unit 111, a memory 101, a delay amount determination unit 102, and delay adjustment units 103 and 104 are provided.

Polar coordinate conversion unit 106 uses IQ signal (1, Q) as transmission data input from a baseband signal generation unit (not shown) of the transmission device when the polar modulation circuit of the present invention is used in the transmission device. ) Is separated into an amplitude signal r and a constant amplitude phase signal Θ. Here, for example, the amplitude signal r (t) is normalized so that the maximum value is 1.

The amplitude information correction unit 107 corrects the input amplitude signal based on the amplitude correction signal output from the memory 101. The amplitude modulation unit 108 drives the control voltage of the power amplification unit 105 at high speed based on the output signal from the amplitude information correction unit 107. The phase information correction unit 110 performs correction on the input phase signal based on the phase correction signal output from the memory 101. Phase modulation section 111 generates a radio frequency phase modulation signal based on the output signal from phase information correction section 110 and outputs the phase modulation signal to power amplification section 105.

 [0062] The power amplifying unit 105 receives the phase modulation signal output from the phase modulation unit 111 as an input high-frequency signal and inputs the amplitude modulation signal output from the amplitude modulation unit 108 as a control signal. Transmission data in the radio frequency band is generated.

 [0063] Transmission level information S1 is an unillustrated antenna force that is arranged after the power amplifying unit 105 transmitted from the control unit of the not-shown transmitter when the polar modulation circuit of the present invention is used in the transmitter. This is information for determining the average output level, and is input to the memory 101 and the delay amount judgment unit 102. Here, the transmission level information corresponds to the antenna output level specified in 2 dB steps between 33 dBm and 5 dBm, for example, in the case of a mobile station transmitting by 8-PSK modulation in the 900 MHz band GSM band. To do.

 The memory 101 stores AM-AM characteristics and AM-PM characteristics for a control signal input to the power amplification unit 105 in a state where a predetermined input high-frequency signal amplitude is given to the power amplification unit 105.

 [0065] Further, the memory 101 accesses the stored AM-AM characteristic and AM-PM characteristic using the amplitude signal r (t) output from the polar coordinate converter 106 as a reference signal, and the AM- Outputs amplitude correction signal Rcomp (t), which is the inverse of AM characteristics, to amplitude information correction unit 107, and outputs phase correction signal Tcomp (t), which is the inverse of AM-PM characteristics, to phase information correction unit 110 To do.

 [0066] In addition, the memory 101 performs normalization processing of AM-AM characteristics based on the transmission level information S1. Specifically, for the desired output level (average power), based on the maximum transmission power considering the maximum value (peak factor) of the amplitude information according to the modulation method, the stored AM-AM data By performing normalization of the output signal amplitude, correction is performed for each desired output level. This regularity enables access to AM-AM data using the input amplitude information r (t) as an address designation signal.

[0067] The delay amount determination unit 102 receives the amplitude signal!: (T) output from the polar coordinate conversion unit 106 and The synchronization shift between the amplitude signal r and the phase signal Θ is calculated by referring to the data table power for the delay amount obtained in advance corresponding to the transmission level information si. Then, the delay amount information for correcting the synchronization shift is transmitted to the delay adjustment units 103 and 104. The detailed operation of the delay amount determination unit 102 will be described later.

 [0068] Based on the delay amount information transmitted from delay amount determination unit 102, delay adjustment unit 103 delays only the time with respect to phase signal Θ (t) output from polar coordinate conversion unit 106. The phase signal 0 (t—τ) given is generated and output to the phase information correction unit 110.

 [0069] Based on the delay amount information transmitted from delay amount determination unit 102, delay adjustment unit 104 gives a delay of time τ to phase correction signal Tcomp (t) transmitted from memory 101. The phase correction signal Tcomp (t—τ) is generated and output to the phase information correction unit 110.

 [0070] Here, the delay adjustment unit 104 gives a delay amount equivalent to that of the delay adjustment unit 103, whereby the phase signal and the phase information correction signal, which are input signals to the phase information correction unit 110, are provided. The same period is secured.

 Next, an example of a method for correcting the amplitude signal and the phase signal will be described with reference to FIG. FIG. 2 is a diagram illustrating an example of AM-AM characteristics and AM-PM characteristics of the power amplifying unit 105.

 In FIG. 2, AM—AM characteristic 201 is an output voltage characteristic (AM—AM characteristic) with respect to the control voltage, and AM—PM characteristic 202 is a pass phase characteristic (AM—PM characteristic) with respect to the control voltage. It can be easily obtained using a network analyzer or the like. FIG. 2 shows the relationship between the output voltage, the control voltage, and the phase rotation amount in the desired power amplifying unit 105. An example of a distortion compensation method is also shown.

 [0073] That is, regarding the AM-AM characteristic 201, converting the output voltage axial force to the control voltage axis also determines the inverse characteristic of the AM-AM characteristic 201, and the signal output from the polar coordinate conversion unit 106 However, the corrected amplitude signal r2 (t) 2 04 obtained from the inverse characteristic of the AM-AM characteristic 201 becomes the distortion signal of the amplitude signal.

[0074] In addition, regarding the AM-PM characteristic 202, the corrected amplitude signal r2 (t) becomes the control voltage input to the power amplifier 105, and therefore, conversion from the control voltage axis to the phase rotation amount axis is performed. Thus, the phase correction signal Tcomp (t) 205 transmitted from the memory 101 can be obtained. By subtracting this phase correction signal Tcomp (t) 205 from the input phase signal, distortion of the phase signal is achieved. Compensation can be performed.

 [0075] By configuring as described above, as a first effect of the first embodiment of the present invention, predistortion is performed in consideration of the reverse characteristic of the output characteristic with respect to the input control signal to the power amplifying unit. The amplitude modulation signal and phase modulation signal take into account the amount of delay generated in the power amplification unit, and are affected by the actual amplitude and phase distortion, resulting in the desired output amplitude and phase. The output signal for the input control voltage The linearity of can be improved.

 [0076] Further, as another example of the transmission apparatus according to the first embodiment of the present invention, the configuration shown in FIG. 3 may be provided.

 FIG. 3 is a diagram showing another example of a schematic configuration of the polar modulation circuit according to the first embodiment of the present invention. As shown in FIG. 3, the polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller unit 109 having an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, and A phase modulation signal generation unit 112 having a phase modulation unit 111, a delay amount determination unit 102, delay adjustment units 103 and 301, and a memory 302 are provided. In the polar modulation circuit of FIG. 1, a delay adjustment unit 301 is provided instead of the delay adjustment unit 104, and a memory 302 is provided instead of the memory 101. Parts that overlap with the polar modulation circuit in FIG.

 The transmission level information S 1 is transmission level information of the power amplifying unit 105 transmitted from the control unit of the transmission device (not shown) when the polar coordinate modulation circuit of the present invention is used for the transmission device, and the memory 302 And input to the delay amount determination unit 102.

 [0079] Based on the delay amount information transmitted from delay amount determination unit 102, delay adjustment unit 301 performs time τ only on the amplitude signal!: (T) transmitted from polar coordinate conversion unit 106. Amplitude signal r (t—τ) with delay is generated, and amplitude signal r (t—τ) is output as a reference signal of AM—ΡΜ characteristic to memory 302, and a reference signal of AM—AM characteristic Output an amplitude signal!: (T).

Here, the delay time given to the reference signal of AM-PM characteristic is the delay time given to the phase signal Θ (t) transmitted from the polar coordinate conversion unit 106 by the delay adjustment unit 103. By making them the same, synchronization between the phase signal and the phase information correction signal, which is an input signal to the phase information correction unit 110, is ensured. The memory 302 stores AM-AM characteristics and AM-PM characteristics for the input control signal of the power amplifying unit 105 when a high-frequency signal having a predetermined amplitude is input. Further, the memory 302 accesses the AM-AM characteristic by using one amplitude signal r (t) of the signals output from the delay adjustment unit 301 as a reference signal, and performs amplitude correction that is the inverse characteristic of the AM-AM characteristic. The signal Rcomp (t) is output to the amplitude information correction unit 107, and the AM-PM characteristic is accessed using the other amplitude signal r (t—τ) of the signals output from the delay adjustment unit 301 as a reference signal. A phase correction signal Tcomp (t), which is an inverse characteristic of AM—PM characteristics, is output to the phase information correction unit 110.

 [0082] Further, the memory 302 performs AM-AM characteristic normality processing based on the transmission level information S1 similar to that of the memory 101, but since it has already been described with reference to FIG. Omitted. The other constituent elements in FIG. 3 are the same as the operations and functions in FIG. By configuring as described above, the same effect as the polar modulation circuit shown in FIG. 1 can be obtained.

 Next, the operation of the delay amount determination unit 102 will be described in detail. Here, prior to the description of the operation, the characteristics of the power amplifying unit 105 used in the polar modulation method will be described.

 FIG. 4 is a peripheral block diagram of the power amplifying unit 105 in the polar coordinate modulation method. In FIG. 4, the transistor 401 constitutes the power amplification unit 105, and is configured by the base terminal 402, the emitter terminal 403, and the collector terminal 404 of the transistor 401, and the depletion layer capacitance 405 is the base terminal of the transistor 401. This is the capacitance formed between 402 and the collector terminal 404. In this example, for the sake of simplicity, it is assumed that the power amplifying unit 105 includes a transistor 401-stage.

 [0085] The power amplifier 105 used in the polar modulation method receives a signal as shown in FIG. That is, a phase modulation signal obtained by carrier-modulating a baseband signal is input to the base terminal 402, and a baseband signal is input to the collector terminal 404. Here, usually, the frequencies of the baseband signal and the carrier signal are significantly different.

[0086] At this time, based on the amplitude signal of the baseband, the control signal of the transistor 401 generated by the amplitude modulation unit 108, that is, in FIG. 4, the collector of the collector terminal 404 according to the amplitude signal. Since the potential changes, the depletion layer capacitance 405 changes. In particular, in order to reduce the average output power of the transistor 401, control is performed to lower the average potential of the collector terminal 404. In this case, the depletion layer capacitance 405 increases.

In the polar modulation method, the inventor of the present application has found that the frequency of the input signal to the base terminal 402 is different from the frequency of the input signal to the collector terminal 404 and the base terminal 402 and the collector due to the change in the control voltage. It was noted that the depletion layer capacitance 405 between the terminals 404 changes. In this case, the relative delay amount between the phase modulation signal input to the base terminal 402 and the amplitude modulation signal changes due to the influence of the change of the depletion layer capacitance 405 according to the amplitude value of the control voltage.

 Specifically, in the example of FIG. 4, even when synchronization is applied when the control voltage of the amplitude signal maximum value level is applied, the capacitance value of the depletion layer capacitor 405 at the maximum value level of the amplitude signal is The capacity value at the minimum value level is different, and the capacity value at the minimum value level is larger than the capacity value at the maximum value level. For this reason, the mechanism is such that when the amplitude signal is at the minimum value level, the amount of delay of the amplitude signal increases and synchronization is lost compared to when the amplitude signal is at the maximum value level.

 [0089] In the wireless system that performs transmission power control, the change in the capacity value is further increased, and it is necessary to re-synchronize at the maximum transmission power level and at the minimum transmission power level.

[0090] Therefore, by adjusting the synchronization according to the amplitude value of the control voltage to the power amplification unit 105, it is possible to cope with a cause of loss of synchronization other than the signal change point and to feed the output signal of the power amplification unit 105 to the feed. It realized that the back system was unnecessary.

 Next, the operation of the delay amount determination unit 102 will be described. As described above, out-of-synchronization occurs according to the amplitude value of the control voltage to the power amplification unit 105. Therefore, how much delay occurs was determined according to the amplitude value of the control voltage (the output signal of the amplitude modulation unit 108). FIG. 5 shows a step response characteristic when a fixed control voltage is applied to the power amplification unit 105 in order to obtain a constant output level. In FIG. 5, the horizontal axis represents the start-up time from application of the control voltage until the desired output level is reached, and the vertical axis represents the output power of the power amplifier 105.

Step response characteristics A501 and step response characteristics B502 indicate step response characteristics when the output power level is lowered in the order of step response characteristics A501 and step response characteristics B502. A delay amount 503 indicates a delay amount generated between the step response characteristic A501 and the step response characteristic B502. [0093] In the example shown in FIG. 5, the force showing two types of step response characteristics with respect to the control voltage level (output power level) input to the collector terminal 404 is controlled with a finer spacing and range. The step response characteristics when a voltage is applied can be obtained in advance. In this case, for example, synchronization between the amplitude signal and the phase signal is matched at the maximum value level among the transmission average power levels of the target wireless system. When the transmission level is controlled, the delay adjustment associated with the transmission level change is performed based on the delay amount 503 for each control voltage value (output power) obtained in advance as described above. Therefore, synchronization can always be ensured. In addition, even with the same transmission level, synchronization can be ensured with higher accuracy by performing delay adjustment according to the amplitude value of the control signal representing the amplitude component of the modulation signal.

 That is, the delay amount determination unit 102 prepares the delay amount 503 obtained as described above as table data for each amplitude value and transmission level information S1 of the amplitude signal, and the amplitude value of the amplitude signal, or Then, by using the transmission level information S1 as a reference signal, the delay amount information is transmitted to the delay adjustment unit, so that the synchronization adjustment of the amplitude signal and the phase signal can be performed.

 In order to correspond to the signal change point of the amplitude signal r (t), the delay amount determination unit 102 samples the amplitude signal within a predetermined time and obtains the relative relationship of the amplitude signal. It is also possible to ensure synchronization at the signal change point. For example, when the previous sampling value and the current sampling value are subtracted and the sign of the calculation result is inverted, it is determined as the signal change point.

 As described above, in the first embodiment of the present invention, the delay amount determination unit 102 includes the amplitude value of the amplitude signal and the transmission level based on the step response characteristics of the power amplification unit 105. The delay amount information for the information S1 is stored as table data, and the delay amount of the phase modulation signal is adjusted according to the amplitude of the amplitude signal. As a result, the second effect of the first embodiment of the present invention is that the phase modulation signal and the amplitude modulation caused by the change of the amplitude value of the amplitude signal including the signal change point, which cannot be solved by the conventional technique, are obtained. It is possible to deal with out-of-synchronization at the time of synthesizing with a signal without using a system in which the output signal of the power amplifier 105 is branched and fed back.

[0097] Since the delay amount changes according to the carrier frequency and the baseband frequency, Table data of delay amounts corresponding to the rear frequency or baseband signal bandwidth may be prepared. Then, by adjusting the delay amount based on the carrier frequency information transmitted from the control unit of the transmission device (not shown) and system information equivalent to the baseband bandwidth, synchronization can be ensured with higher accuracy. It goes without saying that it can be done.

 Further, in the first embodiment of the present invention, the delay adjustment unit is inserted into the phase signal path, and accordingly, the delay adjustment unit is also inserted into the phase correction signal generation path. However, the delay adjusting unit may be inserted in the amplitude signal path and the amplitude correction signal generation path. Needless to say, the delay adjustment unit may be inserted into both the amplitude signal path, the amplitude correction signal generation path, the phase signal path, and the phase correction signal generation path.

 [0099] In the first embodiment of the present invention, the method of ensuring synchronization without using a feedback system for branching the output signal from the power amplifier has been described. For purposes other than ensuring synchronization, Needless to say, it may be used in combination with a polar modulation circuit provided with a feedback circuit.

 [0100] When the polar modulation circuit according to the first embodiment of the present invention is used in the transmission device, the phase between the amplitude information correction unit 107 and the amplitude modulation unit 108 in FIG. 1 or FIG. A DA converter (not shown) is arranged between the information correction unit 110 and the phase modulation unit 111.

 [0101] (Second Embodiment)

 In the second embodiment of the present invention, a circuit configuration capable of reducing the circuit scale as compared with the first embodiment of the present invention will be described.

FIG. 6 is a diagram showing an example of a schematic configuration of a polar modulation circuit according to the second embodiment of the present invention. As shown in FIG. 6, this polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller unit 109 having an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, A phase modulation signal generation unit 112B having a delay adjustment unit 103B and a phase modulation unit 111, a delay amount determination unit 102, and a memory 101 are provided. Further, in the polar coordinate modulation circuit of FIG. 1 shown in the first embodiment of the present invention, instead of the delay adjustment unit 103 located between the polar coordinate conversion unit 106 and the phase information correction unit 110, the phase information correction unit 1 10 and the phase modulation unit 111 are provided with a delay adjustment unit 103B, and the delay adjustment unit 10 4 was deleted. Note that the same reference numerals are assigned to portions that overlap with the polar modulation circuit in FIG.

 [0103] The delay amount determination unit 102 also refers to the data table power for the delay amount obtained in advance corresponding to the amplitude value of the amplitude signal!: (T) output from the polar coordinate conversion unit 106 and the transmission level information S1. . Then, a synchronization shift between the amplitude signal r and the phase signal Θ is calculated, and delay amount information for correcting the synchronization shift is transmitted to the delay adjustment unit 103B. The operation of the delay amount determination unit 102 has been described in the first embodiment, and a description thereof will not be repeated.

 Based on the delay amount information transmitted from the delay amount determination unit 102, the delay adjustment unit 103B performs phase correction on the phase signal Θ 2 (t) output from the phase information correction unit 110. A phase signal Θ 2 (t-τ) given a delay with time is generated and output to the phase modulator 111.

 [0105] The other constituent elements in FIG. 6 are the same as the operations and functions in FIG. With the configuration described above, the same effects as those of the polar modulation circuit shown in FIG. 1 can be obtained, and the circuit scale can be reduced as compared with the polar modulation circuit shown in FIG.

 In the second embodiment of the present invention, the delay adjustment unit 103B is inserted into the phase signal path. However, the present invention is not limited to this, and the delay adjustment unit 103B may be inserted into the amplitude signal path. Needless to say, the delay adjustment unit 103B may be inserted into both the amplitude signal path and the phase signal path.

 [0107] When the polar modulation circuit according to the second embodiment of the present invention is used in the transmission device, the interval between the amplitude information correction unit 107 and the amplitude modulation unit 108 in FIG. A DA converter (not shown) is disposed between the phase modulation unit 111 and the stage. However, when the delay adjustment unit 103B is configured by an analog circuit, a DA converter (not shown) is arranged between the phase information correction unit 110 and the delay adjustment unit 103B.

 [0108] (Third embodiment)

 The third embodiment of the present invention will be described when a quadrature modulator is used as the phase modulation section in the second embodiment of the present invention.

FIG. 7 is a diagram showing an example of a schematic configuration of a polar modulation circuit according to the third embodiment of the present invention. As shown in Fig. 7, this polar modulation circuit includes a power amplifier 105 and a polar coordinate converter. Unit 106, amplitude controller unit 109 having amplitude information correction unit 107 and amplitude modulation unit 108, phase information correction unit 110, delay adjustment unit 103B, orthogonal coordinate conversion unit 113, and phase modulation unit 111 A signal generation unit 112, a delay amount determination unit 102, and a memory 101 are provided. Further, an orthogonal coordinate conversion unit 113 is added to the polar coordinate modulation circuit of FIG. 6 shown in the second embodiment of the present invention, and the phase modulation unit 111 is replaced with a quadrature modulation unit 111C. . Note that portions that overlap with the polar coordinate modulation circuit in FIG.

 [0110] Based on the delay amount information transmitted from the delay amount determination unit 102, the delay adjustment unit 103B performs the phase correction Θ 2 (t) output from the phase information correction unit 110 on the basis of the delay amount information. Phase information Θ 2 (t−τ) given a delay with time is generated and output to the orthogonal coordinate transformation unit 113.

 [0111] The orthogonal coordinate conversion unit 113 generates an orthogonal signal having a predetermined amplitude value based on the phase information 0 2 (t-τ) output from the delay adjustment unit 103B, and outputs the orthogonal signal to the orthogonal modulation unit 111C. Output.

 The orthogonal modulation unit 111 C generates a radio frequency band phase modulation signal based on the orthogonal signal output from the orthogonal coordinate conversion unit 113 and outputs the phase modulation signal to the power amplification unit 105.

 [0113] The power amplification unit 105 receives the phase modulation signal output from the quadrature modulation unit 111C as an input high-frequency signal, and also receives the amplitude modulation signal output from the amplitude modulation unit 108 as a control signal. Transmission data in the radio frequency band is generated.

 [0114] The other components in FIG. 7 are the same as the operations and functions in FIG. With the above configuration, a polar modulation circuit can be configured using a quadrature modulator.

 [0115] In the third embodiment of the present invention, the delay adjustment unit 103B is inserted into the phase signal path. However, the present invention is not limited to this, and the delay adjustment unit 103B may be inserted into the amplitude signal path. Needless to say, the delay adjustment unit 103B may be inserted into both the amplitude signal path and the phase signal path.

[0116] When the polar modulation circuit according to the third embodiment of the present invention is used in the transmission device, the interstage between the amplitude information correction unit 107 and the amplitude modulation unit 108 in FIG. A DA converter (not shown) is arranged between the stage and the quadrature modulation unit 111C. [0117] (Fourth embodiment)

 The fourth embodiment of the present invention describes an example of the circuit configuration of the delay adjustment unit in the first to third embodiments of the present invention. The fourth embodiment of the present invention describes a delay adjustment operation using the delay adjustment unit.

An example of a schematic configuration of the polar coordinate modulation circuit according to the fourth embodiment of the present invention will be described with reference to FIG. Note that FIG. 6 has been described in the second embodiment of the present invention, and the description of the overlapping parts is omitted.

 [0119] When the transmission apparatus is configured using the polar modulation circuit shown in FIG. 6, the digital signal processing unit operates with a clock having a predetermined frequency as a reference, and therefore, by using a general delay circuit in the digital circuit, The delay adjustment (first delay adjustment unit) in units of the reference clock is easy.

 [0120] Further, by dividing the reference clock to reduce the cycle time, it is possible to perform highly accurate delay adjustment. However, since the current consumption increases when the divider circuit is operated or the digital circuit is operated at high speed, there is a trade-off between the accuracy of delay adjustment by dividing the reference clock and the current consumption. It becomes a relationship.

 [0121] Here, the delay adjustment unit according to the first to third embodiments of the present invention realizes the delay adjustment step of less than the period unit of the reference clock, and thereby responds to the output signal from the delay amount determination unit. It is characterized by highly accurate delay adjustment. For this reason, it is necessary to obtain a delay adjustment step less than the reference clock cycle by a method other than the frequency division configuration of the reference clock.

 [0122] Therefore, an example will be described in which a delay adjustment step of less than a reference clock cycle unit is obtained by arithmetic processing without using a frequency divider circuit configuration.

[0123] Let one cycle of the reference clock be. In addition, for time t, the reference clock is n cycles, (n

 elk

 + 1) Time (t-n X τ) and (t- (n + 1) X τ) (just

 elk elk, where n is an integer greater than or equal to 0) and the amplitude value of the phase signal is 0 (t−n) and Θ (t_n + l). Here, if the delay time of less than one cycle is τ, if τ is sufficiently short, the time (t

 d elk

 The amplitude value of the phase signal at one (n X τ + τ)) is approximated by the following formula (1)

 elk d

be able to. [ _Equation 1] β t _ η + τ _ά / τ _Μ ) = θ (i ^ + \) τ, + θ (ί _? I) x (l-r _d )-,. (1)

FIG. 8 shows an example of the configuration of the delay adjustment unit 103B that realizes the above equation (1). Here, assuming that the predetermined delay adjustment amount is τ (= η Χ τ + τ), the delay adjustment for the η period of the reference clock is the first

 elk d

The delay adjustment unit 103C is expressed as Z− ⁿ as a general delay circuit. Further, the delay adjustment of less than the reference clock unit is performed by the second delay adjustment unit 103D.

As described above, in the polar modulation circuit shown in FIG. 6, the delay adjustment unit 103 B is configured as shown in FIG. 8, and the amplitude signal is based on the step response characteristics as shown in FIG. Or, n and τ corresponding to the transmission level information S1 are sent to the delay amount judgment unit 102 as table data.

 d

 By adjusting the delay amount of the phase signal according to the amplitude of the amplitude signal, the output signal of the power amplifying unit 105 as in the conventional technique is branched and fed back using a system that feeds back. It becomes possible to accurately compensate for the delay difference between the paths of the amplitude signal.

 [0126] In the fourth embodiment of the present invention, a method has been described in which a desired signal amplitude is obtained by linear interpolation from the signal amplitudes at two adjacent times. However, signal amplitudes at three or more times are used. The approximation accuracy can be improved by weighting each signal amplitude and then adding it, and taking into account the positive and negative of the signal change.

 [0127] (Fifth embodiment)

 The fifth embodiment of the present invention describes a circuit configuration in which a phase adjustment unit configured by a multiplier circuit obtains an action equivalent to that of the delay adjustment unit in the first embodiment of the present invention. A circuit configuration capable of further reducing the circuit scale as compared with the first embodiment of the invention will be described.

FIG. 9 is a diagram showing a schematic configuration of a polar modulation circuit in the fifth embodiment of the present invention. As shown in FIG. 9, the polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller unit 109 including an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, and a phase A phase modulation signal generator 112 having a modulation unit 111, a memory 101, a phase adjustment amount determination unit 601, and a phase adjustment unit 602 are provided. Further, in the polar modulation circuit of FIG. 1, the delay adjustment unit 103 is deleted, and the delay amount determination unit 102 is replaced. In addition, a phase adjustment amount determination unit 601 is provided, and a phase adjustment unit 602 is provided in place of the delay adjustment unit 104. In the first embodiment of the present invention, the same reference numerals are given to the portions overlapping with the polar modulation circuit of FIG.

 [0129] Transmission level information S1 is transmission level information of the power amplification unit 105 output from the control unit, not shown, when the polar modulation circuit of the present invention is used in the transmission device, and includes memory 101 and phase adjustment. The amount is input to the quantity determination unit 601.

 [0130] The phase adjustment amount determination unit 601 calculates the amplitude signal!: (T) between the amplitude signal r (t) and the phase signal Θ from the amplitude value and transmission level information S1 output from the polar coordinate conversion unit 106. The synchronization shift is calculated, and phase adjustment amount information equivalent to correcting the synchronization shift is output to the phase adjustment unit 602. The detailed operation of the phase adjustment amount determination unit 601 will be described later.

 The phase adjustment unit 602 performs a predetermined phase adjustment on the phase correction signal Tcomp (t) output from the memory 101 based on the phase adjustment amount information transmitted from the phase adjustment amount determination unit 601. The phase correction signal Tcomp2 (t) is generated and output to the phase information correction unit 110. The detailed operation of the phase adjustment unit 602 will be described later. The other constituent elements in FIG. 9 are the same as the operations and functions in FIG.

 Next, the operations of the phase adjustment amount determination unit 601 and the phase adjustment unit 602 will be described in detail. Here, prior to explaining the operation, it will be explained that the correction of the synchronization shift and the phase adjustment are equivalent. Figure 10 shows AM-PM characteristics for compensation. In Fig. 10, the horizontal axis represents the control voltage (x), and the vertical axis represents the passing phase rotation (y).

 [0133] The AM-PM characteristic A701 indicated by the solid line in FIG. 10 is a graph showing the phase relationship between the input signal and output signal of the power amplifier 105 for each control voltage using a network analyzer or the like. The AM-PM characteristics in Fig. 2 are the same. An AM-PM characteristic B702 indicated by a dotted line indicates a phase relationship between the input signal and the output signal of the power amplifier 105 expected in an actual polar modulation circuit.

In such a measurement, since the relative relationship between the input signal and the output signal is obtained, for example, among the influences of the depletion layer capacitance 405 between the base collector in FIG. 4, the input signal and the output signal Anything that affects the relationship will appear in the measurement data. That is, in the region where the control voltage is low, the depletion layer capacitance 405 between the base and collector increases, and power amplification In addition to the component amplified by the power amplifier 105, the component that leaks from the input to the output via the depletion layer capacitance 405 between the base and collector increases at the output end of the unit 105, and the passing phase characteristic changes. To do.

 On the other hand, as described in the first embodiment of the present invention, among the influences of the depletion layer capacitance 405 between the base collector and the influences related to the amplitude signal and the phase signal, the power amplification unit 105 In other words, what affects the relationship between the input signal and the control voltage does not appear in the measurement data. Therefore, if the AM-PM characteristic A701 is used as it is, a synchronous adjustment technique as shown in the first embodiment of the present invention is essential in order to eliminate the influence of the depletion layer capacitance 405 between the base and the collector. It becomes.

 In the fifth embodiment of the present invention, the adjustment of the synchronization is replaced with the adjustment of the phase, that is, the influence of the depletion layer capacitance 405 between the base collector in the region where the control voltage is reduced. Thus, attention was paid to the fact that the phase signal is delayed with respect to the amplitude signal.

 Specifically, compared to the AM-PM characteristic A701 indicated by the solid line in FIG. 10, the AM-PM characteristic B702 as indicated by the dotted line in FIG. 10 is used as the compensation data. That is, when the AM-PM characteristic A701 can be expressed by the function of equation (2), the depletion layer capacitance 405 between the base and the collector increases in the region where the control voltage is low, and the phase signal becomes smaller than the amplitude signal. Considering the delay, the function shown in Equation (3) is given as the phase adjustment amount as AM-PM characteristic B702. Here, RF_freq in Equation (3) indicates the frequency of the input signal to the high-frequency signal input terminal of the power amplifier 105, and the change in the depletion layer capacitance 405 between the base collector and the frequency difference between the amplitude signal and the phase signal. Due to this, it is considered that the synchronization between the amplitude signal and the phase signal is shifted.

 [Equation 2] = / i · · · (2)

[Equation 3] y = Mx) f ₂ (x, RF_ freq) * · · (3)

FIG. 9 shows a configuration in which the synchronization adjustment described above is replaced with a phase adjustment. That is, the amplitude signal The phase adjustment amount indicated by f2 (x, RFjreq) in equation (3) for the amplitude signal is obtained from the signal r (t), transmission level information SI, and known AM-AM characteristics, and the phase adjustment amount is determined. The unit 601 stores the amplitude signal as table data, and outputs the phase adjustment amount information to the phase adjustment unit 602 using the amplitude signal r (t) as a reference signal.

The phase adjustment unit 602 uses the phase adjustment amount (for the phase correction signal Tcomp (t) output from the memory 101 based on the phase adjustment amount information transmitted from the phase adjustment amount determination unit 601). f 2 (x, RFjreq)) is multiplied to generate Tcomp2 (t), which is output to the phase information correction unit 110.

 [0140] As described above, in the fifth embodiment of the present invention, the delay adjustment unit having a large circuit scale can be handled on a circuit scale by enabling the synchronization adjustment and the phase adjustment to be handled as equivalents. In addition to the powerful signal change point that could not be solved by the conventional technology, the phase adjustment unit is configured with a small multiplier circuit. This can be done without using a system that feeds back the output signal of the amplifier 105.

 [0141] Since the phase adjustment amount changes according to the baseband frequency, table data of the delay amount corresponding to the baseband signal bandwidth is prepared and transmitted from the control unit of the transmission device, not shown. It goes without saying that synchronization can be ensured with higher accuracy by adjusting the amount of delay based on system information equivalent to the baseband bandwidth that is generated.

 [0142] In addition, the same effect can be achieved and the circuit scale can be further reduced even if the multiplication processing in the phase adjustment unit 602 is performed on AM-PM data stored in the memory 101 in advance. Needless to say, you can.

 Furthermore, it goes without saying that more accurate synchronization can be ensured by combining the first embodiment and the fifth embodiment of the present invention.

It should be noted that the polar modulation circuit described in the above embodiment outputs an amplitude correction signal and a phase correction signal corresponding to the amplitude value of the amplitude signal from the memory unit 101, so that the distortion compensation in the power amplification unit 105 is performed. However, by omitting the memory unit 101, the amplitude information correction unit 107, the phase information correction unit 110, and the delay adjustment unit 104, it is possible to configure a polar modulation circuit only for ensuring synchronization. it can. [0145] Note that the polar modulation circuit described in the above embodiment can be configured as an integrated circuit by being generated on a silicon substrate.

In addition, the polar modulation circuit described in the above embodiment inputs an IQ signal from a signal generator that generates an arbitrary IQ signal to the polar coordinate conversion unit, and connects the output of the power amplification unit 105 to the antenna. Thus, it is possible to configure as a transmission device.

[0147] Although the invention has been described in detail and with reference to specific embodiments, it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the invention. is there.

 This application is based on a Japanese patent application filed on April 28, 2005 (Japanese Patent Application 2005-131998) and a Japanese patent application filed on April 19, 2006 (Japanese Patent Application 2006-116185). Are incorporated herein by reference.

 Industrial applicability

[0148] The polar modulation circuit of the present invention has an effect capable of compensating for a delay difference between paths of a phase signal and an amplitude signal while suppressing an increase in circuit scale in the polar modulation method, and a synchronization adjustment method. It is useful for wireless transmission devices and the like.

Claims

The scope of the claims  [1] A polar coordinate converter that generates an amplitude signal from a baseband quadrature signal generated from transmission data;  An amplitude modulation unit that generates an amplitude modulation signal based on the amplitude signal;  A phase modulation unit that generates a phase modulation signal in a radio frequency band based on a signal having at least a phase component of the baseband quadrature signal;  The phase modulation signal is input as an input high-frequency signal, and the amplitude modulation signal is input as a control signal, thereby generating a transmission data in a radio frequency band; and an amplitude value of the amplitude signal or the transmission data A delay amount determining unit that stores delay amount information for correcting a delay difference between paths between the amplitude signal and the phase signal according to transmission level information indicating a wireless transmission level;  A delay adjusting unit that gives a delay to the amplitude signal or the signal having at least a phase component based on the delay amount information;  Polar coordinate modulation circuit.  [2] The polar modulation circuit according to claim 1,  Pre-distortion distortion compensation data for predetermined amplitude correction processing is stored, and the amplitude correction signal or the phase correction signal is respectively stored for the amplitude signal or the signal having at least the phase component based on the amplitude signal. Memory part to output,  A polar modulation circuit. [3] The polar modulation circuit according to claim 1 or 2,  The polar modulation circuit, wherein the delay amount information is a value determined based on a step response characteristic of an output of the amplification unit with respect to an input control signal to the amplification unit. [4] The polar modulation circuit according to claim 1 or 2,  The polar modulation circuit having a data table in which the delay amount determination unit stores the delay amount information for each amplitude value of the amplitude signal or the transmission level information.  [5] The polar modulation circuit according to claim 1 or 2, The phase modulation unit generates an orthogonal signal having a predetermined amplitude value based on the phase information output from the delay adjustment unit; and A polar modulation circuit including a quadrature modulation unit that generates a phase modulation signal in a radio frequency band based on the quadrature signal and outputs the phase modulation signal to the amplification unit.  [6] The polar modulation circuit according to claim 1, wherein the polar modulation circuit is one of the following:  The delay adjustment unit includes a first delay adjustment unit that performs delay adjustment in units of a predetermined operation clock of a digital signal processing unit that constitutes the polar coordinate modulation circuit;  A second delay adjustment unit that performs delay adjustment in less than the clock unit;  A polar modulation circuit. [7] The polar modulation circuit according to claim 6,  The second delay adjustment unit is a polar modulation circuit that performs linear interpolation based on a plurality of signal amplitude values after delay adjustment in units of a predetermined operation clock and the delay amount information. [8] A polar coordinate converter that generates an amplitude signal from a baseband quadrature signal generated from transmission data;  An amplitude modulation unit that generates an amplitude modulation signal based on the amplitude signal;  A phase modulation unit that generates a phase modulation signal in a radio frequency band based on a signal having at least a phase component of the baseband quadrature signal;  An amplifier that generates transmission data in a radio frequency band by inputting the phase modulation signal as an input high-frequency signal and inputting the amplitude modulation signal as a control signal;  A phase adjustment amount for storing phase adjustment amount information for correcting a phase difference between the amplitude signal and the phase signal in accordance with an amplitude value of the amplitude signal or transmission level information indicating a wireless transmission level of the transmission data. A determination unit;  A phase adjustment unit that adjusts the phase of the amplitude signal or the signal having at least the phase component based on the phase adjustment amount information;  A polar modulation circuit. [9] The polar modulation circuit according to claim 8,  Pre-distortion distortion compensation data for predetermined amplitude correction processing is stored, and the amplitude correction signal or the phase correction signal is respectively stored for the amplitude signal or the signal having at least the phase component based on the amplitude signal. Memory part to output, A polar modulation circuit. [10] The polar modulation circuit according to claim 9,  The phase adjustment unit is a polar modulation circuit configured by a multiplication circuit that multiplies the phase adjustment amount information and the phase correction signal. [11] The polar modulation circuit according to claim 9,  The polar modulation circuit having a data table in which the phase adjustment amount determination unit stores the phase adjustment amount information for each amplitude value of the amplitude signal or transmission level information. [12] A polar coordinate conversion step for generating an amplitude signal from a baseband quadrature signal generated from transmission data;  An amplitude modulation step of generating an amplitude modulation signal based on the amplitude signal;  A phase modulation step for generating a radio frequency band phase modulation signal based on a signal having at least a phase component of the baseband quadrature signal;  An amplification step for generating transmission data in a radio frequency band by inputting the phase modulation signal as an input high-frequency signal and inputting the amplitude modulation signal as a control signal; and an amplitude value of the amplitude signal or the transmission data A delay amount determining step for storing delay amount information for correcting a delay difference between paths of the amplitude signal and the phase signal according to transmission level information indicating a radio transmission level;  A delay adjustment step for giving a delay to the amplitude signal or the signal having at least the phase component based on the delay amount information;  Polar coordinate modulation method comprising: [13] An integrated circuit on which the polar modulation circuit according to any one of claims 1 to 11 is mounted. [14] A radio transmission apparatus comprising the polar modulation circuit according to any one of claims 1 to 11 or the integrated circuit according to claim 13.