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WO2009098033A1 - Procédé de fabrication d'une plaquette - Google Patents

Procédé de fabrication d'une plaquette Download PDF

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Publication number
WO2009098033A1
WO2009098033A1 PCT/EP2009/000727 EP2009000727W WO2009098033A1 WO 2009098033 A1 WO2009098033 A1 WO 2009098033A1 EP 2009000727 W EP2009000727 W EP 2009000727W WO 2009098033 A1 WO2009098033 A1 WO 2009098033A1
Authority
WO
WIPO (PCT)
Prior art keywords
electronic component
conductive
electronic
film
conductive foil
Prior art date
Application number
PCT/EP2009/000727
Other languages
German (de)
English (en)
Inventor
Jan Kostelnik
Frank Ebling
Ulrich Schaal
Andreas Kugler
Original Assignee
Würth Elektronik Rot am See GmbH & Co. KG
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Würth Elektronik Rot am See GmbH & Co. KG, Robert Bosch Gmbh filed Critical Würth Elektronik Rot am See GmbH & Co. KG
Publication of WO2009098033A1 publication Critical patent/WO2009098033A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H05K1/187—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding the patterned circuits being prefabricated circuits, which are not yet attached to a permanent insulating substrate, e.g. on a temporary carrier
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29388—Glasses, e.g. amorphous oxides, nitrides or fluorides
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/83132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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    • H01—ELECTRIC ELEMENTS
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
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    • H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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    • H01L2924/01029—Copper [Cu]
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0207—Cooling of mounted components using internal conductor planes parallel to the surface for thermal conduction, e.g. power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • H—ELECTRICITY
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    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469—Circuit made after mounting or encapsulation of the components
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Definitions

  • the invention relates to a method for producing an electronic assembly having at least one electronic component which is contacted within the electronic assembly.
  • a known electronic assembly is made so that the electronic components are glued with their passive sides on a support plate. Subsequently, the space between them and above their active side is laminated with a filling material into which holes are then introduced for connection to the terminals (US 6972964).
  • the invention is based on the object to provide a way for simple and cost-effective production of electronic assemblies that allow a large packing density.
  • the invention proposes a method with the features mentioned in claim 1. Further developments of the invention are the subject of dependent claims.
  • the method uses as its starting point a conductive foil which is uncoated.
  • the multiple or at least one electronic component is then attached to this film.
  • the conductive foil is laminated with a printed circuit board carrier.
  • the carrier film may be made of metal, ceramic or polymer.
  • At the starting point forming conductive film structuring is carried out for the production of individual conductor tracks.
  • the connections of the conductive foil facing the conductive foil are then contacted electronic component.
  • the contacting can be carried out so that at the corresponding locations of the terminals of the electronic components holes are performed using lasers.
  • the drilled holes can then be metallized, which then produces the conductive connection between tracks and terminals of the devices.
  • the method can be carried out, for example, in a further development in the so-called reel-to-reel method.
  • the attachment of the at least one or more electronic components to the conductive foil can be done in a further development that the components are glued to the film.
  • the adhesive may be, for example, an adhesive that cures under application of heat.
  • the adhesive may be applied to the conductive foil by metering or stamping, at precisely those locations where the electronic components are to be later attached. Using known methods, the adhesive can be precisely dosed as well as applied in exactly the right place.
  • Another possibility also proposed by the invention is to apply the adhesive to the electronic components, to which also known methods can be used.
  • the components are then pressed under the interposition of the adhesive to the film.
  • heat such as hot air, furnace process or the like, the adhesive can then be cured. It is also possible that the attachment is done solely by pressure.
  • the adhesive which is present only where the electronic components are, in addition to the attachment also forms a dielectric.
  • spacer elements can be provided between the conductive foil and the electronic components, in particular spacer elements, which are contained in the adhesive. In this way it is also possible to set different dielectric thicknesses.
  • the envelope surrounds only one electronic component, or even several components, or even all electronic components of a group of components.
  • the wrapper may also be used to create three-dimensional structures, especially when such a combination of wrapper and conductive foil is to be assembled into further assemblies.
  • the conductive foil is provided with markings which enable or effect an adjustment.
  • These alignment marks can be produced for example by etching, stamping, drilling or the like. In particular, they can be used to position the devices in relation to the locations at which the components are to be attached and to which the adhesive is therefore to be applied.
  • the Justagemark isten can also be used to tailor the application of the components and the filling material, the electronic assemblies from the film strip.
  • a mechanical part for example a heat sink, can also be connected and fastened to the conductive foil and / or the components fastened thereto.
  • a mechanical part for example a heat sink
  • the wiring of the electronic components is produced by an electroless metal deposition.
  • the invention may be provided in a development to summarize several provided with electronic components, optionally a sheath and a printed circuit board carrier foils to a multilayer structure.
  • electronic components optionally a sheath and a printed circuit board carrier foils to a multilayer structure.
  • a sheath and a printed circuit board carrier foils to a multilayer structure.
  • the mentioned metallic layer is arranged for heat dissipation.
  • the invention also proposes an electronic assembly producible by a method as described and described in detail herein.
  • Figure 1 shows schematically the side view of a conductive film as a starting material for the process
  • FIG. 2 shows the same section of the film with applied adhesive dots
  • FIG. 3 shows the same view with two electronic components glued by means of the glue dots
  • Figure 4 shows the state of manufacture after the application of a sheath
  • Figure 5 shows the state after cutting an electronic assembly
  • Figure 6 is a schematic representation after preparation of the structuring of the conductive film
  • FIG. 7 shows the state after production of the contacting
  • FIG. 8 shows the final state of a multilayer printed circuit board produced by the method
  • Figure 9 is a schematic side view of a starting material according to a second embodiment of the method according to the invention.
  • FIG. 10 shows the state after a further method step
  • FIG. 11 shows the state after a further method step of the second embodiment
  • FIG. 12 shows a further method step
  • FIG. 13 shows the removal of the carrier film
  • Figure 14 is a representation corresponding to Figure 13 in a modification
  • FIG. 15 shows a starting situation in a still further embodiment
  • FIG. 16 shows the state of the embodiment according to FIG. 15 corresponding to FIG.
  • FIG. 17 is an illustration, corresponding to FIG. 15, of an intermediate state of a method according to a further embodiment
  • FIG. 18 shows a second state of the method
  • Figure 19 shows the result of attachment of the electronic component to the conductive foil.
  • FIG. 1 shows a highly simplified section of a conductive foil 1 unwound from a roll.
  • This foil 1 has adjustment markings 2 at certain precisely defined locations, for example in the form of holes passing through the foil 1.
  • the film 1 is uncoated on both sides. It is for example a copper foil.
  • adhesive is applied to the upper side 3 in FIGS. 1 to 4 at specific locations, which are fixed in position relative to the adjustment markings 2.
  • the application can be done by printing, spraying, dripping or the like.
  • individual spacers 5 for example, glass beads of a certain size, mixed. With the size of the spacers, it is possible to set different thicknesses of the dielectric.
  • a further method step which is not absolutely necessary, around the electronic components 6 around a sheath 7 are applied from a polymer composition, which in the example, all electronic components wrapped in a common enclosure 7.
  • the envelope 7 extends outside of the electronic components 6 up to the upper side 3 of the film 1 in FIGS. 1 to 4.
  • the alignment markings 2 can also serve for dimensioning and arranging the envelope 7 from the polyester mass relative to the electronic components 6. Since the envelope 7 encloses components 6 and extends to the film 1, optionally also forms a type of bonding with the film 1, a mechanically stable block is thereby formed.
  • the electronic assembly can now be cut to size, that is, cut out of the film 1.
  • the result of the previous process is reversed, so that now the free side 8 of the film 1 comes to lie up.
  • the film 1 provided with the envelope 7 is laminated with a printed circuit board carrier 9, which comes to lie on the side of the film 1, on which the electronic components 6 are arranged.
  • Figure 6 shows the result in an example where a wrapper 7 is absent.
  • the film 1 is now structured on its free side 8, so that conductor tracks are now produced.
  • holes 10 are then drilled, which lead from the free side of the film 1 to the terminals of the electronic components 6. This is also shown in FIG.
  • FIG. Figure 7 shows an already complete electronic assembly.
  • this electronic module can be further processed and further developed.
  • Figure 8 shows such a further embodiment of an electronic module, wherein practically two modules, as shown in Figure 7, back to back are connected to each other with the interposition of a metallic layer 12 which is disposed between the two circuit board carriers 9.
  • This metallic layer 12 is used for example for heat dissipation of the heat generated in the electronic components 6.
  • the two assemblies summarized here differ from the simple assembly of FIG. 7 in that a further metallic conductive layer 14 is applied to the metallic layer 1, which is still upper in FIG. 7, with the interposition of an insulating layer 13, which again penetrates through openings in the insulating layer 13 Produces contacts with conductor tracks of the originally upper conductive layer 1.
  • FIG. 8 shows by way of example that the upper of the two layers comprises electronic components 6 without an envelope, while the lower inverted arrangement contains an envelope 7.
  • FIGS. 9 to 13 show a further embodiment of the method proposed by the invention.
  • Figures 9 to 13 show states in the implementation of the method, which correspond approximately to Figures 1 to 7. While in FIG. 1 a film 1 which is uncoated on both sides is used as the starting material, the embodiment shown in FIGS. 9 to 13 uses as the starting material a film 21 which is attached to a carrier film 22.
  • the carrier film 22 may be made of metal, ceramic or polymer.
  • the conductive foil 21 is made of copper, for example.
  • the conductive foil 21 is structured in such a way that connection pads 23 are formed on the carrier foil 22, which correspond to the connection points of the electronic components to be fastened.
  • Such an electronic component 6 is shown in FIG.
  • This electronic component 6 is now connected with its connection points 24 with the connection pads 23.
  • the adhesive is a conductive adhesive.
  • an adhesive layer 25 is formed, which is present between the connection pads 23 and the connection points 24 of the electronic component 6. If this layer 25 is a solder layer, the attachment is carried out in the usual way by supplying heat. The same applies to a thermosetting adhesive. In this way, the electronic component 6 with its connection points 24 of the conductive foil 21 facing with this directly connected.
  • the electronic component 6 can be surrounded by a sheath 7, again made of polymer compound, which surrounds the entire electronic component 6, including the connection pads 23, and extends as far as the carrier foil 22.
  • a sheath 7, again made of polymer compound which surrounds the entire electronic component 6, including the connection pads 23, and extends as far as the carrier foil 22.
  • the carrier film 22 can be separated, which is shown in FIG 13 is indicated.
  • the further treatment of the envelope 7 or a lamination and the electronic component 6 contained therein is done in the usual manner with printed circuit boards.
  • FIG. 13 shows the detachment of the carrier layer 22.
  • detaching the carrier layer 22 it is also possible not to detach the carrier layer 22 but to further structure it, for example by etching, by ablation or the like. This is shown in FIG.
  • FIG. 15 shows a possibility of using a thicker film 31 as the starting film to be used, which is then first patterned on its side facing the electronic components, as in FIG. 10, to thereby form connection pads 23.
  • a thicker film 31 is shown on the left in FIG. 15
  • the result of the structuring is shown on the right in FIG. 15.
  • the electronic component 6 is then placed, connected and secured in the same way on the structured film produced in this way, as shown in FIG. 11. Again, after fixing the electronic component 6 and the envelope 7, structuring of the now exposed lower side of the conductive foil 31 in FIGS. 9 to 16 can take place.
  • FIG. 17 shows a further embodiment of the of the Invention proposed method.
  • the starting point is a resin-coated conductive foil, which is shown in FIG.
  • This resin-coated film contains a conductive layer 41, for example made of copper.
  • a resin layer 42 into which holes 43 are introduced from the top side.
  • FIG. 17 shows in the left half the still untreated film, while in the right half the holes 43 have already been produced.
  • an electronic component 6 With this conductive foil 41, an electronic component 6 is connected, which has so-called bumps as connection points.
  • the arrangement of these bumps 45 corresponds to the arrangement of the holes 43.
  • the electronic component 6 is pressed with its bumps 45 into the openings 43 of the film and heated. This results in a connection of the bumps 45 with the conductive foil 41.
  • the contact can be made by the compression itself.
  • connection between the electronic component 6 and the conductive foil 41 shown in FIG. 19 can then be further processed in the manner described in the preceding embodiments.
  • the method proposed by the invention makes it possible to realize a significantly increased land use on electronic circuit boards. It can be made with additional layers in a confined space components, both active and passive components.
  • the passive and active electronic components can be encapsulated cost-effectively, whereby a high reliability is achieved. There are risky mixing techniques ken, namely soldering, gluing and wire bonding in manufacturing avoided.
  • a planar output structure allows reproducible RF transitions to be realized.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

L'invention concerne un procédé de fabrication d'un module électronique à partir d'une feuille métallique conductrice non-revêtue sur au moins un côté. Des composants électroniques sont fixés, notamment collés, sur cette feuille avec leur côté actif orienté vers la feuille. Le collage est réalisé par application de colle uniquement dans les zones de fixation des composants électroniques. La colle peut être appliquée sur la feuille ou sur les composants électroniques. Les composants sont alors comprimés et collés contre la feuille. La feuille et les composants sont ensuite laminés avec un porte-plaquette sur le côté des composants. Ce n'est qu'alors qu'une structure de pistes conductrices est réalisée sur le côté opposé et les bornes des composants électroniques sont mises en contact à travers la pellicule conductrice. D'autres plans de mise en contact peuvent être appliqués sur la feuille conductrice structurée.
PCT/EP2009/000727 2008-02-06 2009-02-04 Procédé de fabrication d'une plaquette WO2009098033A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102008009220.7 2008-02-06
DE102008009220A DE102008009220A1 (de) 2008-02-06 2008-02-06 Verfahren zum Herstellen einer Leiterplatte

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WO2009098033A1 true WO2009098033A1 (fr) 2009-08-13

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WO (1) WO2009098033A1 (fr)

Families Citing this family (4)

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Publication number Priority date Publication date Assignee Title
DE102009058764A1 (de) * 2009-12-15 2011-06-16 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur Herstellung einer elektronischen Baugruppe und elektronische Baugruppe
DE102010014579A1 (de) 2010-04-09 2011-10-13 Würth Elektronik Rot am See GmbH & Co. KG Verfahren zum Herstellen einer elektronischen Baugruppe
DE102011089927A1 (de) * 2011-12-27 2013-06-27 Robert Bosch Gmbh Kontaktsystem mit einem Verbindungsmittel und Verfahren
EP2852970B1 (fr) 2012-05-22 2021-01-06 Würth Elektronik GmbH & Co. KG Procédé de fabrication d'un module électronique

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WO2000067310A1 (fr) * 1999-04-30 2000-11-09 Daimlerchrysler Ag Module microelectronique
JP2002261449A (ja) * 2000-12-27 2002-09-13 Matsushita Electric Ind Co Ltd 部品内蔵モジュール及びその製造方法
WO2005104635A1 (fr) * 2004-04-27 2005-11-03 Imbera Electronics Oy Conduction thermique a partir d'une composante enfouie
WO2006056643A2 (fr) * 2004-11-26 2006-06-01 Imbera Electronics Oy Procede de fabrication d'un module electronique
DE102006021765A1 (de) * 2005-05-10 2006-11-16 Samsung Electro-Mechanics Co., Ltd., Suwon Verfahren zum Herstellen einer Leiterplatte mit darin eingebetteten Elektronikkomponenten
WO2006134216A2 (fr) * 2005-06-16 2006-12-21 Imbera Electronics Oy Structure de carte de circuits imprimes et procede de fabrication de structure de carte de circuits imprimes
WO2009037145A2 (fr) * 2007-09-19 2009-03-26 Robert Bosch Gmbh Procédé de production d'un bloc de composants électroniques et bloc de composants électroniques correspondants

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EP2079291B1 (fr) * 1999-09-02 2013-06-19 Ibiden Co., Ltd. Carte de circuit imprimé et procédé de fabrication de carte de circuit imprimé
US6972964B2 (en) 2002-06-27 2005-12-06 Via Technologies Inc. Module board having embedded chips and components and method of forming the same
US7180169B2 (en) * 2003-08-28 2007-02-20 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module and method for manufacturing the same
FI117814B (fi) * 2004-06-15 2007-02-28 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
JP2006165175A (ja) * 2004-12-06 2006-06-22 Alps Electric Co Ltd 回路部品モジュールおよび電子回路装置並びに回路部品モジュールの製造方法

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Publication number Priority date Publication date Assignee Title
WO2000067310A1 (fr) * 1999-04-30 2000-11-09 Daimlerchrysler Ag Module microelectronique
JP2002261449A (ja) * 2000-12-27 2002-09-13 Matsushita Electric Ind Co Ltd 部品内蔵モジュール及びその製造方法
WO2005104635A1 (fr) * 2004-04-27 2005-11-03 Imbera Electronics Oy Conduction thermique a partir d'une composante enfouie
WO2006056643A2 (fr) * 2004-11-26 2006-06-01 Imbera Electronics Oy Procede de fabrication d'un module electronique
DE102006021765A1 (de) * 2005-05-10 2006-11-16 Samsung Electro-Mechanics Co., Ltd., Suwon Verfahren zum Herstellen einer Leiterplatte mit darin eingebetteten Elektronikkomponenten
WO2006134216A2 (fr) * 2005-06-16 2006-12-21 Imbera Electronics Oy Structure de carte de circuits imprimes et procede de fabrication de structure de carte de circuits imprimes
WO2009037145A2 (fr) * 2007-09-19 2009-03-26 Robert Bosch Gmbh Procédé de production d'un bloc de composants électroniques et bloc de composants électroniques correspondants

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