[go: up one dir, main page]

WO2018138829A1 - Filtre d'aiguillage à haute fréquence et circuit à haute fréquence l'utilisant - Google Patents

Filtre d'aiguillage à haute fréquence et circuit à haute fréquence l'utilisant Download PDF

Info

Publication number
WO2018138829A1
WO2018138829A1 PCT/JP2017/002728 JP2017002728W WO2018138829A1 WO 2018138829 A1 WO2018138829 A1 WO 2018138829A1 JP 2017002728 W JP2017002728 W JP 2017002728W WO 2018138829 A1 WO2018138829 A1 WO 2018138829A1
Authority
WO
WIPO (PCT)
Prior art keywords
terminal
frequency
high frequency
circuit
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2017/002728
Other languages
English (en)
Japanese (ja)
Inventor
津留　正臣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to PCT/JP2017/002728 priority Critical patent/WO2018138829A1/fr
Priority to JP2018564012A priority patent/JP6526360B2/ja
Publication of WO2018138829A1 publication Critical patent/WO2018138829A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/213—Frequency-selective devices, e.g. filters combining or separating two or more different frequencies

Definitions

  • the present invention relates to a high-frequency demultiplexer that demultiplexes radio waves having a plurality of input frequencies, and a high-frequency circuit using the same.
  • This high-frequency demultiplexer has a configuration in which band-pass filters having passbands of second, third, and fourth harmonics are connected in parallel.
  • a frequency corresponding to the pass frequency band of the band pass filter is output from a separate terminal.
  • the conventional high frequency demultiplexer requires a plurality of filters, which increases the size and does not satisfy the demand for miniaturization.
  • the present invention has been made to solve such a problem, and an object of the present invention is to provide a high frequency demultiplexer that can be miniaturized.
  • the high frequency branching filter according to the present invention includes first to fourth terminals.
  • the first terminal is an input terminal
  • the second terminal is an isolation terminal
  • the third terminal is a 0 ° output terminal
  • the fourth terminal is a 90 ° hybrid circuit that has a relationship of being a ⁇ 90 ° output terminal
  • the first frequency is a radio wave having a phase delayed by 90 ° relative to the radio wave applied to the first terminal.
  • a phase shift circuit for providing the second terminal with a radio wave having a phase advanced by 90 ° relative to the radio wave provided to the first terminal.
  • a high frequency duplexer includes a 90 ° hybrid circuit having first and second terminals to which radio waves having a first frequency and a second frequency are input, and a first frequency input to the second terminal.
  • the first frequency radio wave is delayed by 90 ° from the first frequency radio wave input to the first terminal, and the second frequency radio wave input to the second terminal is input to the first terminal.
  • the phase is 90 degrees ahead of the second frequency radio wave.
  • FIG. 1 is a configuration diagram of a high frequency demultiplexer according to the present embodiment.
  • the high frequency branching filter according to the present embodiment includes an input terminal 100, a phase shift circuit 3 that equally distributes high frequency power input from the input terminal 100, and provides a phase difference.
  • a 90 ° hybrid circuit 2 having fourth terminals 21, 22, 23, and 24 is provided.
  • the phase shift circuit 3 equally distributes the high frequency input to the input terminal 100 by the in-phase distributor 31, gives one output to the first terminal 21 of the 90 ° hybrid circuit 2, and supplies the other output to the fundamental wave.
  • the terminal 24 is in the relationship of being a ⁇ 90 ° output terminal.
  • the 90 ° hybrid circuit 2 is composed of, for example, a Lange coupler.
  • the fundamental wave, which is the first frequency and the third harmonic wave, which is the second frequency, input from the input terminal 100 are divided into two at the same amplitude by the in-phase distributor 31 in the phase shift circuit 3.
  • One output of the in-phase distributor 31 is input to the first terminal 21 of the 90 ° hybrid circuit 2, and the other output of the in-phase distributor 31 is 90 ° via a transmission line 32 having a fundamental wavelength of 1 ⁇ 4 wavelength.
  • the signal is input to the second terminal 22 of the hybrid circuit 2.
  • the fundamental wave input to the second terminal 22 of the 90 ° hybrid circuit 2 is 90 ° out of phase with the fundamental wave input to the first terminal 21, and is input to the second terminal 22.
  • the third harmonic wave is 90 ° ahead of the third harmonic wave input to the first terminal 21.
  • the 90 ° hybrid circuit 2 shifts the high frequency input to the first terminal 21 by ⁇ and outputs it from the third terminal 23, and shifts by ⁇ 90 ° and outputs it from the fourth terminal 24.
  • the high frequency input to the second terminal 22 is phase-shifted by ⁇ and output from the fourth terminal 24, and phase-shifted by ⁇ 90 ° and output from the third terminal 23.
  • ⁇ is set to 0 °.
  • the fundamental wave inputted to the first terminal 21 of the 90 ° hybrid circuit 2 and the fundamental wave delayed by 90 ° inputted to the second terminal 22 are not outputted at the third terminal 23 due to the reverse phase synthesis.
  • 4 terminal 24 outputs in-phase synthesis.
  • the third harmonic wave input to the first terminal 21 and the third harmonic wave advanced by 90 ° input to the second terminal 22 are not output in the fourth terminal 24 and are not output.
  • in-phase synthesis is performed and output. Therefore, the fundamental wave and the third harmonic wave input to the input terminal 100 are demultiplexed and output from the fourth terminal 24 and the third terminal 23, respectively.
  • the first frequency is the fundamental wave
  • the second frequency is the third harmonic
  • the phase shift circuit 3 similarly applies the second frequency to the second terminal 22 of the 90 ° hybrid circuit 2 at other frequencies.
  • the phase of the first frequency radio wave input is delayed by 90 ° from the first frequency radio wave input to the first terminal 21 and the phase of the second frequency radio wave input to the second terminal 22 is delayed. Can be demultiplexed by advancing the phase by 90 ° relative to the radio wave of the second frequency input to the first terminal 21.
  • the fourth terminal 24 of the 90 ° hybrid circuit 2 is provided with an open stub 40 having a quarter wavelength of the fundamental wave, so that the third harmonic wave demultiplexed at the third terminal 23 is obtained.
  • the fundamental wave can be reflected back to the input terminal 100 without affecting the signal.
  • the fundamental wave is reflected to the input terminal 100 without affecting the third harmonic wave. Can be returned.
  • the loop gain can be improved and the output frequency can be increased. There is an effect that can be.
  • the input terminal 100 may be provided with a short stub 41 having a fundamental wavelength of 1 ⁇ 4 wavelength.
  • the second harmonic wave can be reflected without affecting the fundamental wave and the third harmonic wave, and the input of the second harmonic wave can be suppressed and separated.
  • a high frequency demultiplexer is applied to an oscillator, a fundamental wave, a second harmonic wave, and a third harmonic wave are output from the oscillator.
  • the output of the second harmonic wave is unnecessary, this can be suppressed as an input, and emission of unnecessary waves can be suppressed.
  • the input terminal 100 may be provided with a short stub 41 and a resistor 42 having a fundamental wave of 1 ⁇ 4 wavelength.
  • the resistor 42 is connected to one end of the short stub 41 that opens the fundamental wave.
  • the second terminal is an isolation terminal
  • the third terminal is a 0 ° output terminal
  • the fourth terminal is a -90 ° output terminal
  • the 90 ° hybrid circuit and the radio wave applied to the first terminal with respect to the first frequency among the input radio waves.
  • a phase shift circuit that applies to the second terminal radio waves that are delayed by 90 ° relative to the second terminal, and applies to the second terminals radio waves that are advanced by 90 ° relative to radio waves that are applied to the first terminal with respect to the second frequency. Therefore, the radio waves of the first frequency and the second frequency can be demultiplexed without using a plurality of filters, and the size can be reduced.
  • the first frequency is the fundamental wave
  • the second frequency is the third harmonic
  • the phase shift circuit converts the fundamental wave and the third harmonic to the first frequency.
  • An in-phase distributor that distributes to the terminal and the second terminal at the same phase and with equal amplitude; and an electric length between the in-phase distributor and the first terminal, provided between the in-phase distributor and the second terminal. Since a transmission line having a quarter wavelength longer than the fundamental wave is also provided, the fundamental wave and the third harmonic wave can be demultiplexed and output.
  • the fourth terminal is provided with the open stub having a 1 ⁇ 4 wavelength at the first frequency, so that the demultiplexed third harmonic is affected. Instead, the fundamental wave can be reflected back to the input terminal of the high frequency demultiplexer.
  • the short stub having a quarter wavelength at the first frequency is provided at the input terminal of the high frequency demultiplexer or the phase shift circuit, the fundamental wave and 3 The second harmonic wave is reflected without affecting the second harmonic wave, and the input of the second harmonic wave can be suppressed and separated.
  • the second harmonic wave can be generated without affecting the fundamental wave and the third harmonic wave. It is possible to attenuate and suppress the input of the second harmonic.
  • FIG. FIG. 6 is a configuration diagram showing a high frequency amplifier using the high frequency demultiplexer of the first embodiment as the high frequency circuit of the second embodiment.
  • the high frequency demultiplexer 1a is the high frequency demultiplexer shown in FIG. 4 of the first embodiment, and the corresponding parts are denoted by the same reference numerals and description thereof is omitted.
  • the input terminal 100 in the high frequency demultiplexer 1a is configured to be supplied with the output of the amplifier 5, and the third terminal 23 of the 90 ° hybrid circuit 2 in the high frequency demultiplexer 1a has a third wavelength and a quarter wavelength.
  • An open stub 43 is provided.
  • the operation of the high frequency demultiplexer 1a is the same as that of the first embodiment.
  • the short wave is short-circuited and reflected by the short stub 41 independently of the fundamental wave and the third harmonic wave, and is reflected by the open stub 43 independently of the fundamental wave and the second harmonic wave.
  • the third harmonic wave can be reflected and returned to the input terminal 100. Therefore, the phase of the second harmonic can be designed independently from the electrical length from the amplifier 5 to the short stub 41, and the phase of the third harmonic from the electrical length from the amplifier 5 to the open stub 43 can be designed independently.
  • the fundamental wave, the second harmonic, and the third harmonic can be designed independently, so that the harmonic processing becomes easy. That is, in the harmonic processing, a fundamental wave, a harmonic wave such as a second harmonic wave and a third harmonic wave are combined to form a desired waveform. At that time, these phase relationships are important. For example, when the fundamental wave and the third harmonic wave are combined in phase, the shape approaches a rectangle. The waveform collapses. Therefore, harmonic processing or waveform formation is facilitated by the fact that the fundamental and harmonic phases can be designed independently.
  • an amplifier is connected to the input terminal of the high frequency branching filter or phase shift circuit of the first embodiment, and the third terminal is connected to the second frequency. Since an open stub having a quarter wavelength is provided, harmonic processing can be easily performed, and power consumption of the amplifier can be improved.
  • FIG. 7 is a configuration diagram showing a high frequency oscillator using the high frequency demultiplexer of the first embodiment as the high frequency circuit of the third embodiment.
  • the high-frequency demultiplexer 1 is the high-frequency demultiplexer shown in FIG. 1.
  • the drain terminal of the transistor 60 is connected to the input terminal 100 in the high frequency demultiplexer 1, and the fourth terminal 24 in the high frequency demultiplexer 1 is open.
  • the transistor 60 includes a feedback circuit 61 and a feedback circuit 62 at its source terminal and gate terminal, respectively.
  • the operation of the high frequency demultiplexer 1 is the same as the operation of the configuration shown in FIG.
  • the high frequency demultiplexer 1 shown in FIG. 7 operates as one of the feedback circuits of the oscillator, and the fundamental wave reflected by the fourth terminal 24 of the 90 ° hybrid circuit 2 returns to the input terminal 100, and the transistor 60.
  • the fundamental wave is fed back in series.
  • the high frequency (initially noise) input to the gate terminal of the transistor 60 is amplified by the transistor 60 and output to the drain terminal, and the high frequency reflected by the drain terminal side circuit (here, the high frequency demultiplexer 1) is the transistor 60.
  • the signal is input to the feedback circuit 61 through the drain-source and reflected from the source. Further, the signal is input to the feedback circuit 62 via the gate and source of the transistor 60, reflected, and fed back to the gate terminal of the transistor 60 so as to be in phase. This high frequency becomes the oscillation frequency.
  • the gain obtained by making a circuit of the transistor and the feedback circuit connected to each terminal of the transistor is positive, and the larger one is easier to oscillate.
  • the high-frequency oscillator shown in FIG. 7 feeds back the fundamental wave for performing the oscillation operation to the transistor 60 without outputting it to an external load. Therefore, the loop gain of the oscillator is improved and the oscillator can easily perform the oscillation operation. Further, the third harmonic wave obtained by the oscillation operation is output from the third terminal 23 of the 90 ° hybrid circuit 2.
  • the high frequency demultiplexer is connected to the drain terminal as one of the feedback circuits, but the high frequency demultiplexer may be provided at the gate terminal or the source terminal.
  • the input terminal of the high frequency duplexer of the first embodiment configured as a feedback circuit is connected to at least one of the transistor terminals, and the oscillation Since the operation is performed, the fundamental wave that performs the oscillating operation by the high frequency demultiplexer can be fed back and the third harmonic wave that is the harmonic thereof can be output, so that the oscillating operation can be easily realized.
  • phase noise can be improved because transistors and resonators having better performance can be used than when the oscillator is configured with a frequency corresponding to the third harmonic directly. This is because the loss is lower and the parasitic component is smaller when the low frequency is handled.
  • the fundamental wave is applied to the input terminal of the high frequency demultiplexer without affecting the demultiplexed third harmonic. It can be reflected back.
  • FIG. 8 is a configuration diagram showing a PLL synthesizer using the high frequency demultiplexer of the first embodiment as the high frequency circuit of the fourth embodiment.
  • the high-frequency demultiplexer 1 is the high-frequency demultiplexer shown in FIG.
  • a voltage controlled oscillator (VCO) 70 of a phase locked loop (PLL) is connected to the input terminal 100 in the high frequency demultiplexer 1, and the fundamental wave output from the fourth terminal 24 of the 90 ° hybrid circuit 2 is a PLL circuit unit. 71, and the output of the PLL circuit unit 71 is given to the voltage controlled oscillator 70 to perform negative feedback control.
  • VCO voltage controlled oscillator
  • PLL phase locked loop
  • the PLL circuit unit 71 is a circuit configured by a phase comparator, a reference oscillator, a loop filter, a prescaler, and the like, and the voltage controlled oscillator 70 and the PLL circuit unit 71 configure a known phase synchronization circuit. .
  • the operation of the high frequency demultiplexer 1 is the same as that of the first embodiment.
  • the voltage controlled oscillator 70 is a circuit whose oscillation frequency changes by controlling the voltage, and performs an oscillation operation with a fundamental wave.
  • the fundamental wave output from the voltage controlled oscillator 70 is output from the fourth terminal 24 of the 90 ° hybrid circuit 2 via the high frequency duplexer 1.
  • the fundamental wave output from the fourth terminal 24 is phase-compared with the reference frequency output from the reference oscillator in the PLL circuit unit 71, and the PLL circuit unit 71 supplies the voltage controlled oscillator 70 with a voltage corresponding to the phase error.
  • the voltage controlled oscillator 70 corrects the oscillation frequency according to the applied voltage.
  • the third harmonic generated by this oscillation operation is not output from the fourth terminal 24 of the 90 ° hybrid circuit 2 but is output from the third terminal 23.
  • the output of the fourth terminal of the high frequency demultiplexer of the first embodiment includes the phase synchronization circuit that inputs the radio wave for phase comparison with the reference frequency, Since the output of the voltage controlled oscillator of the phase locked loop is connected to the input terminal of the high frequency demultiplexer, the following effects are obtained.
  • a fundamental wave that oscillates with a high frequency demultiplexer connected to the output of the oscillator and its third harmonic are demultiplexed, the fundamental wave is input to the phase locked loop, and the third harmonic is output to the outside
  • the prescaler used in the phase synchronization circuit can be reduced or the frequency dividing number can be reduced, and the PLL synthesizer can be downsized and the phase noise can be improved.
  • the effect of improving the phase noise of the oscillator is achieved.
  • the high frequency demultiplexer and the high frequency circuit according to the present invention relate to a configuration of a high frequency demultiplexer that demultiplexes radio waves having a plurality of input frequencies and a high frequency circuit using the high frequency demultiplexer. It is suitable for use in high frequency amplifiers, high frequency oscillators, PLL synthesizers and the like.
  • 1, 1a High frequency demultiplexer 2 90 ° hybrid circuit, 3 phase shift circuit, 5 amplifier, 21 1st terminal, 22 2nd terminal, 23 3rd terminal, 24 4th terminal, 31 in-phase distributor , 32 transmission lines, 40, 43 open stubs, 41 short stubs, 42 resistors, 60 transistors, 61, 62 feedback circuits, 70 voltage controlled oscillators, 71 PLL circuit units, 100 input terminals.

Landscapes

  • Control Of Motors That Do Not Use Commutators (AREA)

Abstract

Un circuit hybride (2) à 90 degrés délivre des ondes radio d'une première fréquence à partir d'une quatrième borne (24) de celui-ci et délivre des ondes radio d'une deuxième fréquence à partir d'une troisième borne (23) de celui-ci. Un circuit (3) de déphasage, par rapport à la première fréquence, alimente une deuxième borne (22) avec des ondes radio présentant un retard de phase de 90 degrés par rapport à des ondes radio introduites dans une première borne (21), et, par rapport à la deuxième fréquence, alimente la deuxième borne (22) avec des ondes radio présentant un avance de phase de 90 degrés par rapport aux ondes radio introduites dans la première borne (21).
PCT/JP2017/002728 2017-01-26 2017-01-26 Filtre d'aiguillage à haute fréquence et circuit à haute fréquence l'utilisant Ceased WO2018138829A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP2017/002728 WO2018138829A1 (fr) 2017-01-26 2017-01-26 Filtre d'aiguillage à haute fréquence et circuit à haute fréquence l'utilisant
JP2018564012A JP6526360B2 (ja) 2017-01-26 2017-01-26 高周波分波器及びこれを用いた高周波回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2017/002728 WO2018138829A1 (fr) 2017-01-26 2017-01-26 Filtre d'aiguillage à haute fréquence et circuit à haute fréquence l'utilisant

Publications (1)

Publication Number Publication Date
WO2018138829A1 true WO2018138829A1 (fr) 2018-08-02

Family

ID=62979176

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2017/002728 Ceased WO2018138829A1 (fr) 2017-01-26 2017-01-26 Filtre d'aiguillage à haute fréquence et circuit à haute fréquence l'utilisant

Country Status (2)

Country Link
JP (1) JP6526360B2 (fr)
WO (1) WO2018138829A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024064225A (ja) * 2022-10-27 2024-05-14 大学共同利用機関法人自然科学研究機構 アイソレータ

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002067367A1 (fr) * 2001-02-20 2002-08-29 Axe, Inc. Diplexeur haute frequence
WO2009078095A1 (fr) * 2007-12-18 2009-06-25 Fujitsu Limited Duplexeur, module comprenant le duplexeur et dispositif de communication
US20100295630A1 (en) * 2009-05-20 2010-11-25 The Regents Of The University Of California Diplexer synthesis using composite right/left-handed phase-advance/delay lines
JP2016171554A (ja) * 2014-06-13 2016-09-23 住友電気工業株式会社 電子装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002067367A1 (fr) * 2001-02-20 2002-08-29 Axe, Inc. Diplexeur haute frequence
WO2009078095A1 (fr) * 2007-12-18 2009-06-25 Fujitsu Limited Duplexeur, module comprenant le duplexeur et dispositif de communication
US20100295630A1 (en) * 2009-05-20 2010-11-25 The Regents Of The University Of California Diplexer synthesis using composite right/left-handed phase-advance/delay lines
JP2016171554A (ja) * 2014-06-13 2016-09-23 住友電気工業株式会社 電子装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024064225A (ja) * 2022-10-27 2024-05-14 大学共同利用機関法人自然科学研究機構 アイソレータ
JP7694958B2 (ja) 2022-10-27 2025-06-18 大学共同利用機関法人自然科学研究機構 アイソレータ

Also Published As

Publication number Publication date
JP6526360B2 (ja) 2019-06-05
JPWO2018138829A1 (ja) 2019-06-27

Similar Documents

Publication Publication Date Title
US9143136B2 (en) Pumped distributed wave oscillator system
US8115560B2 (en) Ring-shaped voltage control oscillator
JP5213789B2 (ja) 高周波発振源
JP2015091084A (ja) ４相出力電圧制御発振器
KR20090062536A (ko) 주파수 발생기
JP5843592B2 (ja) 自己注入同期発振器
JP6526360B2 (ja) 高周波分波器及びこれを用いた高周波回路
US8018290B2 (en) Oscillator, transmitter-receiver and frequency synthesizer
US6756863B2 (en) High-frequency oscillator of frequency switching type and high-frequency oscillation method
JP5634343B2 (ja) 注入同期発振装置
JP4890198B2 (ja) 高周波発振源
JP6407473B1 (ja) 高周波ミクサ
US20100085131A1 (en) Filter circuit and voltage-controlled oscillating circuit
JP2009278150A (ja) 電圧制御発振装置
JP2006217460A (ja) 偶高調波ミクサ
US7061336B2 (en) High frequency oscillator
JP4657797B2 (ja) 高周波発振器および高周波シンセサイザ
JP6344257B2 (ja) 自己注入同期発振器
JP4173488B2 (ja) フィルタ回路及び周波数逓倍器
JP5515151B2 (ja) 発振器アレー
JP5495747B2 (ja) 高周波発振源
TW202315335A (zh) 注入鎖定鎖頻迴路振盪單元
JP3970284B2 (ja) マルチモード無線送信機及びこれを用いた携帯無線機
US10566929B2 (en) Triple-push type voltage-controlled oscillator
JP2016225882A (ja) 高周波フィルタ回路及び高周波ミクサ

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17894471

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2018564012

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17894471

Country of ref document: EP

Kind code of ref document: A1