JPH11195936A - Microwave amplifier circuit - Google Patents

Abstract

(57) Abstract: An inexpensive parallel feedback type microwave amplifier for reducing variations in drain current due to variations in FET characteristics caused by variations in the process of an MMIC used in a microwave band. Get the circuit. SOLUTION: Since a parallel feedback circuit 20 is formed only by a resistor 12 and a DC component is fed back to a gate in addition to a high frequency component in a drain voltage of the FET 2, a gate-source voltage of a bias point in the FET 2 is provided. In the line that determines Vgs and drain current Id, Id = 0
The value of Vgs at the time of (1) is shifted and the inclination is made gentle, so that the amount of change of Id with respect to the amount of change of Vgs is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier circuit formed in a GaAs MMIC (microwave monolithic integrated circuit) used in a microwave band, and more particularly to a microwave amplifier circuit operated by a single power supply. is there.

[0002]

2. Description of the Related Art Currently, GaAs used in transmission / reception modules used for microwave band communication and radar systems, etc.
MMICs (hereinafter referred to as MMICs) mainly use FETs.
And a negative power supply for applying a bias voltage to the gate of the FET. An internal circuit of the MMIC using such two power supplies will be described with reference to FIG. FIG. 8 is a circuit diagram showing a conventional example of a parallel feedback type microwave amplifying circuit formed in an MMIC. In FIG. 8, a parallel feedback type microwave amplification circuit 100 is shown.
Is an FE that amplifies a high frequency (hereinafter, referred to as RF) signal.
T101; matching circuits 102 to 105 formed on the RF transmission line for matching impedance;
6 to 110 and resistors 111 to 113.

The drain of the FET 101 and the output terminal 114
A series circuit of the matching circuit 102 and the capacitor 106 is connected between the output terminal 114 and the capacitor 106 connected to the output terminal 114 so as to cut off the DC signal and prevent the output terminal 114 from outputting the DC signal. I have. Matching circuit 1
A series circuit of a matching circuit 103 and a resistor 111 is connected between a connection between the capacitor 02 and the capacitor 106 and a drain bias terminal 115 to which a positive voltage is applied.
A resistor 111 connected to the drain bias terminal 115 side
Constitutes a drain bias resistor for controlling the voltage applied to the drain electrode of the FET 101 by the voltage drop due to the drain current Id of the FET 101.

The connection between the matching circuit 103 and the resistor 111 is grounded via a capacitor 107, and the capacitor 107 is connected to the RF from the drain bias terminal 115.
The signal is grounded. A series circuit of a capacitor 108 and a resistor 112 is connected between the drain and the gate of the FET 101, and the series circuit includes a parallel feedback CR
A parallel feedback circuit 120 forming a circuit is formed. FET
A capacitor 108 connected to the gate side of 101 cuts off a DC signal.

A series circuit of a matching circuit 104 and a resistor 113 is connected between the gate of the FET 101 and a gate bias terminal 116 to which a negative voltage is applied.
A matching circuit 104 is connected to the gate side of T101. The connection between the gate bias terminal 116 and the resistor 113 is grounded via a capacitor 109. The capacitor 109 is for grounding the RF signal from the gate bias terminal. The resistor 113 is used for adjusting the gate bias, and is also used for RF input side matching. Further, a series circuit of the matching circuit 105 and the capacitor 110 is connected between the gate of the FET 101 and the input terminal 117 to which the RF signal is input, and the capacitor 110 connected to the input terminal 117 is connected.
Cuts off a DC signal from the input terminal 117. The source of the FET 101 is grounded.

FIG. 9 is a diagram showing the relationship between the gate-source voltage Vgs and the drain current Id of the FET 101 in the microwave amplifier circuit 100. In FIG. 9, a curve P1 shows a standard characteristic of the FET 101, and Vp
1 indicates a standard pinch-off voltage of the FET 101. Curves P2 and P3 show variations in the characteristics of the FET 101 caused by variations in the process of the FET 101 and the like. , The characteristics change when the pinch-off voltage Vp1 shifts to Vp3.

For example, if the gate bias voltage Vg, that is, the gate-source voltage Vgs is set to be the same at Vg1, if the pinch-off voltage Vp1 shifts to Vp2, the drain current Id decreases from Id1 to Id2. If the pinch-off voltage Vp1 shifts to Vp3, the drain current Id rises from Id1 to Id3. Such FE
For example, when hundreds to thousands of modules are used in parallel, such as in a phased array radar, all the MMICs used in each
In each of the microwave amplifier circuits 100, even when the same bias voltage was applied, the drain currents Id were different from each other, causing non-uniform current consumption and the like, and the characteristics did not become constant for each MMIC. For this reason, the gate bias voltage Vg is adjusted for each module, and there is a problem that the manufacturing cost is increased.

On the other hand, the MMIC using the microwave amplifier circuit 100 shown in FIG. 8 requires two power supplies, positive and negative, so that a microwave amplifier that does not require a negative power supply to reduce the cost is required. It is effective to use a circuit, and a conventional example of such a microwave amplifier circuit is shown in FIG.
0 is shown. In FIG. 10, the same components as those in FIG. 8 are denoted by the same reference numerals. The difference between FIG. 10 and FIG.
16 is grounded, and a self-bias circuit 135 composed of a parallel circuit of a capacitor 131 and a resistor 132 is connected between the source of the FET 101 and the ground. I did it. The capacitor 131 is for grounding the RF signal component.

In FIG. 10, the gate bias terminal 116 in FIG. 8 is grounded so as to be always at 0 V, and a voltage drop is caused by the drain current Id flowing through the resistor 132.
The gate-source voltage Vgs of T101 becomes negative as in the following equation (a). Vgs = 0−Rs × Id = −Rs × Id (a) In the equation (a), Rs represents the resistance value of the resistor 132.

FIG. 11 is a diagram showing the relationship between the gate-source voltage Vgs and the drain current Id of the FET 101 in the microwave amplifier circuit 150. In FIG. 11, a line A represents a bias point Vgs and I
The intersection point D1 of the line A and the curve P1 showing the characteristics of the FET 101 is a bias point,
1 operates at the intersection D1.

[0011]

However, the FET 101
When the pinch-off voltage Vp1 shifts to Vp2 due to the variation in the characteristic of the FET 101, the bias point D1 moves to the intersection D2 between the line A and the curve P2, and the FET 101
Since the operation is performed at the intersection D2, the current value of the drain current Id shifts from Id1 to Id2. Similarly, when the pinch-off voltage Vp1 shifts to Vp3, the FET 101 moves the bias point D1 to the intersection D3 between the line A and the curve P3,
101 operates at the intersection D3, the drain current Id
Shifts from Id1 to Id3.

In order to adjust the drain current Id so as to eliminate the variation, the gate-source voltage Vgs of the FET 101 must be adjusted by the resistor 113, and the resistor 113 is formed inside the MMIC. Therefore, there is a problem that it is difficult to adjust the resistance 113 inside the MMIC.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has been developed for use in a microwave band.
It is an object of the present invention to provide an inexpensive parallel-feedback microwave amplifier circuit that reduces variations in drain current caused by variations in FET characteristics caused by variations in MIC processes.

Although the object and the configuration are different from those of the present invention,
A bias circuit in which the bias value fluctuates in the same direction as the change in the threshold voltage in accordance with the change in the threshold voltage,
By biasing the gate of OS • FET, MO
Japanese Patent Application Laid-Open No. 55-6857 discloses a semiconductor integrated circuit in which the potential of an input signal for conducting an S-FET does not depend on the fluctuation of a threshold voltage.

Although the object and the configuration are different from those of the present invention,
In JP-A-4-336609, a voltage obtained by dividing a gate voltage of an FET-T1 connected to a load resistor by a resistor R2 and an FET-T2 connected so as to act as a resistor is applied to the gate of the FET-T1. A constant current source circuit that is applied and biased is disclosed. Further, although the object and the configuration are different from those of the present invention, Japanese Patent Application Laid-Open No. 1-233914 discloses that a negative bias power supply for the gate of the enhancement type FET 2 connected to the load is connected to the enhancement type FET 6 connected so as to act as a resistor. There is disclosed an integrated circuit for setting a bias circuit 1 via a bias circuit 1 in accordance with a shift amount of a threshold value generated in an enhancement type FET 2.

[0016]

SUMMARY OF THE INVENTION A microwave amplifier circuit according to the present invention comprises a GaAs MM used in a microwave band.
In a microwave amplifying circuit that operates with a single power supply and is formed in an IC, an FET that amplifies microwaves, a self-bias circuit provided between the source of the FET and ground, and a drain voltage of the FET And a gate bias circuit for applying a bias voltage to the gate of the FET. The parallel feedback circuit also feeds back a DC component in addition to the high-frequency component in the drain voltage.

Further, in the microwave amplification circuit according to the present invention, in the first aspect, the parallel feedback circuit is constituted by a resistor.

Further, in the microwave amplification circuit according to the present invention, in any one of the first and second aspects, the gate bias circuit is constituted by a resistor provided between the gate of the FET and the ground, The bias voltage is applied using a DC current flowing through a parallel feedback circuit.

Further, in the microwave amplifier circuit according to the present invention, in claim 3, the resistance of the gate bias circuit is formed by an FET.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail based on an embodiment shown in the drawings. Embodiment 1 FIG. FIG. 1 is a circuit diagram showing an example of a parallel feedback type microwave amplifier circuit according to the first embodiment of the present invention. In FIG. 1, a parallel feedback type microwave amplifier circuit 1 formed in an MMIC includes an FET 2 for amplifying a high frequency (hereinafter, referred to as RF) signal, and a matching circuit formed on an RF transmission line for matching impedance. 3 to 6, capacitors 7 to 10 and resistors 11 to 14.

A series circuit of the matching circuit 3 and the capacitor 7 is connected between the drain of the FET 2 and the output terminal 15, and the capacitor 7 connected to the output terminal 15 cuts off a DC signal and The DC signal is not output from 15. A connection between the matching circuit 3 and the capacitor 7 and a drain bias terminal 16 to which a positive voltage is applied.
Is connected to a series circuit of the matching circuit 4 and the resistor 11. The resistor 11 connected to the drain bias terminal 16 forms a drain bias resistor for controlling the voltage applied to the drain electrode of the FET 2 by the voltage drop due to the drain current Id of the FET 2.

The connection between the matching circuit 4 and the resistor 11 is grounded via a capacitor 8, and the capacitor 8 grounds the RF signal from the drain bias terminal 16. A resistor 1 is connected between the drain and the gate of FET2.
2, the resistor 12 forms an RF feedback resistor to form a parallel feedback circuit 20.

A series circuit of a matching circuit 5 and a resistor 13 is connected between the gate of the FET 2 and the ground.
A matching circuit 5 is connected to the gate side of ET2. The resistor 13 connected to the ground side forms a gate bias resistor used for adjusting the gate bias, and
It is also used for RF input side matching. Further, a series circuit of the matching circuit 6 and the capacitor 9 is connected between the gate of the FET 2 and the input terminal 17, and the capacitor 9 connected to the input terminal 17 blocks a DC signal from the input terminal 17. Is what you do. A self-bias circuit 21 composed of a parallel circuit of a capacitor 10 and a resistor 14 is connected between the source of the FET 2 and the ground.

In the above configuration, the current It input from the drain bias terminal 16 is composed of the drain current Id flowing through the FET 2 and the current Ig (<Id) flowing through the gate bias resistor 13 via the RF feedback resistor 12. It flows. At this time, the gate voltage Vg, the source voltage Vs, and the drain voltage Vd of the FET 2
Is Rd, the resistance of the resistor 13 is Rg, and the resistance of the resistor 14 is
If the resistance value of R is represented by Rs, the following expressions (1) to (3) are obtained. Vg = Rg × Ig (1) Vs = Rs × Id (2) Vd = Rd × (Id + Ig) (3)

The current It input from the drain bias terminal 16 is as shown in the following equation (4). It = Id + Ig (4) From the above equations (1) to (4), the gate-source voltage Vgs of the FET 2 can be expressed as the following equation (5). Vgs = Rg.times.Ig-Rs.times.Id = Rg.times. (It-Id) -Rs.times.Id = Rg.times.It- (Rg + Rs) .times.Id (5)

Equation (5) represents the FE of the microwave amplification circuit 1.
A line that determines Vgs and Id of the bias point at T2 is shown, and this line and the characteristic curve of FET2 are shown in FIG. FIG.
Is the gate of the FET 2 in the microwave amplification circuit 1
FIG. 4 is a diagram showing a relationship between a source-to-source voltage Vgs and a drain current Id. In FIG. 2, a curve P1 shows a standard characteristic of the FET2, and Vp1 shows a standard pinch-off voltage of the FET2. A line B is a line that determines Vgs and Id of the bias point in the FET 2 of the microwave amplification circuit 1 and shows the above equation (5). When Id = 0, the line passes through Vgs = Rg × Ig and has a slope. Is a straight line of-(Rg + Rs). The intersection point E between the line B and the curve P1 showing the characteristics of the FET 2, that is, the point where the gate-source voltage Vgs becomes Vgs1 and the drain current Id becomes Id1, becomes the bias point,
T2 operates at intersection E.

FIG. 3 is a diagram showing the relationship between the gate-source voltage Vgs and the drain current Id of the FET 2, which also shows the variation in the characteristics of the FET 2 with respect to FIG. In FIG. 3, curves P2 and P3 show variations in the characteristics of FET2 caused by variations in the process of FET2, and curves P2 show variations in the characteristics when the pinch-off voltage Vp1 shifts to Vp2. , A curve P3 shows a change in characteristics when the pinch-off voltage Vp1 shifts to Vp3.

When the pinch-off voltage Vp1 shifts to Vp2 due to variations in the characteristics of the FET 2, the bias point E moves to the intersection F of the line B and the curve P2, and the FET 2 operates at the intersection F. The current value of Id is Id1
To Id4. Similarly, when the pinch-off voltage Vp1 shifts to Vp3, the bias point E changes to the line B and the curve P3.
Then, since the FET 2 operates at the intersection G, the current value of the drain current Id shifts from Id1 to Id5.

Here, a line A shown by a broken line is a bias point of the FET 2 when a conventional parallel feedback circuit composed of a series circuit in which a capacitor is connected in series with the resistor 12 is inserted between the drain and the gate of the FET 2. This line determines Vgs and Id. The line A is the intersection E as in the case where the intersection with the curve P1 is the line B. However, when Id = 0, Vgs = 0, and the inclination is larger than that of the line B. Therefore, the current value Id2 of the drain current Id at the intersection of the line A and the curve P2 is smaller than Id4, and the current value Id3 of the drain current Id at the intersection of the line A and the curve P3 is larger than Id5. That is, the drain current I for the variation in the characteristics of the FET 2 is higher in the case of the line B than in the case of the line A.
It can be seen that the variation width of d is small.

On the other hand, when the parallel feedback circuit 20 connected between the drain and the gate of the FET 2 is formed by a series circuit of a resistor 12 and a capacitor, the capacitance of the capacitor is Ck and the resistance of the resistor 12 is Rk. Then, the impedance Z of the parallel feedback circuit can be expressed by the following equation (6). Z = Rk−j × (1 / ωCk) (6) Note that, where f is the frequency, ω = 2πf.

For example, when Rk = 500Ω and Ck = 3 pF, when the frequency f is 10 GHz, Z = 500−j × 5.3 (Ω). As described above, it is understood that the influence of the resistance component is large in the RF signal, and the capacitance component is negligibly small as compared with the resistance component. Therefore, in the parallel feedback type microwave amplification circuit 1, it can be seen that there is no problem even if the parallel feedback circuit 20 is configured only with a resistor without using a capacitor.

In FIG. 1, the resistor 13 may not be used for RF input side matching, but may be used only for adjusting the gate bias of the FET 2. In this case, a capacitor is connected in parallel with the resistor 13. Connecting. Also in this case, as in the case of FIG. 1, the amount of change in the drain current Id with respect to the change in the pinch-off voltage Vp in the FET 2 can be reduced.

Further, an FET may be used instead of the resistor 13 in FIG. 1, and an example of the microwave amplifying circuit 1 in such a case is shown in FIG. 4 differs from FIG. 1 in that the resistor 13 is replaced by an FET 31. Therefore, the microwave amplifier circuit 1 in FIG. In FIG. 4, FIG.
The same components as those in FIG. 4 are denoted by the same reference numerals, and the description thereof is omitted here. Only the differences between FIG. 4 and FIG. 1 will be described below. 4, one end of the matching circuit 5 is connected to the gate of the FET 2, and the other end of the matching circuit 5 is connected to the drain of the FET 31. The gate and the source of the FET 31 are grounded.

In such a configuration, the FET 31
Equivalently, as shown in FIG. 5, the ON resistance of the FET 31 when the gate-source voltage is 0 V,
That is, the resistor has a resistance value of the drain-source resistance Ron. However, the resistance value of this resistor Ron depends on the FET
It depends on the pinch-off voltage of 31. FIG. 6 shows the FET
FIG. 7 is a diagram showing the relationship between the pin-off voltage Vp and Ron at 31 as shown in FIG.
It can be seen that as R becomes smaller, Ron also decreases almost linearly. From these facts, the gate-source voltage Vgs of the FET 2 in the microwave amplification circuit 30 may be obtained by setting Rg in the above equation (5) to Ron, and the following (6)
It looks like an expression. Vgs = Ron × It− (Ron + Rs) × Id (6)

The equation (6) represents the F of the microwave amplification circuit 30.
A line that determines Vgs and Id of the bias point in ET2 is shown, and this line and the characteristic curve of FET2 are shown in FIG. FIG. 7 is a diagram showing the relationship between the gate-source voltage Vgs of FET2 and the drain current Id of the microwave amplifier circuit 30. In FIG. 7, curves P1 to P3 are the same as those in FIGS. A line C1 is a line that determines Vgs and Id of the bias point in the FET 2 of the microwave amplification circuit 30, and shows the above equation (6). When Id = 0, Vgs = Ron × Ig
And a straight line having a slope of-(Ron + Rs). Lines C1 and F
The intersection E with the curve P1 showing the characteristics of ET2, that is, the gate-source voltage Vgs is Vgs1, and the drain current Id is Id1
Is a bias point, and the FET 2 operates at the intersection E.

Since the FET 2 and the FET 31 are manufactured by the same process, the variation in the characteristics of the FET 2 causes
When the pinch-off voltage Vp1 shifts to Vp2, Ron varies according to the shift amount of the pinch-off voltage Vp as shown in FIG.
Also change. For this reason, in the above equation (6), the slope changes due to the change of Ron, and Vg when Id = 0.
Since the value of s changes, line C1 changes to line C2. From this, the bias point E becomes the intersection L of the line C2 and the curve P2.
And the FET 2 operates at the intersection L, so that the current value of the drain current Id shifts from Id1 to Id6. Similarly, when pinch-off voltage Vp1 shifts to Vp3, line C1 changes to line C3. From this, the bias point E moves to the intersection M of the line C3 and the curve P3, and the FET 2 operates at the intersection M, so that the current value of the drain current Id is Id1
To Id7.

Here, a line A indicated by a wavy line indicates a bias point of the FET 2 when a conventional parallel feedback circuit composed of a series circuit in which a capacitor is connected in series with the resistor 12 is inserted between the drain and the gate of the FET 2. The line which determines Vgs and Id is shown. Line A is the intersection of curve P1 with line C1
Is the intersection point E as in the case of .about.C3, but when Id = 0, Vgs
Since = 0, the inclination is larger than the lines C1 to C3. For this reason, the current value Id2 of the drain current Id at the intersection of the line A and the curve P2 is smaller than Id6, and the current value Id3 of the drain current Id at the intersection of the line A and the curve P3.
Is greater than Id7. That is, it can be seen that the variation width of the drain current Id with respect to the variation of the characteristics of the FET 2 is smaller in the case of the lines C1 to C3 than in the case of the line A.

It should be noted that, also in FIG.
Instead of being used for input side matching, it may be used only for adjusting the gate bias in FET2,
In this case, a capacitor is connected between the drain of the FET 31 and the ground. Also in this case, similarly to the case of FIG. 4, the amount of change in the drain current Id with respect to the change in the pinch-off voltage Vp in the FET 2 can be reduced.

As described above, the parallel feedback type microwave amplifier circuit according to the first embodiment of the present invention
Since 0 is formed only by the resistor 12 and the DC component is fed back to the gate in addition to the high-frequency component in the drain voltage of the FET 2, the line for determining the Vgs and Id of the bias point in the FET 2 has an Id = 0. Vgs when
Can be shifted and the slope can be made gentler, and the amount of change of Id with respect to the amount of change of Vgs can be reduced. For this reason, it is possible to reduce the variation in the drain current due to the variation in the characteristics of the FET caused by the variation in the process of the MMIC or the like without increasing the cost.

[0040]

According to the first aspect of the present invention, there is provided a microwave amplification circuit.
The parallel feedback circuit that feeds back the drain voltage of the FET to the gate is configured to feed back the DC component in addition to the high frequency component in the drain voltage. From this, FE
In the line that determines the gate-source voltage and the drain current at the bias point at T, the value of the gate-source voltage when the drain current is 0 can be shifted and the slope can be made gentle, and the gate-source voltage can be reduced. , The amount of change in drain current with respect to the amount of change can be reduced. For this reason, it is possible to reduce the variation in the drain current caused by the variation in the characteristics of the FET caused by the variation in the process of the MMIC and the like.

In the microwave amplifier circuit according to the second aspect, since the parallel feedback circuit is formed only by the resistor in the first aspect, the variation in the characteristics of the FET caused due to the variation in the process of the MMIC or the like. The variation in drain current caused by the above can be reduced without increasing the cost.

According to a third aspect of the present invention, in the microwave amplification circuit according to the first or second aspect, the gate bias circuit is constituted by a resistor provided between the gate of the FET and the ground. The bias voltage is applied using a direct current flowing through a parallel feedback circuit. From this, in the line that determines the gate-source voltage and the drain current at the bias point in the FET, the value of the gate-source voltage when the drain current is 0 can be shifted and the slope can be made gentler. The amount of change in drain current with respect to the amount of change in source-to-source voltage can be reduced. For this reason, it is possible to reduce the variation in the drain current due to the variation in the characteristics of the FET caused by the variation in the process of the MMIC or the like without increasing the cost.

According to a fourth aspect of the present invention, in the microwave amplification circuit according to the third aspect, specifically, the resistance of the gate bias circuit is formed by an FET. From this, in the line that determines the gate-source voltage and the drain current at the bias point in the FET, the value of the gate-source voltage when the drain current is 0 can be shifted and the slope can be made gentler. The amount of change in drain current with respect to the amount of change in source-to-source voltage can be reduced. For this reason, the FMIC generated due to the variation in the process of the MMIC, etc.
Variations in drain current due to variations in ET characteristics can be reduced without increasing costs.

[Brief description of the drawings]

FIG. 1 is a circuit diagram illustrating an example of a microwave amplifier circuit according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between a gate-source voltage Vgs and a drain current Id in the FET 2 of FIG.

FIG. 3 is a diagram showing a relationship between a gate-source voltage Vgs and a drain current Id showing variations in characteristics of the FET 2 in FIG.

FIG. 4 is a circuit diagram showing another example of the microwave amplification circuit according to the first embodiment of the present invention.

5 is a diagram showing an equivalent circuit in the FET 31 of FIG.

6 is a diagram showing a pin-off voltage Vp of the FET 31 shown in FIG. 4;
FIG. 6 is a diagram showing a relationship between the resistance Ron and the drain-source resistance Ron.

FIG. 7 is a diagram showing a relationship between a gate-source voltage Vgs and a drain current Id in the FET 2 of FIG.

FIG. 8 is a circuit diagram showing a conventional example of a parallel feedback type microwave amplifier circuit formed in an MMIC.

9 is a diagram showing a relationship between a gate-source voltage Vgs and a drain current Id in the FET 101 of FIG.

FIG. 10 is a circuit diagram showing another conventional example of a parallel feedback type microwave amplifying circuit formed in an MMIC.

11 is a diagram showing a relationship between a gate-source voltage Vgs and a drain current Id in the FET 101 of FIG.

[Explanation of symbols]

1,30 microwave amplifier circuit, 2,31 FET,
11, 12, 13, 14 resistance, 20 parallel feedback circuit, 21 self-bias circuit

Claims (4)

[Claims] 1. GaAs MM used in microwave band
A microwave amplifying circuit formed in an IC and operating with a single power supply, an FET for amplifying microwaves, a self-bias circuit provided between a source of the FET and ground, and a drain of the FET A parallel feedback circuit that feeds back a voltage to the gate; and a gate bias circuit that applies a bias voltage to the gate of the FET. The parallel feedback circuit feeds back a DC component in addition to a high-frequency component of the drain voltage. A microwave amplifier circuit characterized by the following. 2. The microwave amplifier circuit according to claim 1, wherein said parallel feedback circuit is constituted by a resistor. 3. The gate bias circuit comprises a resistor provided between the gate of the FET and the ground, and applies the bias voltage by using a direct current flowing through a parallel feedback circuit. The microwave amplification circuit according to claim 1 or 2, wherein: 4. The resistance of the gate bias circuit is FE
The microwave amplifier circuit according to claim 3, wherein the microwave amplifier circuit is formed of T.